* allow verification, but not a real checkin .checkoff "" "Lab #6: Step 1" 0 .verify ia[31:0] periodic(199n,100n) + 0x000 0x004 0x008 0x00C 0x010 0x014 0x018 0x01C 0x020 0x024 0x028 0x02C 0x030 0x034 0x038 0x03C + 0x040 0x044 0x048 0x04C 0x050 0x054 0x058 0x05C 0x060 0x064 0x068 0x06C 0x070 0x074 0x078 0x07C + 0x080 0x084 0x088 0x08C 0x090 0x094 0x098 0x09C 0x0A0 0x0A4 0x0A8 0x0AC 0x0B0 0x0B4 0x0B8 0x0BC + 0x0C0 0x0C4 0x0C8 0x0CC 0x0D0 0x0D4 0x0D8 0x0DC 0x0E0 0x0E4 0x0E8 0x0EC 0x0F0 0x0F4 0x0F8 0x0FC + 0x100 0x104 0x108 0x10C 0x110 0x114 0x118 0x11C 0x120 0x124 0x128 0x12C 0x130 0x134 0x138 0x13C + 0x140 0x144 0x148 0x14C 0x150 0x154 0x158 0x15C 0x160 0x164 0x168 0x16C 0x170 0x174 0x178 0x17C + 0x180 0x184 0x188 0x18C 0x190 0x194 0x198 0x19C 0x1A0 0x1A4 0x1A8 0x1AC 0x1B0 0x1B4 0x1B8 0x1BC + 0x1C0 0x1C4 0x1C8 0x1CC 0x1D0 0x1D4 0x1D8 0x1DC 0x1E0 0x1E4 0x1E8 0x1EC 0x1F0 0x1F4 0x1F8 0x1FC + 0x200 0x204 0x208 0x20C 0x210 0x214 0x218 0x21C 0x220 0x224 0x228 0x22C 0x230 0x234 0x238 0x23C + 0x240 0x244 0x248 0x24C 0x250 0x254 0x258 0x25C 0x260 0x264 0x268 0x26C 0x270 0x274 0x278 0x27C + 0x280 0x284 0x288 0x28C 0x290 0x294 0x298 0x29C 0x2A0 0x2A4 0x2A8 0x2AC 0x2B0 0x2B4 0x2B8 0x2BC + 0x2C0 0x2C4 0x2C8 0x2CC 0x2D0 0x2D4 0x2D8 0x2DC 0x2E0 0x2E4 0x2E8 0x2EC 0x2F0 0x2F4 0x2F8 0x2FC + 0x300 0x304 0x308 0x30C 0x310 0x314 0x318 0x31C 0x320 0x324 0x328 0x32C 0x330 0x334 0x338 0x33C + 0x340 0x344 0x348 0x34C 0x350 0x354 0x358 0x35C 0x360 0x364 0x368 0x36C 0x370 0x374 0x378 0x37C + 0x380 0x384 0x388 0x38C 0x390 0x394 0x398 0x39C 0x3A0 0x3A4 0x3A8 0x3AC 0x3B0 0x3B4 0x3B8 0x3BC + 0x3C0 0x3C4 .verify ma[31:0] periodic(199n,100n) + 0x0 0x1 0x2 0x3 0x4 0x0 0x1 0x2 + 0x0 0x0 0x3 0x6 0x2 0x3Fc 0x5 0x6 + 0x7 0x8 0xA 0x9 0xA 0xB 0x1800 0xC + 0x4 0x1 0x2 0x4 0x8 0xf 0x1e 0x16 + 0x2c 0x25 0x4a 0x40 0x80 0x8b 0x116 0x11a + 0x3FC 0xd 0xe 0xf 0x8 0x10 0x11 0x1e + 0x12 0x13 0x1 0x14 0x234 0x239 0x472 0x47c + 0x8f8 0x8f7 0x11ee 0x11fe 0x23fc 0x23ed 0x47da 0x47c8 + 0x8f90 0x8f83 0x11f06 0x11f12 0x3FC 0x1000000 0x80000000 0xfffff800 + 0xfffffffc 0x15 0x1 0x16 0x17 0x18 0x28 0x19 + 0xffffffec 0x1a 0x1b 0xD8000000 0x1b 0x1c 0x7800000 0xf + 0x1d 0x1c 0x1e 0x23e24 0x23e31 0x47c62 0x47c74 0x8f8e8 + 0x8f8ff 0x11f1fe 0x11f1e6 0x23e3cc 0x23e3d5 0x47c7aa 0x47c7b0 0x8f8f60 + 0x8f8f7b 0x11f1ef6 0x11f1eea 0x23e3dd4 0x23e3dc9 0x47c7b92 0x47c7b8c 0x3fc + 0x3 0x7 0xffffffff 0xf 0x1f 0x23e3dc60 0x23e3dc63 0x1f1ee318 + 0x1f1ee31f 0xf8f718f8 0xf8f718f7 0xc7b8c7b8 0xc7b8c7a7 0x3fc 0x3f 0x1 + 0x7f 0x1 0xff 0x1 0x1ff 0x0 0x3ff 0x0 + 0x7ff 0x0 0xfff 0x1ffe 0x1fff 0x3dc63d38 0x3dc63d07 0xee31e838 + 0xee31e847 0x718f4238 0x718f42c7 0x8c7a1638 0x8c7a17c7 0x63d0be38 0x63d0bdc7 0x1e85ee38 + 0x1e85e9c7 0xf42f4e38 0xf42f41c7 0xa17a0e38 0xa17a11c7 0x3fc 0xffffffff 0x3fff + 0x7fff 0x8000 0xffff 0xffffffff 0x1ffff 0xffffc000 0x3ffff 0x7fffe + 0x7ffff 0xffffe 0xfffff 0xbd08e38 0xbd0b1c7 0x5e858e38 0x5e85f1c7 0xf42f8e38 + 0xf42f71c7 0xa17b8e38 0xa17a71c7 0xbd38e38 0xbd071c7 0x5e838e38 0x5e8471c7 0xf4238e38 + 0xf42c71c7 0xa1638e38 0xa1638e2c 0x3fc 0xffffffff 0xffffffff 0x1fffff 0x1ff + 0x3fe000 0x3fffff 0x3fffff 0x7ffffe 0x7fffff 0xfffffe 0xffffff 0x3ff + 0x1ff8000 0x1ffffff 0xffffffff 0x3ffffff 0xffffffff 0x7ffffff 0xffffffff 0xfffffff + 0xffffffff 0x1fffffff 0xffffffff 0x3fffffff 0xffffffff 0x7fffffff 0xb1c7160 0xb238e9f + 0x591c74f8 0x59638b07 0xcb1c5838 0xcbe3a7c7 0x5f1d3e38 0x5ee2c1c7 0xf7160e38 0xf4e9f1c7 + 0xa74f8e38 0xa0b071c7 0x5838e38 0xa7c71c7 0x53e38e38 0x4c1c71c7 0x60e38e38 0x5f1c71c7 + 0xf8e38e38 0x871c71c7 0x3fc 0x0 0x38e38e38 0x98fc7638 0x8 0xc7e3b1c0 + 0x47a2b9c0 0x3fc .verify moe periodic(199n,100n) + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 + 0 0 .verify mrd[31:0] tvpairs() + 23699n 0xA01FF800 + 23999n 0x80410800 .verify wr periodic(199n,100n) + 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 + 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 + 0 1 .verify mwd[31:0] tvpairs() + 1499n 0x00000002 + 4199n 0x0000011A + 6999n 0x00011F12 + 11299n 0x047C7B8C + 12699n 0xC7B8C7A7 + 15899n 0xA17A11C7 + 18899n 0xA1638E2C + 23599n 0x871C71C7 + 24299n 0x47A2B9C0 Xbeta clk reset ia[31:0] id[31:0] ma[31:0] moe mrd[31:0] wr mwd[31:0] beta Xmem + vdd 0 0 ia[11:2] id[31:0] + moe 0 0 ma[11:2] mrd[31:0] + 0 clk wr ma[11:2] mwd[31:0] + $memory width=32 nlocations=1024 contents=( + 0xa01ff800 0x903ff800 0x80410800 0xa4620800 + 0xb0811000 0xb0000800 0xa8000800 0xb0000800 + 0xa8001000 0xb0000800 0xa8001800 0xb0000800 + 0xa8002000 0x641f03fc 0xa8a40800 0xb0c30800 + 0xa4e22800 0xb1011800 0x81252800 0x85290800 + 0x81433800 0xa5681800 0xb1865000 0xb58c4800 + 0xb0000800 0xa8002800 0xb0000800 0xa8003000 + 0xb0000800 0xa8003800 0xb0000800 0xa8004000 + 0xb0000800 0xa8004800 0xb0000800 0xa8005000 + 0xb0000800 0xa8005800 0xb0000800 0xa8006000 + 0x641f03fc 0x81a73000 0x81c92800 0xa9ea2800 + 0xaa0f3800 0x82108000 0x82246800 0x824f7800 + 0x86526000 0xa6720800 0x96919000 0x8293a000 + 0xb0000800 0xa8006800 0xb0000800 0xa8007000 + 0xb0000800 0xa8007800 0xb0000800 0xa8008000 + 0xb0000800 0xa8008800 0xb0000800 0xa8009000 + 0xb0000800 0xa8009800 0xb0000800 0xa800a000 + 0x641f03fc 0xb2b0a000 0xb2b53800 0xbab5a000 + 0xbab54800 0x86b1a800 0x9ad3a000 0x82d6a800 + 0xa6f41800 0xb3061000 0xb3251800 0x87397800 + 0x8744c000 0x8746d000 0x836e6800 0xb39bd800 + 0xb79cd800 0x8381e000 0xb3afb800 0xbbbdb800 + 0x83bd7000 0xa3dde000 0xabde1000 0xb0000800 + 0xa800a800 0xb0000800 0xa800b000 0xb0000800 + 0xa800b800 0xb0000800 0xa800c000 0xb0000800 + 0xa800c800 0xb0000800 0xa800d000 0xb0000800 + 0xa800d800 0xb0000800 0xa800e000 0xb0000800 + 0xa800e800 0xb0000800 0xa800f000 0x641f03fc + 0xe43f0003 0xe8410004 0xe462ffff 0xe063000f + 0xc0830010 0xb0000800 0xa8000800 0xb0000800 + 0xa8001000 0xb0000800 0xa8001800 0xb0000800 + 0xa8002000 0x641f03fc 0xc4a4ffe0 0xd0c5003f + 0xc0c6007e 0xd4e60080 0xc4e7ff02 0xd91f0007 + 0xe50801fe 0xd12801fe 0xc12903ff 0xd54903fe + 0xe94a07ff 0xd96a07fe 0xe96b0fff 0xf18b0001 + 0xe98c0001 0xb0000800 0xa8002800 0xb0000800 + 0xa8003000 0xb0000800 0xa8003800 0xb0000800 + 0xa8004000 0xb0000800 0xa8004800 0xb0000800 + 0xa8005000 0xb0000800 0xa8005800 0xb0000800 + 0xa8006000 0x641f03fc 0xc1bfffff 0xf5ad0012 + 0xc1cd4000 0xc1ee0001 0xc1ef7fff 0xc21fffff + 0xf610000f 0xc63f4000 0xf631000e 0xf2510001 + 0xc2520001 0xf2720001 0xc2730001 0xb0000800 + 0xa8006800 0xb0000800 0xa8007000 0xb0000800 + 0xa8007800 0xb0000800 0xa8008000 0xb0000800 + 0xa8008800 0xb0000800 0xa8009000 0xb0000800 + 0xa8009800 0xb0000800 0xa800a000 0x641f03fc + 0xc69f0001 0xfa94001f 0xf694000b 0xfab4000c + 0xf2b5000d 0xc2b51fff 0xe2d5ffff 0xf2d60001 + 0xc2d60001 0xf2f60001 0xc6f7ffff 0xe71f03ff + 0xf318000f 0xeb187fff 0xc73f0001 0xf7390006 + 0xc75f0001 0xf75a0005 0xc77f0001 0xf77b0004 + 0xc79f0001 0xf79c0003 0xc7bf0001 0xf7bd0002 + 0xc7df0001 0xf7de0001 0xb0000800 0xa800a800 + 0xb0000800 0xa800b000 0xb0000800 0xa800b800 + 0xb0000800 0xa800c000 0xb0000800 0xa800c800 + 0xb0000800 0xa800d000 0xb0000800 0xa800d800 + 0xb0000800 0xa800e000 0xb0000800 0xa800e800 + 0xb0000800 0xa800f000 0x641f03fc 0x605f0000 + 0xb0000800 0xa8001000 0x60610005 0xb0000800 + 0xa8001800 0x641f03fc 0x83fff800 0x83fff800 + 0x83fff800 0x83fff800 0x83fff800 0x83fff800 + 0x83fff800 0x83fff800 0x83fff800 0x83fff800 + 0xffffffff 0xffffffff 0xffffffff 0xffffffff + ) Vclk clk 0 pulse(3.3,0,49.9ns,.1ns,.1ns,49.9ns,100ns) Vreset reset 0 pwl(0ns 3.3v, 101ns 3.3v, 101.1ns 0v) * Run the simulation for 243 cycles .tran 24300ns * Some useful plots... you can plot additional signals by specifying * the appropriate .plot commands in your main netlist file. .plotdef reg R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 + R16 R17 R18 R19 R20 R21 R22 R23 R24 R25 R26 R27 R28 R29 R30 R31 .plot clk .plot reset .plot ia[31:0] .plot id[31:0] .plot ma[31:0] .plot moe .plot mrd[31:0] .plot wr .plot mwd[31:0] .plot betaop(id[31:26]) .plot reg(id[20:16]) .plot reg(id[15:11]) .plot reg(id[25:21])