Readings

The assigned readings are from the course textbook:

Fonstad, Clifton. Microelectronic Devices and Circuits, 2006 Electronic Edition. Available online at DSpace@MIT.

Abbreviations

TE = thermal equilibrium
MOS = metal-on-silicon
MOSFET = metal-oxide-semiconductor field-effect transistor
BJT = bipolar junction transistor
CMOS = complementary metal-oxide-semiconductor
CS = common source
OCTC = open circuit time constant


LEC # TOPICS READINGS
1 Introduction to semiconductors, doping, generation/recombination, TE carrier concentrations. Carrier dynamics and transport: drift. Chapter 1; Chapter 2; Section 3.1
2 Excess populations and minimum carrier lifetime, photoconductivity. Non-uniform concentrations and diffusion. Fick's first and second laws. Chapter 3; Section 4.1
3 The five basic equations. Device structures in TE: carriers and electrostatic potential; the 60 mV rule. Poisson's equation (PE). Sections 4.2 and 4.3; Chapter 6
4 P-n junctions in thermal equilibrium and under reverse bias, the depletion approximation (DA), comparison to PE solution. Sections 7.1 and 7.2
5 Review reverse biased junctions. Consider forward bias and the special case of minority carrier injection into quasineutral regions. Section 5.1
6 Forward biased p-n junctions: carrier injection, i-v characteristics (ideal and real; forward and reverse). Engineering carrier injection. Section 7.3
7 Bipolar junction transistors: two coupled diodes, terminal characteristics, regions of operation Section 8.1
8 Solar cells and LEDs (light emitting diodes). Sections 7.5 and 7.6
9 MOS capacitors: the DA applied to two-terminal MOS capacitor accumulation, depletion, and inversion; VFB, VT, QA, and QN Sections 9.1, 9.2, 9.3, and 9.4
10 The three-terminal MOS capacitor. MOSFETs: begin gradual channel approximation (GCA) using DA and ignoring subthreshold carriers. Sections 9.3 and 9.4; Section 10.1.1 (a)
11 Complete GC/DA model for iDS: saturation, channel length modulation. Output characteristics; regions of operation. Section 10.1.1 (a)
12 Subthreshold operation of MOSFETs. Development of model; compare to full numerical solution. Compare to/contrast with BJTs.
13 Linear equivalent circuits for MOSFETs and BJTs at low and high frequency; transconductance of subthreshold MOSFETs. Section 10.1.2 (a) and (c)
14 Logic inverter basics. Introduction to CMOS: transfer characteristics, noise margins, optimal device sizing. Section 15.1
15 CMOS analysis, continued: switching delays, power dissipation, speed/power trade-offs. Section 15.2.4
16 CMOS analysis, continued: subthreshold leakage, scaling rules, and where it is all going.
17 Linear amplifier basics: performance metrics, current source biasing, current mirrors, mid-band range, two-port representation. Sections 11.1 and 11.2
18 Single-transistor building block stages: common-source, common-gate, and common-drain (follower) stages; characteristics and features. Section 11.4
19 Differential amplifiers: large signal transfer characteristics; small signal analysis using common- and difference-mode inputs. Sections 12.1, 12.2, and 12.3
20 Multi-stage amplifiers I: cascading diff stages; current source biasing; output stages. Sections 12.4 and 12.5
21 Multi-stage amplifiers II: active loads, biasing for maximum gain, input and output swings. Chapter 13
22 Multi-stage amplifiers III: examples, stage selection, speciality stages, looking at a commercial op-amp schematic. Begin frequency response. Chapter 13; Section 14.2.1
23 Frequency response of CS amplifiers, the Miller effect. Intrinsic frequency limitations of MOSFETs. Biasing to maximize speed, power trade-off. Sections 14.2.2 and 14.3
24 OCTC method for estimating frequency response. Subthreshold amplifiers for ultra-lower power electronics, frequency performance. Section 14.1
25 MOS imagers. Semester wrap-up; life after 6.012.