Theory of Parallel Hardware (SMA 5511)

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Course logo. (Image courtesy of Charles Leiserson.)

Instructor(s)

MIT Course Number

6.896

As Taught In

Spring 2004

Level

Graduate

Cite This Course

Course Features

Course Description

6.896 covers mathematical foundations of parallel hardware, from computer arithmetic to physical design, focusing on algorithmic underpinnings. Topics covered include: arithmetic circuits, parallel prefix, systolic arrays, retiming, clocking methodologies, boolean logic, sorting networks, interconnection networks, hypercubic networks, P-completeness, VLSI layout theory, reconfigurable wiring, fat-trees, and area-time complexity.

This course was also taught as part of the Singapore-MIT Alliance (SMA) programme as course number SMA 5511 (Theory of Parallel Hardware).

Kuszmaul, Bradley, Charles Leiserson, and Michael Bender. 6.896 Theory of Parallel Hardware (SMA 5511), Spring 2004. (MIT OpenCourseWare: Massachusetts Institute of Technology), http://ocw.mit.edu/courses/electrical-engineering-and-computer-science/6-896-theory-of-parallel-hardware-sma-5511-spring-2004 (Accessed). License: Creative Commons BY-NC-SA


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