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In this problem, we are given
a function Z equal to ((A OR B)

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AND C), the whole thing negated.

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We are then asked to
produce a CMOS circuit that

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implements the function Z.

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We know that our CMOS
circuits consists

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of a pull-down circuit
made up purely of NFETs,

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and it is called pull-down
because if it is on,

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it connects the output to ground
to produce a low (or 0) output.

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We also have a pull-up circuit
made up purely of PFETs,

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and it is called a pull-up
because if it is on,

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it connects the output to Vdd
to produce a high (or 1) output.

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If Z = NOT((A OR B) AND C),
then NOT(Z) = ((A OR B) AND C).

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To draw the pull-down
portion of this circuit,

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we take a look at when the
function produces Z = 0.

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This occurs when ((A
or B) and C) equals 1,

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so the pull-down circuitry
should be on when ((A or B)

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and C) equals 1.

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So (A OR B) = 1 and C = 1.

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This means that we want a
parallel(A,B) in series with C

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circuit for our pull-down.

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The parallel(A,B) corresponds to
(A OR B) = 1 because if either

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A or B equals 1 then we have
a path from Z to the bottom

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of the parallel circuitry.

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Then if C is also 1, we complete
our path between Z and ground.

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So, if either (A = 1 and C
= 1) or (B = 1 and C = 1),

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Z is pulled down to ground
and produces a 0 output.

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To generate our
pull-up, we simply

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replace parallel
circuits with series,

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and series with parallel.

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This will ensure that whenever
our pull-down circuit is off,

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our pull-up circuit is on.

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So our pull-up circuitry is
series(A,B) in parallel with C.

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To convince ourselves
that this is in fact

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the correct pull-up circuit,
we know that the pull-up

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must make Z equal to 1.

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Z = 1 if ((A OR B) AND C) the
whole thing negated equals 1,

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or ((A OR B) AND C) = 0.

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This is true when either
(A OR B) = 0 or C = 0.

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This means that either A =
0 and B = 0 OR just C = 0.

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Pull-up circuits use PFETs which
are on when the input is low

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(or 0).

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So the equivalent circuit for
this is series(A,B) ORed with C

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which is equal to series(A,B)
in parallel with C.