WEBVTT
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PROFESSOR: Instead of building
all of our logic functions
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directly in CMOS,
it is easier for us
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to create a higher
level of abstraction
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known as Boolean gates,
which represent CMOS gates.
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Each gate is assigned a
symbol, which can then
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be used in schematic diagrams
that combine multiple logic
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gates together.
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In order to be
able to understand
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what function any combination
of logic gates will produce,
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we will begin by reviewing
the basic gates together
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with the truth tables
that define their logic.
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We begin with an inverter.
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An inverter is a gate
that has a single input
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and a single output.
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The output is simply the
inverse of the input.
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When A equals 0, Y equals 1.
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And when A equals 1, Y equals 0.
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Next, we examine
AND and OR gates.
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The AND function expects all
of its inputs to be true,
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or 1, in order to produce
a 1 as its output.
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So its truth table is for A,
B equals 0, 0, Y equals 0.
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For A, B equals
0, 1, Y equals 0.
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For A, B equals
1, 0, y equals 0.
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And for A, B equal
1, 1, Y equals 1.
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The OR function just
expects at least one
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of its inputs to be true
in order to produce a 1
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as its output.
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So for A, B equals
0, 0, Y equals 0.
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But for the other three
combinations, Y equals 1.
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NAND and NOR gates
simply produce
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the inverse of AND and OR.
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The reason that we like to
work with NAND and NOR gates is
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because they are
inverting gates,
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and they can be implemented
as a single CMOS gate,
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whereas the AND and
OR gates cannot.
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Finally, the last basic
gate is an exclusive or.
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The exclusive or
produces a 1 output
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if exactly one of its two
inputs is a 1 and 0 otherwise.
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So for A, B equals
0, 0, Y equals 0.
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For A, B equals
0, 1, Y equals 1.
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For A, B equal to
1, 0, Y equals 1.
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And for A, B equals
to 1, 1, y equals 0.
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The output of one Boolean
gate can be used as an input
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to another Boolean gate.
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So multiple gates can
be used to generate
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more complex functions.
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For example, here
we have a circuit
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that consists of two
inputs and six gates, which
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are an inverter, an AND
gate, and OR gate, two NOR
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gates, and 1 NAND gate.
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In order to figure out what
this combination of gates
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produces as its output,
we can work incrementally
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through the circuit.
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We begin by enumerating all our
choices of inputs for A and B.
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We know that the
output of the inverter
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is the complement of B. The AND
and OR gates use the A and B
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inputs directly.
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So since we just reviewed
what AND and OR gates produce,
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we can fill in these
columns, as well.
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Next, we want to see what
our first NOR gate produces.
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Its inputs are A and
the complement of B.
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We walk through each of
the input combinations
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and determine the corresponding
output for that gate.
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For input 0, 1, the output is 0.
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For 0, 0, the output is 1.
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For inputs 1, 1,
the output is 0.
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And for input 1,
0, the output is 0.
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In the same manner, we
evaluate the outputs
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for our second NOR gate.
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Its inputs are the outputs of
the first NOR gate and the AND
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gate.
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Again, we simply walk through
each combination of inputs
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and specify the outputs
produced by the second NOR gate.
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When both inputs are
0, the output is 1.
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When one input is 0
and the other is a 1,
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the output is a 0.
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Finally, we take those
outputs, together
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with the outputs of the
OR gate, and generate
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the final output of the circuit
at the output of the NAND gate.
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Here, when both inputs
are 1, we get a 0 output.
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Otherwise, the output is a 1.
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This NAND column
of our truth table
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is the resulting output H.
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Now that we have
evaluated what our output
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H is equal to for each
combination of A and B,
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we can represent the circuit
as a single truth table
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whose inputs are A
and B and whose output
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is H. At this point, we
can express the function
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H as a combination of all the
cases that make H equal to 1.
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This occurs if A and
B are both equal to 0,
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or if A equals 0 and B
equals 1, or if A and B are
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both equal to 1.
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This can be expressed as
a Boolean logic expression
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as follows.
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H equals not A
not B, or not A B,
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or A B. This notation is called
the sum of products notation.
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Any sum of products can be
converted into a simple gate
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representation of the function
using only inverters, AND,
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and OR gates by having one large
OR gate that receives as input
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one AND gate per product term.
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Inverters are used as
needed to complement
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the inputs to the AND gates.
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One thing that's
interesting to note
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about this combination
of gates is
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that it can easily be
converted into a circuit that
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consists purely of NAND gates.
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The way to do this is
to realize that if you
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take the output of a
gate and invert it twice,
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you've produced the
original output.
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This means that we can add
two inverters between each AND
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output and OR input.
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We can draw these
inverters as bubbles,
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which represent
inversion, where we place
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one bubble on the
output of the AND gate
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and the other bubble at
the input to the OR gate.
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We know that an AND gate
followed by an inversion
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is simply a NAND gate.
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We also know that an inverter
is equivalent to a NAND gate
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with both of its
inputs tied together.
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In addition, using
De Morgan's law,
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we know that not A or not B is
equivalent to not of A and B.
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This means that the bubbles
followed by the OR gate
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can also be replaced
with a NAND gate,
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thus arriving at our
equivalent circuit
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representation consisting
purely of NAND gates.
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The advantage of using NAND
gates to implement the circuit
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is that NAND gates
are inverting logic,
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where each gate can be
implemented as a single CMOS
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gate.
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All functions can be expressed
as a combination of NAND gates.
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So a NAND gate is
considered a universal gate.
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NOR gates are also
universal and can be
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used to express any function.
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Furthermore, any
circuit that can
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be used to implement
any other function
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is also considered universal.
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To determine if a
gate G is universal,
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one needs to check if one can
convert G into either a NAND
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or NOR gate by simply using
one or more copies of G
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together with low and
high constant inputs.