Massachusetts Institute of Technology
Department of Electrical Engineering and Computer Science
6.111 - Introductory Digital Systems Laboratory

CPLD Module

The CPLD module comprises of four interconnected Cypress 374I CPLD's that can be accessed via the kit's NuBus interface and 50-pin connectors. The state of the I/O lines of the NuBus interconnects are displayed on the HEX LED's while the I/O lines of the 50 pin connector extend directly to the inputs of the Logic Analyzer.

The diagram below shows the architecture of the module and its interface to the kit.

Figure 1: System Diagram

The major components of the module can be categorized into the NuBus Interface, the 50-pin connector Interface, the Interconnect Bus, the Serial Interface, the Programming Interface and the Clocking Scheme.



NuBus Interface

31 I/O pins of each CPLD are interconnected and extended to the NuBus connector. For example, IO-0 of all 4 CPLD's are tied together to NuBus Address A0. Table 1 elaborates these interconnections.