WEBVTT 00:00:00.000 --> 00:00:02.375 align:middle line:90% 00:00:02.375 --> 00:00:03.325 align:middle line:90% [SQUEAKING] 00:00:03.325 --> 00:00:04.275 align:middle line:90% [RUSTLING] 00:00:04.275 --> 00:00:09.030 align:middle line:90% [CLICKING] 00:00:09.030 --> 00:00:12.180 align:middle line:84% DAVID PERREAULT: OK, so why don't we get started? 00:00:12.180 --> 00:00:16.260 align:middle line:84% So we've been talking about single phase DC-to-AC 00:00:16.260 --> 00:00:18.630 align:middle line:84% converters, and I actually haven't said which 00:00:18.630 --> 00:00:19.960 align:middle line:90% direction power is flowing. 00:00:19.960 --> 00:00:21.630 align:middle line:84% So the circuits that we're talking about 00:00:21.630 --> 00:00:25.180 align:middle line:84% can generally flow power in both directions. 00:00:25.180 --> 00:00:29.220 align:middle line:84% And so a general single-phase, full-bridge voltage source 00:00:29.220 --> 00:00:33.510 align:middle line:84% inverter looks something like this, 00:00:33.510 --> 00:00:36.990 align:middle line:84% And you would usually put a DC bus capacitor here 00:00:36.990 --> 00:00:41.640 align:middle line:84% to help with high-frequency ripple currents. 00:00:41.640 --> 00:00:51.290 align:middle line:84% And you have four switches like this. 00:00:51.290 --> 00:00:53.210 align:middle line:84% And then you will put your output here 00:00:53.210 --> 00:00:55.370 align:middle line:84% and maybe there's going to be some load 00:00:55.370 --> 00:00:57.320 align:middle line:90% network that goes right here. 00:00:57.320 --> 00:01:00.560 align:middle line:84% And in addition to that-- and we'll talk to this-- maybe 00:01:00.560 --> 00:01:03.950 align:middle line:84% sometimes you would have some kind of current sensor 00:01:03.950 --> 00:01:06.590 align:middle line:84% right here in order to sense what 00:01:06.590 --> 00:01:09.170 align:middle line:84% the output current is if you wanted to use that information. 00:01:09.170 --> 00:01:12.090 align:middle line:84% I just thought I'd show you this as an example. 00:01:12.090 --> 00:01:16.760 align:middle line:84% This is a 33-kilowatt single-phase inverter made out 00:01:16.760 --> 00:01:17.270 align:middle line:90% of-- 00:01:17.270 --> 00:01:19.153 align:middle line:90% using silicon carbide FETs. 00:01:19.153 --> 00:01:21.860 align:middle line:90% 00:01:21.860 --> 00:01:27.110 align:middle line:84% You can see the very tight loop bus capacitors in here. 00:01:27.110 --> 00:01:29.280 align:middle line:90% These are ceramic capacitors. 00:01:29.280 --> 00:01:31.190 align:middle line:90% These are film bus capacitors. 00:01:31.190 --> 00:01:34.480 align:middle line:84% And by the way, this inverter was built by Dave Otten at MIT. 00:01:34.480 --> 00:01:37.110 align:middle line:90% 00:01:37.110 --> 00:01:40.170 align:middle line:84% What you have here is a full bridge-- 00:01:40.170 --> 00:01:42.450 align:middle line:84% each using a bunch of parallel devices for each 00:01:42.450 --> 00:01:45.180 align:middle line:84% switch because there's a high-power design. 00:01:45.180 --> 00:01:48.552 align:middle line:84% And basically, you have one set of switches, 00:01:48.552 --> 00:01:50.010 align:middle line:84% and on the other side of the board, 00:01:50.010 --> 00:01:53.415 align:middle line:84% another set of switches that form one half bridge, and then 00:01:53.415 --> 00:01:55.290 align:middle line:84% the other pair on the other side of the board 00:01:55.290 --> 00:01:57.690 align:middle line:90% forms a second half bridge. 00:01:57.690 --> 00:02:02.160 align:middle line:84% Air flows down the board this way to cool it. 00:02:02.160 --> 00:02:05.040 align:middle line:84% You can see things like gate driver chips 00:02:05.040 --> 00:02:08.520 align:middle line:84% along here that are distributed to run the parallel gate drives. 00:02:08.520 --> 00:02:11.808 align:middle line:84% There's also, on this side of the board, a current sensor. 00:02:11.808 --> 00:02:13.600 align:middle line:84% That's the current sensor we'll talk about. 00:02:13.600 --> 00:02:15.900 align:middle line:84% So basically, this is precisely the structure 00:02:15.900 --> 00:02:17.110 align:middle line:90% we've been talking about. 00:02:17.110 --> 00:02:20.940 align:middle line:84% And as I said, this is about a 33-kilowatt block that runs off 00:02:20.940 --> 00:02:25.150 align:middle line:84% of a 720-volt bus for a motor drive application. 00:02:25.150 --> 00:02:26.470 align:middle line:90% So you can pass that around. 00:02:26.470 --> 00:02:27.700 align:middle line:90% Just take a look at it. 00:02:27.700 --> 00:02:30.360 align:middle line:90% Try not to drop it, however. 00:02:30.360 --> 00:02:34.290 align:middle line:84% I'll be in trouble if you guys drop it. 00:02:34.290 --> 00:02:37.620 align:middle line:84% So that's the hardware structure. 00:02:37.620 --> 00:02:40.290 align:middle line:84% So far, we've been talking about different ways 00:02:40.290 --> 00:02:44.760 align:middle line:84% we can start to approximate a sine wave better and better. 00:02:44.760 --> 00:02:47.405 align:middle line:84% And as I said, in a lot of applications, 00:02:47.405 --> 00:02:48.780 align:middle line:84% a sine wave is what you're trying 00:02:48.780 --> 00:02:52.170 align:middle line:84% to synthesize because, for example, in that application, 00:02:52.170 --> 00:02:54.510 align:middle line:90% the motor is expecting-- 00:02:54.510 --> 00:02:57.870 align:middle line:84% has sine wave back-EMF, and you want sine wave currents 00:02:57.870 --> 00:02:58.750 align:middle line:90% going into the motor. 00:02:58.750 --> 00:03:00.930 align:middle line:84% So you're trying to synthesize something 00:03:00.930 --> 00:03:07.200 align:middle line:84% that approaches a sine wave such that this voltage, Vx, has 00:03:07.200 --> 00:03:10.890 align:middle line:84% a sine wave voltage component plus a bunch of high frequency 00:03:10.890 --> 00:03:12.460 align:middle line:90% switching content. 00:03:12.460 --> 00:03:18.960 align:middle line:84% And we said there's different ways we could try to make that. 00:03:18.960 --> 00:03:22.680 align:middle line:84% work better in terms of getting close to a sine wave 00:03:22.680 --> 00:03:23.710 align:middle line:90% by switching. 00:03:23.710 --> 00:03:27.286 align:middle line:84% One technique we talked about was harmonic elimination. 00:03:27.286 --> 00:03:33.240 align:middle line:90% 00:03:33.240 --> 00:03:36.130 align:middle line:90% And the idea is this. 00:03:36.130 --> 00:03:42.710 align:middle line:84% Suppose I would make my voltage, Vx, here have a bunch of pulses. 00:03:42.710 --> 00:03:46.060 align:middle line:84% So if I imagine that the low-frequency content was going 00:03:46.060 --> 00:03:47.890 align:middle line:84% to try to look like some sine wave 00:03:47.890 --> 00:03:51.160 align:middle line:84% and I'm switching between plus VDC, 00:03:51.160 --> 00:03:54.550 align:middle line:84% 0, and minus VDC, then maybe what I would do 00:03:54.550 --> 00:03:56.920 align:middle line:84% is I would have certain number of pulses, 00:03:56.920 --> 00:04:01.480 align:middle line:84% and I would control the angle of those pulses very carefully. 00:04:01.480 --> 00:04:05.860 align:middle line:84% And if I do that and I want to make my waveforms half-wave 00:04:05.860 --> 00:04:11.680 align:middle line:84% symmetric so that I get no even harmonics-- 00:04:11.680 --> 00:04:15.680 align:middle line:84% so we would come along here, and we would do this. 00:04:15.680 --> 00:04:18.880 align:middle line:84% And this would be my pulsing waveform. 00:04:18.880 --> 00:04:21.500 align:middle line:90% 00:04:21.500 --> 00:04:25.130 align:middle line:84% And what we would do is we would pick these angles 00:04:25.130 --> 00:04:30.320 align:middle line:84% very specifically in order to kill off harmonic content 00:04:30.320 --> 00:04:32.660 align:middle line:84% because we said we can figure out the harmonic 00:04:32.660 --> 00:04:37.750 align:middle line:84% content by multiplying the PWM waveform by the sine-- 00:04:37.750 --> 00:04:40.070 align:middle line:84% if it's an odd waveform at the correct frequency, 00:04:40.070 --> 00:04:41.930 align:middle line:90% integrating them when I get 0. 00:04:41.930 --> 00:04:44.390 align:middle line:90% That harmonic is not there. 00:04:44.390 --> 00:04:46.520 align:middle line:84% And what that technique tends to do-- 00:04:46.520 --> 00:04:54.110 align:middle line:84% if I looked at the magnitude of Vx versus frequency, 00:04:54.110 --> 00:04:58.250 align:middle line:90% I will have some fundamental. 00:04:58.250 --> 00:05:01.710 align:middle line:84% And I want that because that's what I'm trying to approximate. 00:05:01.710 --> 00:05:03.830 align:middle line:84% And then I'll have some harmonic content 00:05:03.830 --> 00:05:07.160 align:middle line:84% that depends on the angles, and I can get rid of the evens 00:05:07.160 --> 00:05:09.840 align:middle line:90% easily. 00:05:09.840 --> 00:05:14.160 align:middle line:84% But I might suppress one or more odd harmonics. 00:05:14.160 --> 00:05:16.860 align:middle line:84% And each pulse and a half cycle I can usually suppress, 00:05:16.860 --> 00:05:18.090 align:middle line:90% one harmonic. 00:05:18.090 --> 00:05:20.340 align:middle line:84% What I do get, however, when I do 00:05:20.340 --> 00:05:24.390 align:middle line:84% a lot of switching up and down is when I go out in frequency, 00:05:24.390 --> 00:05:26.580 align:middle line:84% I will get an increase in the content, 00:05:26.580 --> 00:05:29.670 align:middle line:84% because there's a lot of up and down switching, 00:05:29.670 --> 00:05:33.580 align:middle line:84% a lot of high-frequency content in this V sub x waveform. 00:05:33.580 --> 00:05:37.300 align:middle line:84% But if I'm running that through a filter-- 00:05:37.300 --> 00:05:39.580 align:middle line:90% if this. 00:05:39.580 --> 00:05:44.990 align:middle line:84% load is, say, a low-pass filter and it's doing this versus 00:05:44.990 --> 00:05:46.520 align:middle line:90% frequency-- 00:05:46.520 --> 00:05:53.540 align:middle line:84% so this is the magnitude of H of j. omega, 00:05:53.540 --> 00:05:56.400 align:middle line:84% It's very easy to filter off the high frequency stuff. 00:05:56.400 --> 00:05:58.590 align:middle line:84% It's hard to filter off the lower frequency stuff. 00:05:58.590 --> 00:06:01.310 align:middle line:84% So we basically trade low-frequency content 00:06:01.310 --> 00:06:04.580 align:middle line:84% for high-frequency content, and it makes a good trade. 00:06:04.580 --> 00:06:08.420 align:middle line:84% So that's harmonic elimination, and you can do that just 00:06:08.420 --> 00:06:11.790 align:middle line:90% with this structure. 00:06:11.790 --> 00:06:16.196 align:middle line:84% The other trick we saw last class is harmonic cancellation. 00:06:16.196 --> 00:06:24.770 align:middle line:90% 00:06:24.770 --> 00:06:27.080 align:middle line:90% And the idea is-- 00:06:27.080 --> 00:06:29.450 align:middle line:84% suppose I could take multiple waveforms 00:06:29.450 --> 00:06:33.450 align:middle line:84% and add them up and phase shift them a little bit. 00:06:33.450 --> 00:06:35.770 align:middle line:84% I'll phase shift the fundamental by a little bit, 00:06:35.770 --> 00:06:39.070 align:middle line:84% but some harmonic of interest by 180 degrees 00:06:39.070 --> 00:06:41.595 align:middle line:84% so when I add them up, I kill off harmonics, 00:06:41.595 --> 00:06:46.990 align:middle line:84% And we saw one example of this was something like this. 00:06:46.990 --> 00:06:52.560 align:middle line:84% If I took two waveforms that have plus 0 minus and I phase 00:06:52.560 --> 00:06:54.060 align:middle line:84% shift them, I can get something that 00:06:54.060 --> 00:06:56.980 align:middle line:90% looks like this, for example. 00:06:56.980 --> 00:07:02.410 align:middle line:84% So it might go up to one level, another level, 00:07:02.410 --> 00:07:10.260 align:middle line:84% something like this, and so forth. 00:07:10.260 --> 00:07:14.030 align:middle line:84% And this one-- you can see, wow, that really does 00:07:14.030 --> 00:07:18.660 align:middle line:84% start to look like some kind of sine wave very closely. 00:07:18.660 --> 00:07:21.395 align:middle line:90% 00:07:21.395 --> 00:07:24.680 align:middle line:84% So harmonic cancellation-- actually, 00:07:24.680 --> 00:07:28.640 align:middle line:84% I can view the six-step wave-- or the stepped waveform that we 00:07:28.640 --> 00:07:29.240 align:middle line:90% said-- 00:07:29.240 --> 00:07:34.160 align:middle line:84% if I have no third harmonic, the waveform looked like this. 00:07:34.160 --> 00:07:36.530 align:middle line:84% The Vx waveform looked like this. 00:07:36.530 --> 00:07:39.500 align:middle line:84% This is actually two square waves 00:07:39.500 --> 00:07:42.980 align:middle line:84% phase shifted just such that when I take their difference, 00:07:42.980 --> 00:07:45.780 align:middle line:90% I kill off the third harmonic. 00:07:45.780 --> 00:07:47.612 align:middle line:84% So we're already doing that with this. 00:07:47.612 --> 00:07:49.820 align:middle line:84% But if I want to do it on a more sophisticated level, 00:07:49.820 --> 00:07:51.830 align:middle line:84% I need more sophisticated hardware 00:07:51.830 --> 00:07:56.100 align:middle line:84% that can let me synthesize this more accurate waveform. 00:07:56.100 --> 00:07:59.370 align:middle line:84% If I can do that, the beauty of harmonic cancellation 00:07:59.370 --> 00:08:01.567 align:middle line:84% is that harmonic cancellation not only 00:08:01.567 --> 00:08:03.900 align:middle line:84% kills the low frequency harmonics that I want to cancel, 00:08:03.900 --> 00:08:06.510 align:middle line:84% but it tends to cancel multiples of that. 00:08:06.510 --> 00:08:09.420 align:middle line:84% So we can get-- if I do a lot of harmonic cancellation, 00:08:09.420 --> 00:08:13.360 align:middle line:84% I can get a waveform that looks very much like a sine wave, 00:08:13.360 --> 00:08:17.110 align:middle line:84% whereas this illuminated waveform-- 00:08:17.110 --> 00:08:19.610 align:middle line:84% it's kind of ugly, and I'm just taking advantage of the fact 00:08:19.610 --> 00:08:23.400 align:middle line:84% that I can filter the high-frequency junk out. 00:08:23.400 --> 00:08:26.610 align:middle line:84% And there's nothing that says we can't combine those two. 00:08:26.610 --> 00:08:28.660 align:middle line:90% In fact, people do. 00:08:28.660 --> 00:08:31.320 align:middle line:84% So the challenge with harmonic cancellation 00:08:31.320 --> 00:08:35.159 align:middle line:84% is now I need a means to synthesize-- maybe this is VDC. 00:08:35.159 --> 00:08:40.799 align:middle line:84% Maybe this is VDC over 2 and 0 and minus VDC 00:08:40.799 --> 00:08:42.260 align:middle line:90% over 2 and minus VDC. 00:08:42.260 --> 00:08:45.570 align:middle line:84% I've got to be able to synthesize more effective levels 00:08:45.570 --> 00:08:47.800 align:middle line:90% to make that work. 00:08:47.800 --> 00:08:49.905 align:middle line:90% Any questions about that? 00:08:49.905 --> 00:08:54.090 align:middle line:90% 00:08:54.090 --> 00:08:57.480 align:middle line:84% So last class I showed you a transformer-coupled converter 00:08:57.480 --> 00:09:01.790 align:middle line:84% that could synthesize these waveforms. 00:09:01.790 --> 00:09:05.780 align:middle line:84% And perhaps the theme of today's class is-- 00:09:05.780 --> 00:09:08.000 align:middle line:84% there's a lot of ways you can do things, 00:09:08.000 --> 00:09:11.000 align:middle line:84% and people do do things because they have different advantages 00:09:11.000 --> 00:09:12.300 align:middle line:90% and different circumstances. 00:09:12.300 --> 00:09:14.510 align:middle line:84% So let me show you some additional ways 00:09:14.510 --> 00:09:16.940 align:middle line:84% one might synthesize a circuit that 00:09:16.940 --> 00:09:19.526 align:middle line:84% can make these kind of fancier waveforms. 00:09:19.526 --> 00:09:25.060 align:middle line:90% 00:09:25.060 --> 00:09:33.030 align:middle line:84% Let's just consider-- we might call this, here, a bridge leg 00:09:33.030 --> 00:09:34.730 align:middle line:90% or a half-bridge leg. 00:09:34.730 --> 00:09:38.100 align:middle line:84% And this thing-- in this context, 00:09:38.100 --> 00:09:48.570 align:middle line:84% this circuit can synthesize a V01 that's either VDC or 0. 00:09:48.570 --> 00:09:53.310 align:middle line:84% So this bridge leg can basically synthesize two levels. 00:09:53.310 --> 00:09:55.830 align:middle line:84% And because this leg can synthesize two levels, 00:09:55.830 --> 00:10:00.020 align:middle line:84% this is sometimes called a two level inverter. 00:10:00.020 --> 00:10:05.120 align:middle line:84% A circuit that could synthesize for one leg, 0, 1/2, and full, 00:10:05.120 --> 00:10:07.850 align:middle line:84% might be called a three-level converter. 00:10:07.850 --> 00:10:11.420 align:middle line:84% Kind of confusing terminology, but that's the way they do it. 00:10:11.420 --> 00:10:12.702 align:middle line:90% How could I do that? 00:10:12.702 --> 00:10:14.160 align:middle line:84% I showed you one circuit last time. 00:10:14.160 --> 00:10:17.730 align:middle line:84% Let's talk about a bridge leg that might do this. 00:10:17.730 --> 00:10:20.120 align:middle line:90% And here's one way to do it. 00:10:20.120 --> 00:10:37.460 align:middle line:84% This is called a neutral-point clamped inverter or an NPC 00:10:37.460 --> 00:10:38.610 align:middle line:90% inverter. 00:10:38.610 --> 00:10:43.220 align:middle line:84% This general technique was proposed in about 1980 00:10:43.220 --> 00:10:46.640 align:middle line:90% by a guy named Nabae in Japan. 00:10:46.640 --> 00:10:48.180 align:middle line:90% And here's what it looks like. 00:10:48.180 --> 00:10:56.800 align:middle line:84% Suppose I took my bus and I split it into two by just, 00:10:56.800 --> 00:10:59.990 align:middle line:84% basically, putting a big tap point on my capacitor here. 00:10:59.990 --> 00:11:01.840 align:middle line:90% So here's C big. 00:11:01.840 --> 00:11:03.580 align:middle line:90% Here's C big. 00:11:03.580 --> 00:11:07.690 align:middle line:84% Let me assume that this is about DC over 2, 00:11:07.690 --> 00:11:11.410 align:middle line:84% or I will make sure it stays near VDC over 2. 00:11:11.410 --> 00:11:14.630 align:middle line:84% Then maybe what I could do is do this. 00:11:14.630 --> 00:11:27.880 align:middle line:90% I will have S1, S2, S3, and S4. 00:11:27.880 --> 00:11:29.878 align:middle line:84% I'm going to have a stack of switches. 00:11:29.878 --> 00:11:32.170 align:middle line:84% And then I'm going to have another one that-- here, I'm 00:11:32.170 --> 00:11:33.103 align:middle line:90% going to call it S6. 00:11:33.103 --> 00:11:37.290 align:middle line:90% 00:11:37.290 --> 00:11:41.390 align:middle line:90% And this is S5. 00:11:41.390 --> 00:11:45.438 align:middle line:84% So I'm going to have six switches here. 00:11:45.438 --> 00:11:48.730 align:middle line:84% I can also, in some cases, just replace 00:11:48.730 --> 00:11:50.330 align:middle line:90% these two switches with diodes. 00:11:50.330 --> 00:11:52.210 align:middle line:84% And in fact, in the original version, 00:11:52.210 --> 00:11:53.970 align:middle line:90% that's what most people did. 00:11:53.970 --> 00:11:57.430 align:middle line:84% So this one might be called an active neutral-point clamped 00:11:57.430 --> 00:12:00.770 align:middle line:84% inverter because it uses controllable switches here. 00:12:00.770 --> 00:12:02.330 align:middle line:90% You could replace with diodes. 00:12:02.330 --> 00:12:04.360 align:middle line:90% But here's the idea. 00:12:04.360 --> 00:12:06.361 align:middle line:84% Let me think about this output voltage. 00:12:06.361 --> 00:12:07.153 align:middle line:90% I'll call this V01. 00:12:07.153 --> 00:12:10.580 align:middle line:90% 00:12:10.580 --> 00:12:16.520 align:middle line:84% If I turn the following switches on, S1, S2, and S5-- 00:12:16.520 --> 00:12:20.030 align:middle line:90% 00:12:20.030 --> 00:12:24.690 align:middle line:84% oops, S5-- I'm going to turn the top two switches on here-- 00:12:24.690 --> 00:12:26.210 align:middle line:90% V out 1 is just going to be VDC. 00:12:26.210 --> 00:12:29.180 align:middle line:90% 00:12:29.180 --> 00:12:35.232 align:middle line:84% Suppose I turn on S2, S3, S5, S6. 00:12:35.232 --> 00:12:40.410 align:middle line:90% 00:12:40.410 --> 00:12:44.560 align:middle line:84% If these four devices are on, this node 00:12:44.560 --> 00:12:48.420 align:middle line:84% is then, through multiple paths, pinned to the center here. 00:12:48.420 --> 00:12:51.150 align:middle line:90% So then this should be-- 00:12:51.150 --> 00:12:55.860 align:middle line:84% V out should be approximately VDC over 2. 00:12:55.860 --> 00:12:58.085 align:middle line:84% It's going to be this center-point voltage. 00:12:58.085 --> 00:13:00.840 align:middle line:90% 00:13:00.840 --> 00:13:14.680 align:middle line:84% If I then turn on S3, S4, S6 I'm going to get 0 out. 00:13:14.680 --> 00:13:20.800 align:middle line:84% So by picking different switch configurations. 00:13:20.800 --> 00:13:22.780 align:middle line:84% I can make this output voltage either 00:13:22.780 --> 00:13:28.810 align:middle line:84% be plus VDC, plus VDC over 2, or 0. 00:13:28.810 --> 00:13:31.870 align:middle line:84% And if I took two of these things 00:13:31.870 --> 00:13:33.520 align:middle line:84% or I took another set of switches 00:13:33.520 --> 00:13:35.950 align:middle line:84% and tied it to the same center point, 00:13:35.950 --> 00:13:40.210 align:middle line:84% then I could generate this waveform here. 00:13:40.210 --> 00:13:45.090 align:middle line:84% Or I could generate this waveform plus PWM between levels 00:13:45.090 --> 00:13:48.100 align:middle line:84% and combine harmonic elimination and cancellation. 00:13:48.100 --> 00:13:54.150 align:middle line:84% So this is a bridge leg for a so-called three-level inverter. 00:13:54.150 --> 00:13:55.370 align:middle line:90% Any questions about that? 00:13:55.370 --> 00:13:57.960 align:middle line:90% 00:13:57.960 --> 00:13:58.460 align:middle line:90% Yeah. 00:13:58.460 --> 00:14:00.210 align:middle line:90% AUDIENCE: How do turn on S5? 00:14:00.210 --> 00:14:02.370 align:middle line:84% DAVID PERREAULT: Ah, excellent question. 00:14:02.370 --> 00:14:05.790 align:middle line:90% So you don't have to. 00:14:05.790 --> 00:14:08.290 align:middle line:84% But here's the neat thing about this inverter. 00:14:08.290 --> 00:14:11.040 align:middle line:84% In fact, this is one of the key reasons why Nabae came up 00:14:11.040 --> 00:14:15.270 align:middle line:84% with what he was doing originally is the following. 00:14:15.270 --> 00:14:18.450 align:middle line:84% What is the off-state voltage of S1? 00:14:18.450 --> 00:14:25.230 align:middle line:84% Well, if I have this thing tied to the middle point, 00:14:25.230 --> 00:14:28.850 align:middle line:90% S1 only sees VDC over 2. 00:14:28.850 --> 00:14:31.280 align:middle line:90% What about S3 and S4? 00:14:31.280 --> 00:14:35.310 align:middle line:84% If S1 and S2 are on and S5 is on, 00:14:35.310 --> 00:14:40.430 align:middle line:84% that means S3 sees VDC over 2 and S4 sees VDC over 2. 00:14:40.430 --> 00:14:45.680 align:middle line:84% So by turning on the extra switches, S5 and S6, what 00:14:45.680 --> 00:14:48.800 align:middle line:84% I'm really doing-- in addition to providing a path 00:14:48.800 --> 00:14:53.360 align:middle line:84% to the middle, I'm ensuring that every single switch only 00:14:53.360 --> 00:14:56.430 align:middle line:84% is rated for half the switching voltage. 00:14:56.430 --> 00:14:59.190 align:middle line:90% And that's a big deal because-- 00:14:59.190 --> 00:15:01.462 align:middle line:84% like, Nabae liked to work on things like traction, 00:15:01.462 --> 00:15:02.920 align:middle line:84% where the voltages are really high. 00:15:02.920 --> 00:15:04.770 align:middle line:84% And it turns out a lot of times the voltage 00:15:04.770 --> 00:15:06.570 align:middle line:84% you want to use-- you can't buy switches 00:15:06.570 --> 00:15:09.300 align:middle line:84% with high enough rating, You would like to make it bigger, 00:15:09.300 --> 00:15:13.260 align:middle line:84% but nobody makes the semiconductor switch you want. 00:15:13.260 --> 00:15:14.940 align:middle line:84% So if you can build your inverter 00:15:14.940 --> 00:15:17.280 align:middle line:84% with lower rated switches, you've 00:15:17.280 --> 00:15:19.420 align:middle line:90% got a very powerful advantage. 00:15:19.420 --> 00:15:22.590 align:middle line:84% It also turns out that if you double the blocking voltage 00:15:22.590 --> 00:15:28.260 align:middle line:84% of a transistor, typically, the performance is a lot worse. 00:15:28.260 --> 00:15:30.600 align:middle line:84% They're a lot less than half as good, Like, 00:15:30.600 --> 00:15:32.350 align:middle line:84% the resistance way more than doubles. 00:15:32.350 --> 00:15:35.460 align:middle line:84% Usually, it goes as a quadratic, almost, or more. 00:15:35.460 --> 00:15:40.368 align:middle line:84% So you're actually, in fact better having two 600-volt 00:15:40.368 --> 00:15:41.910 align:middle line:84% switches than one 1,200-volts switch, 00:15:41.910 --> 00:15:44.327 align:middle line:84% at least from an on-state resistance and capacitance point 00:15:44.327 --> 00:15:45.480 align:middle line:90% of view. 00:15:45.480 --> 00:15:47.850 align:middle line:84% So it's a more complicated circuit, 00:15:47.850 --> 00:15:50.848 align:middle line:84% but it reduces the stress on the components. 00:15:50.848 --> 00:15:52.890 align:middle line:84% And that's one of the reasons why I was doing it. 00:15:52.890 --> 00:15:55.650 align:middle line:84% And a reason why you would put diodes in here-- 00:15:55.650 --> 00:15:57.540 align:middle line:84% the original flavor of this device-- 00:15:57.540 --> 00:15:59.920 align:middle line:84% basically, just replace this with diodes. 00:15:59.920 --> 00:16:01.677 align:middle line:90% The diodes would turn on-- 00:16:01.677 --> 00:16:03.760 align:middle line:84% depending upon whether current was going this way, 00:16:03.760 --> 00:16:04.620 align:middle line:90% S5 would turn on. 00:16:04.620 --> 00:16:07.360 align:middle line:84% If the current was going this way, S6 would turn on. 00:16:07.360 --> 00:16:10.330 align:middle line:84% So you could use diodes here as well. 00:16:10.330 --> 00:16:13.407 align:middle line:84% It doesn't do as perfect a job of protecting at least one 00:16:13.407 --> 00:16:15.240 align:middle line:84% of the switches if you do that, but it still 00:16:15.240 --> 00:16:17.760 align:middle line:90% tends to work just fine. 00:16:17.760 --> 00:16:18.410 align:middle line:90% great question. 00:16:18.410 --> 00:16:21.350 align:middle line:90% 00:16:21.350 --> 00:16:23.560 align:middle line:90% I should make a couple of notes. 00:16:23.560 --> 00:16:27.270 align:middle line:84% This structure really only works for DC to AC conversion. 00:16:27.270 --> 00:16:28.490 align:middle line:90% Why? 00:16:28.490 --> 00:16:31.430 align:middle line:84% Because what I have to do ultimately is-- 00:16:31.430 --> 00:16:35.620 align:middle line:84% what is the allowable average current into this node 00:16:35.620 --> 00:16:39.092 align:middle line:84% if I want to keep the voltage stable? 00:16:39.092 --> 00:16:40.323 align:middle line:90% AUDIENCE: 0? 00:16:40.323 --> 00:16:41.740 align:middle line:84% DAVID PERREAULT: It's got to be 0. 00:16:41.740 --> 00:16:42.720 align:middle line:90% Right. 00:16:42.720 --> 00:16:43.290 align:middle line:90% Why? 00:16:43.290 --> 00:16:45.600 align:middle line:84% Because I can't put a DC current into a capacitor 00:16:45.600 --> 00:16:47.080 align:middle line:84% and have its voltage stay stable. 00:16:47.080 --> 00:16:50.220 align:middle line:84% So what that means is if I have a motor drive that's 00:16:50.220 --> 00:16:56.760 align:middle line:84% going to draw 100, 500 hertz out here or something, 00:16:56.760 --> 00:16:59.520 align:middle line:84% I may have 500 hertz currents coming in here, 00:16:59.520 --> 00:17:01.320 align:middle line:90% but no DC current. 00:17:01.320 --> 00:17:03.990 align:middle line:84% So I may have to control the switches a little bit just 00:17:03.990 --> 00:17:06.480 align:middle line:84% to make sure that this node stays balanced. 00:17:06.480 --> 00:17:09.775 align:middle line:84% And I can't deliver DC current out of this thing. 00:17:09.775 --> 00:17:11.400 align:middle line:84% I can only deliver AC current out of it 00:17:11.400 --> 00:17:13.920 align:middle line:84% because otherwise, this capacitor-- this node wouldn't 00:17:13.920 --> 00:17:15.520 align:middle line:90% say it half the bus voltage. 00:17:15.520 --> 00:17:20.640 align:middle line:84% But since I usually have big bus capacitors here anyways and I 00:17:20.640 --> 00:17:23.280 align:middle line:84% usually use this when I do want AC currents only, 00:17:23.280 --> 00:17:25.819 align:middle line:90% that works just fine. 00:17:25.819 --> 00:17:27.010 align:middle line:90% Any questions about that? 00:17:27.010 --> 00:17:30.000 align:middle line:90% 00:17:30.000 --> 00:17:32.260 align:middle line:84% So that's one of a variety of ways to do it. 00:17:32.260 --> 00:17:34.560 align:middle line:84% Let me show you one more, keeping 00:17:34.560 --> 00:17:37.560 align:middle line:90% with the theme for today. 00:17:37.560 --> 00:17:40.890 align:middle line:84% And by the way, these are hardly the only ways you can do this. 00:17:40.890 --> 00:17:43.710 align:middle line:84% I'm just showing you two very popular ones. 00:17:43.710 --> 00:17:53.285 align:middle line:84% This is known as a flying capacitor multilevel inverter. 00:17:53.285 --> 00:17:56.250 align:middle line:90% 00:17:56.250 --> 00:17:58.470 align:middle line:90% And here's the idea. 00:17:58.470 --> 00:18:03.750 align:middle line:84% Suppose I'll take my DC bus voltage here, VDC. 00:18:03.750 --> 00:18:07.170 align:middle line:84% Now I'm going to go out and get four switches. 00:18:07.170 --> 00:18:09.610 align:middle line:90% I'll call this S1-- 00:18:09.610 --> 00:18:13.160 align:middle line:90% actually, I'll call this S1, S2. 00:18:13.160 --> 00:18:16.260 align:middle line:90% 00:18:16.260 --> 00:18:21.790 align:middle line:84% I'll call this S2 prime and S1 prime. 00:18:21.790 --> 00:18:23.350 align:middle line:84% And what I'm going to do is I'm going 00:18:23.350 --> 00:18:26.710 align:middle line:84% to put a big capacitor here, And I'm 00:18:26.710 --> 00:18:34.540 align:middle line:84% going to make VC approximately equal to VDC over 2. 00:18:34.540 --> 00:18:37.420 align:middle line:84% I'm going to control this circuit so this capacitor 00:18:37.420 --> 00:18:41.080 align:middle line:84% voltage stays at approximately half the bus voltage. 00:18:41.080 --> 00:18:43.880 align:middle line:90% What do I get when I do that. 00:18:43.880 --> 00:18:44.900 align:middle line:90% Which switch is on? 00:18:44.900 --> 00:18:47.690 align:middle line:90% Let's see. 00:18:47.690 --> 00:18:49.670 align:middle line:90% S1 and S2. 00:18:49.670 --> 00:18:55.760 align:middle line:84% If these two switches are on, the output voltage 00:18:55.760 --> 00:18:56.560 align:middle line:90% would go to VDC. 00:18:56.560 --> 00:19:00.050 align:middle line:90% 00:19:00.050 --> 00:19:09.020 align:middle line:84% If I have S1 and S2 prime on, I get 00:19:09.020 --> 00:19:12.980 align:middle line:84% VDC minus VC, which is approximately 00:19:12.980 --> 00:19:16.820 align:middle line:90% equal to VDC over 2. 00:19:16.820 --> 00:19:17.803 align:middle line:90% If I have. 00:19:17.803 --> 00:19:20.320 align:middle line:90% 00:19:20.320 --> 00:19:27.980 align:middle line:84% S1 prime and S2 on, that will connect here to here 00:19:27.980 --> 00:19:29.250 align:middle line:90% to the output. 00:19:29.250 --> 00:19:32.540 align:middle line:84% Then I would get VC, which is also approximately 00:19:32.540 --> 00:19:34.790 align:middle line:90% equal to VDC over 2. 00:19:34.790 --> 00:19:39.050 align:middle line:84% And lastly, if I have S1 prime and S2 prime, 00:19:39.050 --> 00:19:43.220 align:middle line:84% I'll connect the bottom two and V out 1 will be 0. 00:19:43.220 --> 00:19:49.220 align:middle line:84% So here, I can synthesize plus VDC, approximately VDC 00:19:49.220 --> 00:19:51.650 align:middle line:90% over 2 and 0. 00:19:51.650 --> 00:19:56.570 align:middle line:84% Again, this one bridge leg can synthesize the positive half 00:19:56.570 --> 00:19:57.450 align:middle line:90% of this thing. 00:19:57.450 --> 00:20:01.650 align:middle line:84% I can make another three-level inverter with this. 00:20:01.650 --> 00:20:04.500 align:middle line:90% Any questions about that? 00:20:04.500 --> 00:20:07.500 align:middle line:84% Now, I have two ways I can synthesize, 00:20:07.500 --> 00:20:09.720 align:middle line:90% roughly speaking, VDC over 2. 00:20:09.720 --> 00:20:12.160 align:middle line:84% Suppose I had a positive load current. 00:20:12.160 --> 00:20:18.030 align:middle line:84% If I did it the first way, I would have current flowing out 00:20:18.030 --> 00:20:22.650 align:middle line:84% of here into the load, and it would charge this capacitor. 00:20:22.650 --> 00:20:24.840 align:middle line:84% If I did it the second way, it would 00:20:24.840 --> 00:20:27.360 align:middle line:84% flow up from the bottom out through the capacitor and out 00:20:27.360 --> 00:20:29.220 align:middle line:90% and discharge the capacitor. 00:20:29.220 --> 00:20:35.010 align:middle line:84% So these two mid-voltage states have opposite effects 00:20:35.010 --> 00:20:37.230 align:middle line:84% in whether they charge or discharge this capacitor 00:20:37.230 --> 00:20:39.320 align:middle line:90% for a given load current. 00:20:39.320 --> 00:20:44.060 align:middle line:84% So by choosing which of these I use at any given time, 00:20:44.060 --> 00:20:48.290 align:middle line:84% I can maintain that capacitor voltage near half VDC. 00:20:48.290 --> 00:20:53.640 align:middle line:90% 00:20:53.640 --> 00:20:58.500 align:middle line:84% Again, notice that if this is kept near VDC over 2, 00:20:58.500 --> 00:21:02.280 align:middle line:84% each of these switches again only sees VDC over 2 blocking. 00:21:02.280 --> 00:21:05.640 align:middle line:84% Now, in practice, I can't quite derate them that much, 00:21:05.640 --> 00:21:08.670 align:middle line:84% but I have to derate them less than if I didn't 00:21:08.670 --> 00:21:12.450 align:middle line:90% have this kind of divide down. 00:21:12.450 --> 00:21:18.630 align:middle line:84% So this FCML, as it's known-- this was, by the way, 00:21:18.630 --> 00:21:21.960 align:middle line:84% originally proposed in about the early '90s by a guy named 00:21:21.960 --> 00:21:22.570 align:middle line:90% Maynard. 00:21:22.570 --> 00:21:24.790 align:middle line:84% So this is sometimes called a Maynard inverter-- 00:21:24.790 --> 00:21:28.610 align:middle line:90% 00:21:28.610 --> 00:21:31.960 align:middle line:90% is really powerful. 00:21:31.960 --> 00:21:34.330 align:middle line:90% It gets really widely used. 00:21:34.330 --> 00:21:38.530 align:middle line:84% And the other neat thing about this thing is that you can 00:21:38.530 --> 00:21:41.530 align:middle line:84% actually-- whereas in the other version I showed you, 00:21:41.530 --> 00:21:46.360 align:middle line:84% you cannot source DC current, because you'll eventually charge 00:21:46.360 --> 00:21:48.760 align:middle line:84% or discharge those bus caps, here, 00:21:48.760 --> 00:21:52.720 align:middle line:84% by flipping back and forth between these two states, 00:21:52.720 --> 00:21:57.970 align:middle line:84% I could source DC current out without charging or discharging 00:21:57.970 --> 00:21:59.250 align:middle line:90% this cap. 00:21:59.250 --> 00:22:01.920 align:middle line:84% So this one's a little trickier to run, 00:22:01.920 --> 00:22:04.800 align:middle line:84% and it has this capacitor that flies up and down 00:22:04.800 --> 00:22:06.060 align:middle line:90% with the different states. 00:22:06.060 --> 00:22:08.260 align:middle line:84% But I can supply DC power with it. 00:22:08.260 --> 00:22:10.740 align:middle line:84% So people actually build DC-to-DC converters this way, 00:22:10.740 --> 00:22:11.240 align:middle line:90% too. 00:22:11.240 --> 00:22:13.300 align:middle line:84% They build three-level DC-to-DC converters. 00:22:13.300 --> 00:22:17.360 align:middle line:90% 00:22:17.360 --> 00:22:19.400 align:middle line:84% And I could show you the T-type-- 00:22:19.400 --> 00:22:22.010 align:middle line:84% there's a bunch of inverters that give you 00:22:22.010 --> 00:22:23.780 align:middle line:84% multi-level capabilities like this, 00:22:23.780 --> 00:22:26.790 align:middle line:84% and people tend to use all of them. 00:22:26.790 --> 00:22:28.570 align:middle line:90% And which one do you use? 00:22:28.570 --> 00:22:30.560 align:middle line:84% It depends what you're trying to optimize. 00:22:30.560 --> 00:22:32.685 align:middle line:84% People choose different things for different goals. 00:22:32.685 --> 00:22:35.320 align:middle line:90% 00:22:35.320 --> 00:22:40.900 align:middle line:84% I should also tell you that just because I 00:22:40.900 --> 00:22:46.480 align:middle line:84% said we could do three levels, you can expand your imagination 00:22:46.480 --> 00:22:48.870 align:middle line:90% however many levels you like. 00:22:48.870 --> 00:22:51.787 align:middle line:84% And in fact, the neutral point clamped-in converter-- 00:22:51.787 --> 00:22:53.620 align:middle line:84% I'm sorry, the neutral point clamp converter 00:22:53.620 --> 00:22:56.620 align:middle line:84% is sometimes of a bigger family of converters 00:22:56.620 --> 00:23:00.520 align:middle line:84% called diode-clamped or active-clamped, 00:23:00.520 --> 00:23:02.270 align:middle line:90% multi-level inverters. 00:23:02.270 --> 00:23:05.000 align:middle line:90% This one also expands. 00:23:05.000 --> 00:23:07.160 align:middle line:84% So for example-- I'll just show you an example. 00:23:07.160 --> 00:23:11.200 align:middle line:84% Suppose I-- instead of having one device, 00:23:11.200 --> 00:23:13.750 align:middle line:84% I had two devices here in the top and two devices 00:23:13.750 --> 00:23:15.730 align:middle line:84% in the bottom position, my next thing would-- 00:23:15.730 --> 00:23:17.230 align:middle line:84% I'd have three devices in the top 00:23:17.230 --> 00:23:19.370 align:middle line:84% and three devices in the bottom thing. 00:23:19.370 --> 00:23:20.330 align:middle line:90% So I could do this. 00:23:20.330 --> 00:23:31.493 align:middle line:84% I could have one, two, three, four, five, six. 00:23:31.493 --> 00:23:34.400 align:middle line:90% 00:23:34.400 --> 00:23:35.375 align:middle line:90% Here's VDC. 00:23:35.375 --> 00:23:39.250 align:middle line:90% 00:23:39.250 --> 00:23:40.565 align:middle line:90% And I will have V out. 00:23:40.565 --> 00:23:44.500 align:middle line:90% 00:23:44.500 --> 00:23:48.820 align:middle line:84% And what I'll do is I will have one flying capacitor here 00:23:48.820 --> 00:23:52.000 align:middle line:84% so that these two switches are never on at the same time. 00:23:52.000 --> 00:23:56.862 align:middle line:84% And I'll have another flying capacitor here. 00:23:56.862 --> 00:24:01.438 align:middle line:84% So I've got to be careful about whether these two switches are 00:24:01.438 --> 00:24:03.730 align:middle line:84% on at the same time, or certainly, these four switches. 00:24:03.730 --> 00:24:05.960 align:middle line:84% And what I will do is I will control this one. 00:24:05.960 --> 00:24:12.010 align:middle line:84% So that this is approximately VDC over 3 and this is 00:24:12.010 --> 00:24:15.280 align:middle line:90% approximately 2VDC over 3. 00:24:15.280 --> 00:24:17.030 align:middle line:90% Same game. 00:24:17.030 --> 00:24:19.810 align:middle line:84% I can pick switch states to regulate both of those capacitor 00:24:19.810 --> 00:24:20.750 align:middle line:90% voltages. 00:24:20.750 --> 00:24:25.600 align:middle line:84% Now, each switch only needs to see a third of the bus voltage. 00:24:25.600 --> 00:24:28.420 align:middle line:84% Now, I can't derate it down that far in the real world 00:24:28.420 --> 00:24:30.100 align:middle line:84% because I have all kinds of start-up 00:24:30.100 --> 00:24:31.670 align:middle line:90% and transient and other effects. 00:24:31.670 --> 00:24:33.490 align:middle line:84% But nonetheless, what that means is 00:24:33.490 --> 00:24:36.100 align:middle line:84% I have, first of all, lower voltage-rated switches 00:24:36.100 --> 00:24:39.590 align:middle line:84% overall and more levels I can synthesize. 00:24:39.590 --> 00:24:42.550 align:middle line:84% So I can synthesize, roughly speaking. 00:24:42.550 --> 00:24:47.270 align:middle line:90% VDC-- 2/3 VDC, 1/3 VDC, and 0. 00:24:47.270 --> 00:24:49.347 align:middle line:90% So it's a four-level inverter. 00:24:49.347 --> 00:24:50.680 align:middle line:90% And you want to expand that out. 00:24:50.680 --> 00:24:53.620 align:middle line:84% People have built 10-level inverters. 00:24:53.620 --> 00:24:56.885 align:middle line:84% Why would I want to build a 10-level inverter? 00:24:56.885 --> 00:24:59.260 align:middle line:84% Because if I'm building an inverter with this bridge leg, 00:24:59.260 --> 00:25:00.930 align:middle line:90% my output waveform, V01-- 00:25:00.930 --> 00:25:03.700 align:middle line:90% 00:25:03.700 --> 00:25:06.380 align:middle line:84% V01 might be able to look something like this. 00:25:06.380 --> 00:25:08.950 align:middle line:90% 00:25:08.950 --> 00:25:13.990 align:middle line:84% I can build this very beautiful sine wave kind of thing, 00:25:13.990 --> 00:25:15.640 align:middle line:90% Very little harmonic content. 00:25:15.640 --> 00:25:17.540 align:middle line:90% Needs very little filtering. 00:25:17.540 --> 00:25:20.290 align:middle line:84% So the filter I need is very tiny. 00:25:20.290 --> 00:25:23.045 align:middle line:84% And by the way, if I'm building a grid interface inverter, 00:25:23.045 --> 00:25:24.670 align:middle line:84% I've got to build that filter inductor, 00:25:24.670 --> 00:25:29.110 align:middle line:84% so I can suddenly make that filter inductor really small. 00:25:29.110 --> 00:25:33.077 align:middle line:84% So there are motivations to go to high numbers of levels. 00:25:33.077 --> 00:25:33.910 align:middle line:90% What's the downside? 00:25:33.910 --> 00:25:35.800 align:middle line:90% Complexity. 00:25:35.800 --> 00:25:40.000 align:middle line:84% There's all kinds of complexity you got to throw at it. 00:25:40.000 --> 00:25:44.600 align:middle line:84% But you're trading complexity for performance. 00:25:44.600 --> 00:25:47.410 align:middle line:84% And like I said, there's versions of this flying 00:25:47.410 --> 00:25:48.740 align:middle line:90% capacitor multi-level inverter. 00:25:48.740 --> 00:25:52.390 align:middle line:84% There's higher-order versions of the neutral point clamped 00:25:52.390 --> 00:25:53.300 align:middle line:90% converter. 00:25:53.300 --> 00:25:54.820 align:middle line:84% And people just decide what they're 00:25:54.820 --> 00:25:58.250 align:middle line:84% going to do based on what they're trying to achieve. 00:25:58.250 --> 00:26:01.890 align:middle line:90% Questions about any of that? 00:26:01.890 --> 00:26:02.500 align:middle line:90% Yeah, Jack. 00:26:02.500 --> 00:26:05.950 align:middle line:84% AUDIENCE: [INAUDIBLE] the high-side FETs [INAUDIBLE]? 00:26:05.950 --> 00:26:08.480 align:middle line:84% DAVID PERREAULT: Ah, excellent question. 00:26:08.480 --> 00:26:13.300 align:middle line:84% So I will cover details of how you do bootstrap 00:26:13.300 --> 00:26:14.880 align:middle line:90% drivers and that kind of thing. 00:26:14.880 --> 00:26:17.770 align:middle line:84% The higher the voltages, the trickier it gets. 00:26:17.770 --> 00:26:21.830 align:middle line:84% But the crudest thing you could imagine is you need two pieces. 00:26:21.830 --> 00:26:24.640 align:middle line:84% A, you need a little power supply that flies up and down. 00:26:24.640 --> 00:26:27.950 align:middle line:84% Sometimes that's built with an isolated power supply. 00:26:27.950 --> 00:26:29.920 align:middle line:84% And in fact, on the board I'm passing around, 00:26:29.920 --> 00:26:33.100 align:middle line:84% there's a little black rectangular-- 00:26:33.100 --> 00:26:35.000 align:middle line:84% a couple of little black rectangular cubes. 00:26:35.000 --> 00:26:36.910 align:middle line:84% Those are the flying power supplies. 00:26:36.910 --> 00:26:39.610 align:middle line:84% Other times, you can build it with a capacitor and a diode 00:26:39.610 --> 00:26:40.790 align:middle line:90% and bootstrap it. 00:26:40.790 --> 00:26:45.880 align:middle line:84% The higher the bus voltage, the more difficult that becomes. 00:26:45.880 --> 00:26:49.000 align:middle line:84% The other thing you need, in addition to a power supply 00:26:49.000 --> 00:26:53.320 align:middle line:84% to power the gate drive charging is a signal isolator. 00:26:53.320 --> 00:26:55.240 align:middle line:84% You've got to send the signal up and down. 00:26:55.240 --> 00:26:57.560 align:middle line:84% And up to a few 1,000 volts, that's not too hard. 00:26:57.560 --> 00:27:00.130 align:middle line:84% You can out and buy digital isolators. 00:27:00.130 --> 00:27:02.540 align:middle line:84% Or at lower voltages, a few 100 volts, 00:27:02.540 --> 00:27:05.920 align:middle line:84% you can buy ones that aren't even galvanically isolated 00:27:05.920 --> 00:27:07.828 align:middle line:84% and do the level shifting for you. 00:27:07.828 --> 00:27:09.620 align:middle line:84% When you get to higher and higher voltages, 00:27:09.620 --> 00:27:11.100 align:middle line:84% it becomes harder and harder and harder, 00:27:11.100 --> 00:27:13.058 align:middle line:84% and then you're using these optical connections 00:27:13.058 --> 00:27:14.370 align:middle line:90% and everything else to do that. 00:27:14.370 --> 00:27:16.425 align:middle line:84% But there's a lot of practical issues 00:27:16.425 --> 00:27:18.050 align:middle line:84% with what you would choose to do there. 00:27:18.050 --> 00:27:20.030 align:middle line:84% And that might be another thing that 00:27:20.030 --> 00:27:23.780 align:middle line:84% would influence how many levels you want to use. 00:27:23.780 --> 00:27:27.440 align:middle line:84% At the same time, switches tend to be more important-- 00:27:27.440 --> 00:27:32.620 align:middle line:84% more expensive than isolating signals If you're at high power. 00:27:32.620 --> 00:27:36.140 align:middle line:84% If you're at low power, you wouldn't 00:27:36.140 --> 00:27:39.320 align:middle line:84% want to do that too much because then the switches aren't 00:27:39.320 --> 00:27:40.770 align:middle line:84% expensive, but the isolators are. 00:27:40.770 --> 00:27:43.100 align:middle line:84% And that's why there's a plethora of techniques 00:27:43.100 --> 00:27:44.010 align:middle line:90% that people use. 00:27:44.010 --> 00:27:46.940 align:middle line:84% I will say, by the way, that this kind of technique-- very 00:27:46.940 --> 00:27:50.060 align:middle line:84% popular in integrated silicon converters like CMOS 00:27:50.060 --> 00:27:53.810 align:middle line:84% kind of converters, because all of this stuff 00:27:53.810 --> 00:27:56.150 align:middle line:84% can be integrated on a CMOS die, and then you're 00:27:56.150 --> 00:27:58.400 align:middle line:84% using native devices with low voltage 00:27:58.400 --> 00:28:00.960 align:middle line:90% to synthesize a higher voltage. 00:28:00.960 --> 00:28:01.930 align:middle line:90% Great question. 00:28:01.930 --> 00:28:04.040 align:middle line:90% Any other questions? 00:28:04.040 --> 00:28:04.610 align:middle line:90% Yeah. 00:28:04.610 --> 00:28:07.790 align:middle line:84% AUDIENCE: So when you were regulating the voltage, 00:28:07.790 --> 00:28:11.870 align:middle line:84% are we doing that by fixing the respective duty ratio? 00:28:11.870 --> 00:28:13.310 align:middle line:90% Or how are we getting that? 00:28:13.310 --> 00:28:13.940 align:middle line:84% DAVID PERREAULT: Yeah, so what you 00:28:13.940 --> 00:28:15.800 align:middle line:84% might do in this example is you might say, 00:28:15.800 --> 00:28:19.310 align:middle line:84% OK, my controller is telling me I 00:28:19.310 --> 00:28:22.610 align:middle line:84% need to synthesize the middle level, 00:28:22.610 --> 00:28:26.600 align:middle line:84% And if I know which direction the current is. 00:28:26.600 --> 00:28:28.610 align:middle line:84% I would say, is this capacitor voltage 00:28:28.610 --> 00:28:29.910 align:middle line:90% a little low or a little high? 00:28:29.910 --> 00:28:33.440 align:middle line:84% And I'd pick my next state as to whether I want 00:28:33.440 --> 00:28:36.050 align:middle line:90% this to decrease or increase. 00:28:36.050 --> 00:28:39.000 align:middle line:84% So I basically use the degrees of freedom. 00:28:39.000 --> 00:28:43.550 align:middle line:84% I have to choose which way to switch to control that voltage. 00:28:43.550 --> 00:28:46.340 align:middle line:84% In this case, you can build a little state machine that says-- 00:28:46.340 --> 00:28:49.412 align:middle line:84% given that there's two voltage that I need to regulate, 00:28:49.412 --> 00:28:50.870 align:middle line:84% which one's big, which one's small, 00:28:50.870 --> 00:28:52.670 align:middle line:84% and you can make a little state machine 00:28:52.670 --> 00:28:54.210 align:middle line:90% that will control both of them. 00:28:54.210 --> 00:28:57.290 align:middle line:90% 00:28:57.290 --> 00:29:00.730 align:middle line:90% Any other questions? 00:29:00.730 --> 00:29:04.540 align:middle line:84% So if I can build multilevel inverters, 00:29:04.540 --> 00:29:08.720 align:middle line:84% I can do higher-order versions of harmonic cancellation. 00:29:08.720 --> 00:29:11.240 align:middle line:84% I can do harmonic elimination at the same time. 00:29:11.240 --> 00:29:16.580 align:middle line:84% Make really, really-- waveforms that'll have very nice purity. 00:29:16.580 --> 00:29:19.690 align:middle line:84% I don't need to filter much, and I get what I want. 00:29:19.690 --> 00:29:23.290 align:middle line:90% So that's pretty cool. 00:29:23.290 --> 00:29:27.760 align:middle line:84% I'd like to talk about one other aspect. 00:29:27.760 --> 00:29:29.680 align:middle line:90% And that is-- 00:29:29.680 --> 00:29:34.060 align:middle line:84% I've focused on the situation where, boy, we want to-- 00:29:34.060 --> 00:29:37.570 align:middle line:84% to get what we want-- we don't want to switch too often. 00:29:37.570 --> 00:29:40.040 align:middle line:84% And that is especially true at high power levels 00:29:40.040 --> 00:29:42.040 align:middle line:84% because at high power levels with high voltages, 00:29:42.040 --> 00:29:43.990 align:middle line:84% the switching costs you a lot, and you really 00:29:43.990 --> 00:29:46.810 align:middle line:90% focus on how to minimize that. 00:29:46.810 --> 00:29:53.108 align:middle line:84% But in some cases, I have really good MOSFETs at low voltage. 00:29:53.108 --> 00:29:54.775 align:middle line:84% I can switch a lot, I don't have to say, 00:29:54.775 --> 00:29:57.490 align:middle line:84% oh, I can only switch 10 times per AC cycle. 00:29:57.490 --> 00:29:59.000 align:middle line:84% I'm trying to synthesize 60 hertz. 00:29:59.000 --> 00:30:01.960 align:middle line:90% I can switch 100 times, more. 00:30:01.960 --> 00:30:04.870 align:middle line:84% I think that inverter up there in the application 00:30:04.870 --> 00:30:06.250 align:middle line:90% that we're doing-- 00:30:06.250 --> 00:30:09.580 align:middle line:84% I forget how many switchings per half cycle we do. 00:30:09.580 --> 00:30:13.520 align:middle line:84% But it's-- I want to say I want to say it's something 00:30:13.520 --> 00:30:15.050 align:middle line:90% on the order of 50 or something. 00:30:15.050 --> 00:30:20.090 align:middle line:84% Actually, it's-- no, it's more than that. 00:30:20.090 --> 00:30:22.710 align:middle line:90% So it's pretty high. 00:30:22.710 --> 00:30:25.490 align:middle line:84% So you can switch a lot If you're 00:30:25.490 --> 00:30:26.845 align:middle line:90% at low power or lower voltage. 00:30:26.845 --> 00:30:28.970 align:middle line:84% Actually, that's not even particularly low voltage. 00:30:28.970 --> 00:30:31.050 align:middle line:84% Like I said, it's a 720-volt bus. 00:30:31.050 --> 00:30:35.610 align:middle line:84% And that one switches at 80khz to synthesize a couple 00:30:35.610 --> 00:30:42.660 align:middle line:84% of kilohertz output signal with some caveats that I'll explain 00:30:42.660 --> 00:30:43.750 align:middle line:90% shortly here. 00:30:43.750 --> 00:30:46.300 align:middle line:90% But suppose I can switch a lot. 00:30:46.300 --> 00:30:47.320 align:middle line:90% How would I do that? 00:30:47.320 --> 00:30:49.290 align:middle line:84% Well, one of the things I told you was-- 00:30:49.290 --> 00:30:53.610 align:middle line:84% if you're trying to do this harmonic elimination, man, you 00:30:53.610 --> 00:30:56.910 align:middle line:84% got to time those angles really carefully, Otherwise, 00:30:56.910 --> 00:30:58.800 align:middle line:90% it doesn't work out too well. 00:30:58.800 --> 00:31:02.220 align:middle line:84% And even the same is true of harmonic cancellation 00:31:02.220 --> 00:31:03.720 align:middle line:84% because you're phase shifting stuff, 00:31:03.720 --> 00:31:05.303 align:middle line:84% So you've got to get your angles right 00:31:05.303 --> 00:31:07.390 align:middle line:84% in order to do very precise harmonic elimination. 00:31:07.390 --> 00:31:10.560 align:middle line:84% But if you take the handcuffs off on how fast you can go, 00:31:10.560 --> 00:31:13.342 align:middle line:90% you can switch a lot of times. 00:31:13.342 --> 00:31:16.050 align:middle line:84% How do you want to decide how do you want to switch to synthesize 00:31:16.050 --> 00:31:18.270 align:middle line:90% a sinusoid, for example? 00:31:18.270 --> 00:31:20.860 align:middle line:84% But I'll ask even a broader question. 00:31:20.860 --> 00:31:23.610 align:middle line:84% What if it isn't a sinusoid I want to synthesize? 00:31:23.610 --> 00:31:26.047 align:middle line:84% And in some cases I don't even know, ahead of time, 00:31:26.047 --> 00:31:27.130 align:middle line:90% what I want to synthesize. 00:31:27.130 --> 00:31:30.990 align:middle line:84% So, for example, if I want to build a switch mode audio power 00:31:30.990 --> 00:31:32.280 align:middle line:90% amplifier-- 00:31:32.280 --> 00:31:34.590 align:middle line:84% I want to play music out this thing-- 00:31:34.590 --> 00:31:36.870 align:middle line:84% I may not know ahead of time what 00:31:36.870 --> 00:31:38.250 align:middle line:84% the waveform I want to synthesize 00:31:38.250 --> 00:31:39.750 align:middle line:84% is because it's different every day. 00:31:39.750 --> 00:31:46.420 align:middle line:84% It depends what button the person pushes on their iPod 00:31:46.420 --> 00:31:48.020 align:middle line:90% or what you select on Spotify. 00:31:48.020 --> 00:31:51.700 align:middle line:84% So I need some way to take an arbitrary waveform 00:31:51.700 --> 00:31:56.550 align:middle line:84% and synthesize an arbitrary AC output signal very quickly. 00:31:56.550 --> 00:32:00.700 align:middle line:84% And there's, again, different ways you can do that. 00:32:00.700 --> 00:32:03.750 align:middle line:84% But I will show you one that's very common, 00:32:03.750 --> 00:32:07.590 align:middle line:84% and this is sometimes called sine triangle PWM. 00:32:07.590 --> 00:32:19.041 align:middle line:90% 00:32:19.041 --> 00:32:22.020 align:middle line:84% PWM is, again, pulse width modulation. 00:32:22.020 --> 00:32:26.540 align:middle line:84% So we're going to modulate the widths of individual pulses 00:32:26.540 --> 00:32:29.130 align:middle line:90% in order to control the output. 00:32:29.130 --> 00:32:34.920 align:middle line:84% Sine triangle PWM or sine triangle intercept PWM 00:32:34.920 --> 00:32:37.830 align:middle line:84% speaks to the way I would do it if I was trying 00:32:37.830 --> 00:32:39.895 align:middle line:90% to synthesize a sine wave. 00:32:39.895 --> 00:32:41.770 align:middle line:84% But you don't have to synthesize a sine wave. 00:32:41.770 --> 00:32:43.228 align:middle line:84% We can synthesize whatever we want. 00:32:43.228 --> 00:32:44.180 align:middle line:90% And here's the idea. 00:32:44.180 --> 00:32:54.360 align:middle line:84% Suppose I take some triangular carrier waveform here. 00:32:54.360 --> 00:32:56.010 align:middle line:90% And I'm going to make-- 00:32:56.010 --> 00:32:59.310 align:middle line:84% I'm going to draw this as triangles, like this, 00:32:59.310 --> 00:33:02.820 align:middle line:90% with some period, T, like this. 00:33:02.820 --> 00:33:07.190 align:middle line:90% 00:33:07.190 --> 00:33:14.310 align:middle line:84% And T is going to set my switching period and so forth. 00:33:14.310 --> 00:33:16.000 align:middle line:90% So 2T, et cetera. 00:33:16.000 --> 00:33:18.600 align:middle line:84% And then suppose I have some reference waveform-- 00:33:18.600 --> 00:33:20.195 align:middle line:90% Vref-- that's doing this. 00:33:20.195 --> 00:33:23.500 align:middle line:90% 00:33:23.500 --> 00:33:26.230 align:middle line:90% So here's Vref. 00:33:26.230 --> 00:33:27.640 align:middle line:84% What I'm going to do is I'm going 00:33:27.640 --> 00:33:33.050 align:middle line:84% to have a comparator that is going to, say, take, 00:33:33.050 --> 00:33:37.730 align:middle line:84% at the positive input, Vref, and, at the negative input, 00:33:37.730 --> 00:33:44.010 align:middle line:84% the triangle wave, and output is going to come q of T. 00:33:44.010 --> 00:33:47.990 align:middle line:84% If I was doing this on a half bridge, 00:33:47.990 --> 00:33:49.200 align:middle line:90% what would I be thinking? 00:33:49.200 --> 00:33:54.140 align:middle line:84% I would say this gets q of T and this gets q prime of T 00:33:54.140 --> 00:33:57.620 align:middle line:84% is equal to 1 minus q of T, So whenever he's on, 00:33:57.620 --> 00:33:59.480 align:middle line:90% he's off, and vice versa. 00:33:59.480 --> 00:34:02.690 align:middle line:90% So what is the idea here? 00:34:02.690 --> 00:34:04.560 align:middle line:90% The idea here is the following. 00:34:04.560 --> 00:34:08.389 align:middle line:84% If I run through this comparator, what 00:34:08.389 --> 00:34:12.880 align:middle line:84% I'm going to get for my q of T is the following. 00:34:12.880 --> 00:34:17.679 align:middle line:84% Whenever the reference exceeds the triangle wave, 00:34:17.679 --> 00:34:18.770 align:middle line:90% I'm going to be on. 00:34:18.770 --> 00:34:23.290 align:middle line:84% So here, my switch is going to be on. 00:34:23.290 --> 00:34:28.340 align:middle line:84% Here's q of T. Is going to be on here. 00:34:28.340 --> 00:34:32.330 align:middle line:90% And maybe a tiny time here, 00:34:32.330 --> 00:34:35.124 align:middle line:84% When I come to the next cycle and my reference is bigger. 00:34:35.124 --> 00:34:37.889 align:middle line:90% 00:34:37.889 --> 00:34:40.099 align:middle line:90% I synthesize a wider pulse. 00:34:40.099 --> 00:34:42.610 align:middle line:90% 00:34:42.610 --> 00:34:46.350 align:middle line:84% Here, the reference is bigger, and I've 00:34:46.350 --> 00:34:48.980 align:middle line:90% got an even wider pulse. 00:34:48.980 --> 00:34:50.480 align:middle line:84% My height shouldn't be growing here. 00:34:50.480 --> 00:34:52.870 align:middle line:90% The heights are all the same. 00:34:52.870 --> 00:34:56.534 align:middle line:84% Here, it's even wider pulse and so forth. 00:34:56.534 --> 00:34:59.420 align:middle line:90% 00:34:59.420 --> 00:35:02.725 align:middle line:84% So what happens is the fraction of time-- 00:35:02.725 --> 00:35:06.720 align:middle line:90% 00:35:06.720 --> 00:35:08.330 align:middle line:90% so each of these is spaced-- 00:35:08.330 --> 00:35:13.080 align:middle line:90% T, 2T, 3T, 4T, et cetera. 00:35:13.080 --> 00:35:17.840 align:middle line:84% So the spacing of the switching is constant, 00:35:17.840 --> 00:35:20.240 align:middle line:84% I have a constant switching frequency. 00:35:20.240 --> 00:35:24.920 align:middle line:84% The pulse width that I'm going to get in any capital 00:35:24.920 --> 00:35:31.160 align:middle line:84% T seconds is going to be proportional to the-- 00:35:31.160 --> 00:35:36.080 align:middle line:84% if I call this triangle height, H, d of T, in any cycle, 00:35:36.080 --> 00:35:44.270 align:middle line:84% is going to be equal to the magnitude of Vref over H. Why? 00:35:44.270 --> 00:35:47.290 align:middle line:84% Because for a triangle wave, if this was flat, 00:35:47.290 --> 00:35:50.200 align:middle line:84% it's just-- the percentage-- if I go from 1 down 00:35:50.200 --> 00:35:51.850 align:middle line:90% to 0, just linearly. 00:35:51.850 --> 00:35:54.550 align:middle line:84% So the duty cycle in any given time, 00:35:54.550 --> 00:36:04.750 align:middle line:84% and hence the average value, V01 average over a switching period, 00:36:04.750 --> 00:36:08.110 align:middle line:84% is going to be precisely d, which 00:36:08.110 --> 00:36:13.030 align:middle line:84% is precisely the ratio of Vref to the top of the triangle. 00:36:13.030 --> 00:36:14.280 align:middle line:90% Any questions about that? 00:36:14.280 --> 00:36:17.530 align:middle line:90% 00:36:17.530 --> 00:36:20.200 align:middle line:84% Now, if you recall, this is the exact same trick 00:36:20.200 --> 00:36:22.550 align:middle line:84% we talked about doing with DC-to-DC converters. 00:36:22.550 --> 00:36:24.820 align:middle line:84% We just had a sawtooth, and we compared it 00:36:24.820 --> 00:36:26.290 align:middle line:90% to the level of a signal. 00:36:26.290 --> 00:36:30.410 align:middle line:84% Here, I used a triangle wave, like a balanced triangle wave. 00:36:30.410 --> 00:36:33.020 align:middle line:84% You could do this with a triangle wave. 00:36:33.020 --> 00:36:34.810 align:middle line:84% You could do this with a sawtooth, 00:36:34.810 --> 00:36:37.270 align:middle line:84% with a capital period T. You could 00:36:37.270 --> 00:36:40.940 align:middle line:84% do it with a reverse sawtooth, like this. 00:36:40.940 --> 00:36:42.860 align:middle line:90% All of those things work. 00:36:42.860 --> 00:36:45.350 align:middle line:84% But what happens is all of them will give you 00:36:45.350 --> 00:36:49.930 align:middle line:90% the same average on time-- 00:36:49.930 --> 00:36:52.870 align:middle line:84% or average high time, or the same average 00:36:52.870 --> 00:36:55.690 align:middle line:90% V01 over a switching cycle. 00:36:55.690 --> 00:37:01.530 align:middle line:84% But what differs-- boy, that's a bad drawing. 00:37:01.530 --> 00:37:05.040 align:middle line:90% What differs among these is-- 00:37:05.040 --> 00:37:08.800 align:middle line:84% what differs among these is the harmonic content. 00:37:08.800 --> 00:37:11.530 align:middle line:84% So the high-frequency switching content-- 00:37:11.530 --> 00:37:14.410 align:middle line:84% how much is there and what does it look like-- 00:37:14.410 --> 00:37:17.810 align:middle line:84% depends upon whether I use this waveform or this waveform. 00:37:17.810 --> 00:37:20.380 align:middle line:84% At DC, the local average value doesn't vary. 00:37:20.380 --> 00:37:23.530 align:middle line:84% And it turns out that the balanced triangle wave tends 00:37:23.530 --> 00:37:25.540 align:middle line:84% to give you less harmonics than anything else, 00:37:25.540 --> 00:37:27.010 align:middle line:84% or it gives you less high frequency 00:37:27.010 --> 00:37:29.960 align:middle line:84% content or better-shaped high frequency content. 00:37:29.960 --> 00:37:34.840 align:middle line:84% So mostly, for inverters, people use a balanced triangle wave 00:37:34.840 --> 00:37:35.740 align:middle line:90% like this. 00:37:35.740 --> 00:37:37.660 align:middle line:84% Mostly for DC-to-DC converters, where 00:37:37.660 --> 00:37:39.118 align:middle line:84% they don't care about the switching 00:37:39.118 --> 00:37:42.050 align:middle line:84% ripple, the detailed harmonic content of the switching ripple, 00:37:42.050 --> 00:37:45.190 align:middle line:84% they often use a sawtooth because it's a little bit easier 00:37:45.190 --> 00:37:45.700 align:middle line:90% to generate. 00:37:45.700 --> 00:37:47.700 align:middle line:84% But either of them are legit, and either of them 00:37:47.700 --> 00:37:49.550 align:middle line:90% do the same thing. 00:37:49.550 --> 00:37:50.330 align:middle line:90% Questions? 00:37:50.330 --> 00:37:53.420 align:middle line:90% 00:37:53.420 --> 00:37:55.880 align:middle line:84% And I will say that, by the way, if I 00:37:55.880 --> 00:38:01.440 align:middle line:84% want to synthesize a sine wave voltage, 00:38:01.440 --> 00:38:03.020 align:middle line:90% this will let me do that. 00:38:03.020 --> 00:38:06.210 align:middle line:90% 00:38:06.210 --> 00:38:09.820 align:middle line:90% One way I could do this-- 00:38:09.820 --> 00:38:12.340 align:middle line:84% I'm showing this for one half bridge, 00:38:12.340 --> 00:38:17.170 align:middle line:84% but we don't have a half bridge, We tend to have a full bridge-- 00:38:17.170 --> 00:38:21.020 align:middle line:84% two half bridges that are working together. 00:38:21.020 --> 00:38:25.490 align:middle line:84% And now, there are a lot of ways I can do my control, 00:38:25.490 --> 00:38:30.260 align:middle line:84% One thing I might do is say, look, this scheme-- 00:38:30.260 --> 00:38:33.470 align:middle line:84% if I have a triangle between 0 and some positive number, 00:38:33.470 --> 00:38:37.220 align:middle line:84% call it 0 and 1, I can take, then, a reference voltage 00:38:37.220 --> 00:38:40.230 align:middle line:84% and make my reference voltage between 0 and VDC. 00:38:40.230 --> 00:38:42.290 align:middle line:84% I can synthesize an average voltage between 0 00:38:42.290 --> 00:38:44.230 align:middle line:90% and VDC with a half bridge. 00:38:44.230 --> 00:38:46.900 align:middle line:90% 00:38:46.900 --> 00:38:50.860 align:middle line:84% Well, maybe what I'll do is I'll just do that right here 00:38:50.860 --> 00:38:53.350 align:middle line:90% with this half bridge. 00:38:53.350 --> 00:38:56.380 align:middle line:84% So based on the triangle comparison, 00:38:56.380 --> 00:39:01.990 align:middle line:84% I can synthesize this voltage to be anywhere between 0 and VDC. 00:39:01.990 --> 00:39:04.120 align:middle line:84% If I want my output to be positive, 00:39:04.120 --> 00:39:06.630 align:middle line:84% maybe I just turn on this switch. 00:39:06.630 --> 00:39:08.940 align:middle line:84% And I can synthesize anything between 0 to 0 00:39:08.940 --> 00:39:10.060 align:middle line:90% and VDC on this side. 00:39:10.060 --> 00:39:13.010 align:middle line:90% So Vx is between 0 and VDC. 00:39:13.010 --> 00:39:15.830 align:middle line:84% Or if I want my Vx to be negative, 00:39:15.830 --> 00:39:18.800 align:middle line:90% I'll turn on this switch. 00:39:18.800 --> 00:39:21.230 align:middle line:84% I'll make this signal q of T, and I'll switch 00:39:21.230 --> 00:39:22.680 align:middle line:90% this guy just the opposite. 00:39:22.680 --> 00:39:25.940 align:middle line:84% And I can synthesize my load voltage going negative, 00:39:25.940 --> 00:39:28.480 align:middle line:90% from the top. 00:39:28.480 --> 00:39:31.660 align:middle line:84% So in that case, I would have one half bridge that's 00:39:31.660 --> 00:39:37.330 align:middle line:84% doing pulse-width modulation and another half bridge that's 00:39:37.330 --> 00:39:39.355 align:middle line:84% doing what we call unfolding, deciding 00:39:39.355 --> 00:39:41.730 align:middle line:84% am I going to get a positive output or a negative output? 00:39:41.730 --> 00:39:44.370 align:middle line:90% 00:39:44.370 --> 00:39:45.730 align:middle line:90% When would I like to do that? 00:39:45.730 --> 00:39:48.313 align:middle line:84% I would like to do that when I have one set of switches that's 00:39:48.313 --> 00:39:50.610 align:middle line:84% really good at high-frequency switching and another set 00:39:50.610 --> 00:39:53.965 align:middle line:84% of switches that's got really low conduction loss, 00:39:53.965 --> 00:39:56.340 align:middle line:84% but they don't switch very often because they only switch 00:39:56.340 --> 00:39:58.790 align:middle line:90% when the voltage reverses. 00:39:58.790 --> 00:40:00.595 align:middle line:84% Any questions about that kind of scheme? 00:40:00.595 --> 00:40:04.190 align:middle line:90% 00:40:04.190 --> 00:40:06.840 align:middle line:84% Now, that seems good if I have two different kinds of switches. 00:40:06.840 --> 00:40:08.300 align:middle line:84% But on the other hand, a lot of time, 00:40:08.300 --> 00:40:10.340 align:middle line:84% if I'm just going to have four switches, like in that board 00:40:10.340 --> 00:40:12.590 align:middle line:84% I passed around, all the four switches are the same, 00:40:12.590 --> 00:40:14.820 align:middle line:84% That's maybe not a great way to do it. 00:40:14.820 --> 00:40:18.020 align:middle line:84% I'd like to balance my switching across all the switches, 00:40:18.020 --> 00:40:22.195 align:middle line:84% So maybe-- another way I could do it is shown here. 00:40:22.195 --> 00:40:29.080 align:middle line:90% 00:40:29.080 --> 00:40:32.830 align:middle line:84% So this is the scheme I just described to you. 00:40:32.830 --> 00:40:38.620 align:middle line:90% So we will make the-- 00:40:38.620 --> 00:40:41.650 align:middle line:84% we will put through the reference waveform that's-- 00:40:41.650 --> 00:40:48.850 align:middle line:84% if I'm synthesizing a sine wave, I will make one side modulate 00:40:48.850 --> 00:40:52.090 align:middle line:84% like this, and then I'll flip the switches on the other side 00:40:52.090 --> 00:40:57.030 align:middle line:84% to unfold it and get the signal I want. 00:40:57.030 --> 00:41:01.890 align:middle line:84% Or I could say, OK, when my output voltage is positive, 00:41:01.890 --> 00:41:07.500 align:middle line:84% I'll modulate this side of the bridge and hold this switch on. 00:41:07.500 --> 00:41:09.210 align:middle line:84% When my output voltage is negative, 00:41:09.210 --> 00:41:11.130 align:middle line:84% I'll hold this switch on and modulate 00:41:11.130 --> 00:41:12.510 align:middle line:90% this side of the bridge. 00:41:12.510 --> 00:41:15.180 align:middle line:84% And I can do it with this same signal. 00:41:15.180 --> 00:41:18.020 align:middle line:84% That way, the waveforms are balanced 00:41:18.020 --> 00:41:19.800 align:middle line:90% across the half bridges. 00:41:19.800 --> 00:41:22.390 align:middle line:84% One half bridge switches when it's positive. 00:41:22.390 --> 00:41:23.890 align:middle line:84% And the other one has one switch on. 00:41:23.890 --> 00:41:25.932 align:middle line:84% and the other switch switches when it's positive, 00:41:25.932 --> 00:41:29.270 align:middle line:84% and the other half bridge has one switch on. 00:41:29.270 --> 00:41:31.110 align:middle line:84% Does that make sense to everybody? 00:41:31.110 --> 00:41:32.200 align:middle line:90% Which one do I use? 00:41:32.200 --> 00:41:35.450 align:middle line:90% It depends on my design. 00:41:35.450 --> 00:41:37.610 align:middle line:84% Now I'll show you the technique that actually 00:41:37.610 --> 00:41:40.430 align:middle line:84% gets used in the system that that board's going into, 00:41:40.430 --> 00:41:43.420 align:middle line:90% and that looks more like this. 00:41:43.420 --> 00:41:49.600 align:middle line:84% And this is kind of cool because this basically 00:41:49.600 --> 00:41:52.210 align:middle line:84% relates back to what we were talking about, 00:41:52.210 --> 00:41:54.910 align:middle line:84% about interleaving and harmonic cancellation. 00:41:54.910 --> 00:41:57.160 align:middle line:84% Only now I'm not thinking about harmonic cancellation 00:41:57.160 --> 00:42:01.420 align:middle line:84% of the fundamental waveform, but rather the switching contents. 00:42:01.420 --> 00:42:03.945 align:middle line:90% Here's the trick. 00:42:03.945 --> 00:42:07.410 align:middle line:90% Suppose I have two comparators. 00:42:07.410 --> 00:42:09.240 align:middle line:84% And I'll have one triangle wave, and let me 00:42:09.240 --> 00:42:10.750 align:middle line:90% make the triangle wave bipolar. 00:42:10.750 --> 00:42:12.727 align:middle line:90% It goes from minus 1 to plus 1. 00:42:12.727 --> 00:42:14.310 align:middle line:84% And then I'm going to have a reference 00:42:14.310 --> 00:42:18.640 align:middle line:90% signal that goes like this. 00:42:18.640 --> 00:42:21.760 align:middle line:90% And so what am I going to do? 00:42:21.760 --> 00:42:24.640 align:middle line:84% The top bridge I'm going to switch when the reference 00:42:24.640 --> 00:42:26.800 align:middle line:84% signal is bigger than the triangle wave, 00:42:26.800 --> 00:42:28.980 align:middle line:90% just like I told you. 00:42:28.980 --> 00:42:31.650 align:middle line:84% But now the triangle wave goes to minus 1, 00:42:31.650 --> 00:42:33.940 align:middle line:84% and the reference signal will go to minus 1. 00:42:33.940 --> 00:42:35.850 align:middle line:84% I've just shifted them both down. 00:42:35.850 --> 00:42:39.990 align:middle line:84% The other bridge, I do the same thing, 00:42:39.990 --> 00:42:44.320 align:middle line:84% except that I put negative 1 on the reference signal. 00:42:44.320 --> 00:42:48.430 align:middle line:84% So basically, the other guy switches 180 degrees out 00:42:48.430 --> 00:42:51.340 align:middle line:84% of phase of the switching frequency. 00:42:51.340 --> 00:42:54.160 align:middle line:84% And I get an output switching waveform that's 00:42:54.160 --> 00:42:56.140 align:middle line:90% also pulse-width modulated. 00:42:56.140 --> 00:42:59.350 align:middle line:84% But if each of these clocks, or if this clock 00:42:59.350 --> 00:43:02.650 align:middle line:84% was at 100 kilohertz, the output ripple basically 00:43:02.650 --> 00:43:05.710 align:middle line:90% would be near 200 kilohertz. 00:43:05.710 --> 00:43:08.970 align:middle line:84% So the left side of the-- the left, half bridge 00:43:08.970 --> 00:43:10.220 align:middle line:90% is switching at 100 kilohertz. 00:43:10.220 --> 00:43:12.387 align:middle line:84% The right half bridge is switching at 100 kilohertz. 00:43:12.387 --> 00:43:14.170 align:middle line:84% But the ripple that I get at the output, 00:43:14.170 --> 00:43:16.180 align:middle line:84% because the fundamentals are canceling 00:43:16.180 --> 00:43:18.250 align:middle line:84% of the ripple frequency, is, like, 200 kilohertz, 00:43:18.250 --> 00:43:23.110 align:middle line:84% or it's around 200 kilohertz because there's 00:43:23.110 --> 00:43:25.960 align:middle line:84% some very slight variation in the frequency 00:43:25.960 --> 00:43:29.940 align:middle line:84% content of the output because of the reference. 00:43:29.940 --> 00:43:31.590 align:middle line:84% But if I was putting out a DC signal, 00:43:31.590 --> 00:43:33.660 align:middle line:90% it would be 200 kilohertz. 00:43:33.660 --> 00:43:35.970 align:middle line:90% Any questions about that? 00:43:35.970 --> 00:43:38.213 align:middle line:84% And in fact, that's what we do in that design. 00:43:38.213 --> 00:43:40.380 align:middle line:84% AUDIENCE: Where is the reference signal coming from? 00:43:40.380 --> 00:43:43.663 align:middle line:84% Is this whole idea just to amplify the reference? 00:43:43.663 --> 00:43:45.580 align:middle line:84% DAVID PERREAULT: That's an excellent question. 00:43:45.580 --> 00:43:47.330 align:middle line:84% Where is the reference signal coming from. 00:43:47.330 --> 00:43:49.170 align:middle line:84% The reference signal is coming from whatever 00:43:49.170 --> 00:43:51.360 align:middle line:90% you want for your output. 00:43:51.360 --> 00:43:55.170 align:middle line:84% So in our case, we might say, for some operating condition, 00:43:55.170 --> 00:43:58.920 align:middle line:84% I want this many volts AC sinusoid at my output 00:43:58.920 --> 00:44:02.670 align:middle line:84% at certain frequency, and feed that in-- 00:44:02.670 --> 00:44:05.160 align:middle line:84% feed that through a DAC and put that into a sine triangle, 00:44:05.160 --> 00:44:07.210 align:middle line:84% or do the digital equivalent of that. 00:44:07.210 --> 00:44:13.260 align:middle line:84% Or if I wanted to build an audio amplifier, 00:44:13.260 --> 00:44:15.630 align:middle line:84% I might have some D-to-A converter that's 00:44:15.630 --> 00:44:17.680 align:middle line:90% spitting out my audio signal. 00:44:17.680 --> 00:44:21.420 align:middle line:84% And this is the audio signal that I want to amplify. 00:44:21.420 --> 00:44:23.070 align:middle line:84% And the voltage across the output 00:44:23.070 --> 00:44:25.410 align:middle line:84% is going to be the amplified version of this reference 00:44:25.410 --> 00:44:26.870 align:middle line:90% signal. 00:44:26.870 --> 00:44:28.740 align:middle line:90% So if that's Mozart. 00:44:28.740 --> 00:44:32.720 align:middle line:84% Mozart comes out the other end at high power into your-- maybe 00:44:32.720 --> 00:44:35.410 align:middle line:84% this is a model for your speaker coil. 00:44:35.410 --> 00:44:36.190 align:middle line:90% That make sense? 00:44:36.190 --> 00:44:39.640 align:middle line:84% In fact, I should say most audio amps today-- 00:44:39.640 --> 00:44:42.370 align:middle line:84% if you go by a car audio amp or something like that-- 00:44:42.370 --> 00:44:44.180 align:middle line:84% they tend to use switching amplifiers. 00:44:44.180 --> 00:44:46.060 align:middle line:84% They don't use linear amps anymore 00:44:46.060 --> 00:44:50.237 align:middle line:84% because they're just way, way more power efficient. 00:44:50.237 --> 00:44:52.570 align:middle line:84% Same reason why you'd go to a DC-to-DC converter instead 00:44:52.570 --> 00:44:53.720 align:middle line:90% of a linear regulator. 00:44:53.720 --> 00:44:57.760 align:middle line:84% People do audio amps with switching these days. 00:44:57.760 --> 00:44:58.590 align:middle line:90% Excellent question. 00:44:58.590 --> 00:44:59.450 align:middle line:90% Other questions? 00:44:59.450 --> 00:45:00.040 align:middle line:90% Yeah, Jack. 00:45:00.040 --> 00:45:03.797 align:middle line:84% AUDIENCE: What is the input frequency limit for that signal? 00:45:03.797 --> 00:45:05.630 align:middle line:84% DAVID PERREAULT: Ah, That's a good question. 00:45:05.630 --> 00:45:10.570 align:middle line:84% So there's a couple things that drive that. 00:45:10.570 --> 00:45:17.370 align:middle line:84% One of them is that the output frequency-- 00:45:17.370 --> 00:45:21.830 align:middle line:84% if I actually looked at the spectrum of the output, Vx-- 00:45:21.830 --> 00:45:25.910 align:middle line:84% it kind of contains mixing between the reference signal 00:45:25.910 --> 00:45:30.050 align:middle line:90% and the PWM carrier signal. 00:45:30.050 --> 00:45:32.702 align:middle line:84% So generally, you need the reference 00:45:32.702 --> 00:45:34.160 align:middle line:84% you want to synthesize-- typically, 00:45:34.160 --> 00:45:36.800 align:middle line:84% you want it to be much lower frequency content 00:45:36.800 --> 00:45:38.630 align:middle line:90% than the carrier. 00:45:38.630 --> 00:45:41.990 align:middle line:84% And how high a carrier-- that depends on how much distortion 00:45:41.990 --> 00:45:43.490 align:middle line:90% you want to allow in your-- 00:45:43.490 --> 00:45:45.580 align:middle line:84% say, your output voltage or current. 00:45:45.580 --> 00:45:48.110 align:middle line:90% 00:45:48.110 --> 00:45:50.510 align:middle line:84% The other kind of thing you have to think about 00:45:50.510 --> 00:45:53.520 align:middle line:84% is, what does that look like compared to this load? 00:45:53.520 --> 00:45:57.917 align:middle line:84% So if this load was inductive resistive, the R over L 00:45:57.917 --> 00:45:59.750 align:middle line:84% constant-- you'd have to have your switching 00:45:59.750 --> 00:46:03.240 align:middle line:84% frequency high enough that the switching 00:46:03.240 --> 00:46:04.890 align:middle line:90% stuff's going to get filtered. 00:46:04.890 --> 00:46:08.010 align:middle line:84% And you want the signal you want to get 00:46:08.010 --> 00:46:11.713 align:middle line:84% through that to be cut off enough that it really 00:46:11.713 --> 00:46:12.630 align:middle line:90% generates the current. 00:46:12.630 --> 00:46:16.293 align:middle line:84% Or if there's-- if you're interested in the amount getting 00:46:16.293 --> 00:46:18.960 align:middle line:84% across the resistor, you'd have to have an upper bound on that-- 00:46:18.960 --> 00:46:22.120 align:middle line:90% from that, too. 00:46:22.120 --> 00:46:22.725 align:middle line:90% Yeah. 00:46:22.725 --> 00:46:24.100 align:middle line:84% AUDIENCE: So would this technique 00:46:24.100 --> 00:46:25.380 align:middle line:90% be used for a solar inverter? 00:46:25.380 --> 00:46:26.530 align:middle line:90% [INAUDIBLE]? 00:46:26.530 --> 00:46:28.150 align:middle line:90% DAVID PERREAULT: Sure. 00:46:28.150 --> 00:46:29.750 align:middle line:90% That's a very good question. 00:46:29.750 --> 00:46:33.700 align:middle line:84% If what I was trying to do is do something grid-forming, 00:46:33.700 --> 00:46:37.040 align:middle line:84% meaning I want my inverter to create the grid. 00:46:37.040 --> 00:46:38.630 align:middle line:90% I want an AC output voltage. 00:46:38.630 --> 00:46:43.420 align:middle line:84% Yes, I would synthesize a sine wave that would be-- 00:46:43.420 --> 00:46:45.790 align:middle line:84% if I wanted to keep it simple, a single phase-- 00:46:45.790 --> 00:46:46.670 align:middle line:90% 120 volts. 00:46:46.670 --> 00:46:48.100 align:middle line:90% It's 170 peak. 00:46:48.100 --> 00:46:51.520 align:middle line:84% And I'd chop it at whatever frequency, and I'd filter it, 00:46:51.520 --> 00:46:54.290 align:middle line:84% and then I'd get, across my load, the voltage I wanted, 00:46:54.290 --> 00:46:56.020 align:middle line:90% hopefully. 00:46:56.020 --> 00:47:00.490 align:middle line:84% If, however, I'm not a grid-forming inverter, 00:47:00.490 --> 00:47:03.080 align:middle line:84% I just want to stick current into the AC grid, 00:47:03.080 --> 00:47:04.400 align:middle line:90% then I don't control voltage. 00:47:04.400 --> 00:47:05.110 align:middle line:90% What I control? 00:47:05.110 --> 00:47:06.040 align:middle line:90% Current. 00:47:06.040 --> 00:47:08.410 align:middle line:84% I would like to be a current source into the grid, 00:47:08.410 --> 00:47:11.490 align:middle line:84% preferably looking like a sine wave. 00:47:11.490 --> 00:47:12.370 align:middle line:90% Excellent question. 00:47:12.370 --> 00:47:14.220 align:middle line:90% How do I do that? 00:47:14.220 --> 00:47:17.700 align:middle line:84% One thing I might want to do is say, OK, I 00:47:17.700 --> 00:47:19.350 align:middle line:90% know that I want to put-- 00:47:19.350 --> 00:47:21.670 align:middle line:84% from my solar current-- from my solar panel. 00:47:21.670 --> 00:47:24.220 align:middle line:84% I have to generate so much power into the grid. 00:47:24.220 --> 00:47:26.580 align:middle line:84% That means I want a 1-amp sine wave. 00:47:26.580 --> 00:47:32.640 align:middle line:84% So I'll have some I reference that might be a 1-amp sine wave 00:47:32.640 --> 00:47:34.990 align:middle line:90% going into the grid. 00:47:34.990 --> 00:47:43.110 align:middle line:84% What I'll do is I will compare that to my inverter. 00:47:43.110 --> 00:47:45.540 align:middle line:84% So I will come back to my inverter. 00:47:45.540 --> 00:47:49.835 align:middle line:84% I will measure this current, I'll call that I inverter. 00:47:49.835 --> 00:47:53.874 align:middle line:90% 00:47:53.874 --> 00:47:54.845 align:middle line:90% Here's I inverter. 00:47:54.845 --> 00:47:57.970 align:middle line:90% 00:47:57.970 --> 00:48:03.070 align:middle line:84% And then that'll be-- this is the error current, I error. 00:48:03.070 --> 00:48:06.066 align:middle line:84% I'll put that in through some big gain compensator. 00:48:06.066 --> 00:48:08.630 align:middle line:90% 00:48:08.630 --> 00:48:10.880 align:middle line:84% Basically, I'll amplify the error, 00:48:10.880 --> 00:48:14.960 align:middle line:84% and then I will use that to create Vref. 00:48:14.960 --> 00:48:18.230 align:middle line:84% So the bigger the error, my current is too low, 00:48:18.230 --> 00:48:21.080 align:middle line:84% I get a bigger reference-- drives the current up, 00:48:21.080 --> 00:48:24.365 align:middle line:90% and you close the loop that way. 00:48:24.365 --> 00:48:25.740 align:middle line:84% AUDIENCE: Where did you get Iref? 00:48:25.740 --> 00:48:27.540 align:middle line:84% DAVID PERREAULT: Iref is coming from saying, 00:48:27.540 --> 00:48:29.410 align:middle line:84% how much current do I want to stick into the grid? 00:48:29.410 --> 00:48:31.077 align:middle line:84% And that's a question of power, and that 00:48:31.077 --> 00:48:33.870 align:middle line:84% comes from maximum power point tracking on your-- 00:48:33.870 --> 00:48:34.998 align:middle line:90% on your design. 00:48:34.998 --> 00:48:36.540 align:middle line:84% And I should say, by the way, there's 00:48:36.540 --> 00:48:39.480 align:middle line:84% a lot of applications where we control current. 00:48:39.480 --> 00:48:43.380 align:middle line:84% Injecting into the grid from solar panels is one. 00:48:43.380 --> 00:48:45.030 align:middle line:84% Another thing is if I have a motor, 00:48:45.030 --> 00:48:47.460 align:middle line:84% torque is proportional to current, 00:48:47.460 --> 00:48:49.140 align:middle line:84% So in a lot of motor drive applications, 00:48:49.140 --> 00:48:51.120 align:middle line:90% I don't just control voltage. 00:48:51.120 --> 00:48:54.640 align:middle line:84% I say, how much sinusoidal current do I want to feed it? 00:48:54.640 --> 00:48:56.340 align:middle line:90% And so I've got to-- 00:48:56.340 --> 00:48:58.413 align:middle line:84% ultimately, I'm trying my command-- 00:48:58.413 --> 00:49:01.080 align:middle line:84% the thing that's I'm controlling to control torque, for example, 00:49:01.080 --> 00:49:03.390 align:middle line:90% is going to be current. 00:49:03.390 --> 00:49:05.453 align:middle line:84% Now, this is one way to do things. 00:49:05.453 --> 00:49:06.870 align:middle line:84% And the beautiful thing about this 00:49:06.870 --> 00:49:10.300 align:middle line:84% is everything's more or less fixed switching frequency, 00:49:10.300 --> 00:49:13.310 align:middle line:84% I know exactly how many times I'm going to switch per cycle. 00:49:13.310 --> 00:49:15.770 align:middle line:84% And I can take that to the bank because I 00:49:15.770 --> 00:49:19.992 align:middle line:84% know maybe my switching loss and my loss of my inverter. 00:49:19.992 --> 00:49:21.450 align:middle line:84% Are there other ways you can do it? 00:49:21.450 --> 00:49:22.590 align:middle line:90% Sure. 00:49:22.590 --> 00:49:25.060 align:middle line:90% Here's another one. 00:49:25.060 --> 00:49:26.857 align:middle line:84% And I should say-- all these things I say, 00:49:26.857 --> 00:49:28.690 align:middle line:84% oh, you could do this, or you could do this. 00:49:28.690 --> 00:49:30.230 align:middle line:90% People do all of them. 00:49:30.230 --> 00:49:31.730 align:middle line:84% It just depends on your application. 00:49:31.730 --> 00:49:32.900 align:middle line:90% Here's another idea. 00:49:32.900 --> 00:49:34.540 align:middle line:90% Maybe I would do this. 00:49:34.540 --> 00:49:37.330 align:middle line:84% Maybe I would have some current reference, Iref. 00:49:37.330 --> 00:49:40.090 align:middle line:90% 00:49:40.090 --> 00:49:49.030 align:middle line:84% And I would have I would create Iref plus delta I, 00:49:49.030 --> 00:49:57.140 align:middle line:84% and maybe Iref minus delta I A hysteresis band. 00:49:57.140 --> 00:50:02.020 align:middle line:84% I'll say, OK, if I'm here turn on the top switch 00:50:02.020 --> 00:50:04.270 align:middle line:84% so that I have higher voltage applied. 00:50:04.270 --> 00:50:10.480 align:middle line:84% And the IL-- this is the I inverter-- 00:50:10.480 --> 00:50:15.355 align:middle line:84% will go up until I hit this top threshold where it's Iref-- 00:50:15.355 --> 00:50:16.780 align:middle line:90% it's delta I too big. 00:50:16.780 --> 00:50:18.520 align:middle line:84% And then I'll turn on the bottom switch, 00:50:18.520 --> 00:50:20.470 align:middle line:90% and the current will fall. 00:50:20.470 --> 00:50:24.400 align:middle line:90% And I'll just chop it like that. 00:50:24.400 --> 00:50:27.400 align:middle line:84% And if I zoomed out, what I would get 00:50:27.400 --> 00:50:31.700 align:middle line:90% is some waveform that does this. 00:50:31.700 --> 00:50:33.590 align:middle line:84% And maybe I could synthesize a sine wave, 00:50:33.590 --> 00:50:37.070 align:middle line:84% or I could synthesize my music waveform, whatever I wanted. 00:50:37.070 --> 00:50:40.090 align:middle line:84% So this is known as hysteretic current control. 00:50:40.090 --> 00:50:50.570 align:middle line:90% 00:50:50.570 --> 00:50:55.550 align:middle line:84% Its advantage is I guarantee that once I get into this, 00:50:55.550 --> 00:50:58.920 align:middle line:84% I'm always going to be within 2 delta I of my reference. 00:50:58.920 --> 00:51:01.580 align:middle line:84% So I kind of control the current very directly. 00:51:01.580 --> 00:51:05.070 align:middle line:84% The downside is what rate does this thing switch at? 00:51:05.070 --> 00:51:07.710 align:middle line:84% Well, that's a bunch of analysis, but it varies. 00:51:07.710 --> 00:51:12.160 align:middle line:84% It depends upon the load and everything else, and the band. 00:51:12.160 --> 00:51:14.813 align:middle line:84% So you don't get to really say exactly what frequency you're 00:51:14.813 --> 00:51:15.480 align:middle line:90% going to run it. 00:51:15.480 --> 00:51:18.005 align:middle line:84% You can analyze it, but it's a variable frequency thing. 00:51:18.005 --> 00:51:19.880 align:middle line:84% Sometimes I really don't like that because it 00:51:19.880 --> 00:51:23.540 align:middle line:84% affects my EMI and my filter design and everything else. 00:51:23.540 --> 00:51:28.250 align:middle line:84% So depending upon whether you want to do this or that just 00:51:28.250 --> 00:51:29.450 align:middle line:90% depends on the application. 00:51:29.450 --> 00:51:32.290 align:middle line:90% People do both. 00:51:32.290 --> 00:51:34.760 align:middle line:90% We are pretty much out of time. 00:51:34.760 --> 00:51:37.043 align:middle line:84% The last thing we'll show you-- and I'll just 00:51:37.043 --> 00:51:37.960 align:middle line:90% show you really quick. 00:51:37.960 --> 00:51:41.110 align:middle line:90% We talked about doing PWM. 00:51:41.110 --> 00:51:46.121 align:middle line:90% And I'll just show you-- 00:51:46.121 --> 00:51:46.760 align:middle line:90% let's see. 00:51:46.760 --> 00:51:47.590 align:middle line:90% I got to go back. 00:51:47.590 --> 00:51:51.830 align:middle line:90% 00:51:51.830 --> 00:51:52.960 align:middle line:90% Here you go. 00:51:52.960 --> 00:51:57.960 align:middle line:84% This is precisely the digital equivalent of sine triangle PWM. 00:51:57.960 --> 00:52:03.620 align:middle line:84% And what you can see here is that there's 00:52:03.620 --> 00:52:05.840 align:middle line:84% a ton of switching going on in the blue waveform, 00:52:05.840 --> 00:52:07.760 align:middle line:90% That's the inverter output. 00:52:07.760 --> 00:52:11.510 align:middle line:84% But in the red waveform, which shows the spectral content, 00:52:11.510 --> 00:52:14.030 align:middle line:84% at low frequencies, you have very much the sine wave 00:52:14.030 --> 00:52:15.420 align:middle line:90% you're synthesizing. 00:52:15.420 --> 00:52:17.360 align:middle line:84% The rest of the junk is kind of spit out 00:52:17.360 --> 00:52:19.550 align:middle line:84% to very high frequencies that are easy to filter, 00:52:19.550 --> 00:52:21.710 align:middle line:90% and I'm not even showing them. 00:52:21.710 --> 00:52:22.830 align:middle line:90% That's how high they are. 00:52:22.830 --> 00:52:25.640 align:middle line:84% So if you really can pump up the volume in your switching 00:52:25.640 --> 00:52:28.280 align:middle line:84% frequency, you can make very pure waveforms. 00:52:28.280 --> 00:52:31.920 align:middle line:84% Even though that's extremely distorted, 00:52:31.920 --> 00:52:33.830 align:middle line:84% all the distortion and stuff you don't like 00:52:33.830 --> 00:52:37.560 align:middle line:84% is such high frequency you can filter it off and get rid of it. 00:52:37.560 --> 00:52:38.760 align:middle line:90% And we are over time. 00:52:38.760 --> 00:52:39.990 align:middle line:90% I apologize. 00:52:39.990 --> 00:52:42.990 align:middle line:84% We will take up a slightly different theme 00:52:42.990 --> 00:52:45.470 align:middle line:90% on this topic next class. 00:52:45.470 --> 00:52:50.000 align:middle line:90%