WEBVTT

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[SQUEAKING]

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[RUSTLING]

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[CLICKING]

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DAVID PERREAULT:
So today, I wanted

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to continue our discussion of
resonant power converters, which

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are power converters, either
inverters or rectifiers or DC

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converters, where the
power is modulated

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through high-frequency
sinusoidal wave forms.

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And this is again,
KPVS chapter 10.

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And last time, we looked at the
characteristics of an example

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resonant network, in particular,
a series resonant network,

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where we said, OK, if we
had some network that we

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were going to drive with a
sinusoid VS cosine of omega t.

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And maybe this would be a
series resonant network.

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So I'd have IL,
VC and R, where we

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are going to deliver energy from
this source into the resistor.

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And we said we could
look at the admittance,

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looking into the network.

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And we said, that looks
something like this.

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If I plotted the magnitude
of the admittance

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on a log scale versus
frequency on a log scale,

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we said, OK, at low
frequencies, the impedance

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is dominated by the--

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the admittance is
dominated by the capacitor.

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So we get omega C.

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At high frequencies, it's
dominated by the inductor.

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So I get 1 over omega L.
And at some frequency,

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the inductance and capacitive
impedances cancel each other.

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And that's at omega 0 is equal
to 1 over the square root of LC.

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And that asymptote
happens at 1 over Z0,

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which is equal to the
square root of C/L.

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And right where these
impedances cancel,

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the admittance
goes to being 1/R.

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So maybe it looks like
something like this.

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I have 1/R, where
it peaks up to.

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So maybe my admittance
characteristic

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looks something like this.

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It rises.

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I'll have some region
about which it peaks up.

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And then it falls.

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And we said, OK, we have--

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if we have a high Q network,
a high-quality factor network,

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which we said, the
quality factor Q

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of the network
evaluated at omega

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equals omega 0, which we might
call Q0, is equal to Z0 over R,

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or the square root
of L/C over R.

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And we said that was exactly the
amount by which this admittance

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characteristic peaks up
above the intersection

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point of the low- and
high-frequency asymptotes.

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So it peaks up by an amount.

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Q0 is equal to the square
root of L/C over R.

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And then the other
thing we said was,

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how broad band is that peaking?

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And if we took the half
power point, the point--

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the bandwidth over which
we deliver half the power

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to the resistor as
we would at exactly

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at resonance where
the inductance

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and capacitance of
impedances cancel each other,

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then we said, OK,
that bandwidth,

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if I took the bandwidth
divided by omega 0,

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the center frequency-- so
the percent bandwidth is

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exactly equal to 1
over Q0, which is

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R over the square root of L/C.

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Now, this was all done
for the series network.

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But we have these
nice relationships

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which tell us how frequency
selective this network is.

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So that's just a quick review of
what we talked about last time.

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How are we going to use
this in a power converter?

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Especially, if it's
a high Q network,

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this high sensitivity
to frequency

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means that by modulating the
frequency of some drive wave

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form, I can very easily
modulate the power going

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into the resistor.

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So using frequency modulation
isn't always the way

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you operate a
resonant converter.

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But it's a very common way to
operate a resonant converter.

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So if we were to think
about making an inverter,

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then by controlling frequency
either above or below resonance,

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we can turn down the power.

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And when we're
right at resonance,

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VS appears across the resistor.

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So that's the maximum voltage
I can generate in the resistor

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because that's where the
inductor and capacitive

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impedances are canceling.

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And at any other
frequency, I'm going

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to have either a net
effective inductive reactance

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or capacitive
reactance in series.

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So I get a voltage divider.

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My admittance goes down,
and I deliver less power.

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Any questions about that?

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So let's think about
a basic design.

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Here's what we might do.

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How am I going to
get this drive?

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Well, it doesn't have to be
a sinusoidal drive, in part

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because this network is very,
very frequency selective.

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So I could drive with some
other voltage wave form

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and extract out the fundamental
component going to the resistor.

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So maybe what I would do--

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and this could either
be called a half bridge

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inverter, resonant inverter,
series resonant inverter.

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Somebody in the RF field
might call it a class D power

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amplifier.

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That's another term
that gets used.

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But it could look like this.

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Maybe I'll have some voltage
VDC, a pair of switches.

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And let's assume they're
MOSFETs for a second.

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So internally, they
have these body

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diodes that I'll just
draw for fun here.

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And we can say, OK, I have L.
And I have some current I sub

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L. I have V sub C, which is
going to block any DC component.

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And then I have my
output voltage, V sub R,

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which I'm-- to which I'm
going to deliver energy.

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And I might call this
voltage here V sub X.

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So what is V sub X
going to look like?

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If I just operate these two
switches at 50% duty ratio,

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maybe V sub X looks
something like this.

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It modulates between VDC and 0.

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At some switching frequency,
that maybe varies.

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So this may be 2
pi over f switch.

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And this is in time.

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And this is pi over fS.

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So I'm going to run this, for
example, at 50% duty ratio.

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So if I did that and I
looked-- thought about--

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this is my wave form VX--

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what's important
about VX in here?

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Well, I'm going to run this.

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I'm going to apply this to
this very frequency-selective

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network.

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And let me assume that I'm going
to be somewhere near resonance

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such that the current
is going to be

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the voltage times
the admittance here.

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So if I thought about this,
maybe I would say, well,

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what does VX look
like in frequency?

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In the frequency
domain, I could think

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of VX of j omega, which
would look like what?

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Well, I would have
a DC term, which

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is basically related to the
average value of the wave form.

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And then I would have--

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at 2 pi fS, I would have
some frequency content.

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And at minus 2 pi over fS, I'd
have the same frequency content.

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And then there's
no second harmonic,

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because this is half-wave
symmetric, or at least the AC

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component's half-wave symmetric.

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And so then the next thing would
be the third harmonic out here.

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And if I think about
this, and if you

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wanted to use the exponential
series, the height of this

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is 2 pi times VDC over pi.

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And here would be
2 pi VDC over 3 pi.

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So the third harmonic is one
third of the fundamental.

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And it falls off as 1/n
with n-odd harmonics.

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But what's important
about this wave form is

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if I believe that
this network is going

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to be doing a good job of
filtering this square wave,

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in terms of what's important for
driving current in this network,

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as long as this looks
like a high impedance

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or a low admittance--

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I'm looking in here.

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This is Y in.

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As long as the admittance
low with 0 at DC,

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because of the capacitor-- so I
don't really care about the DC

00:10:49.780 --> 00:10:51.040 align:middle line:90%
component--

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and as long as this looks
like a high impedance

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or a low admittance
at the third harmonic,

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the only element I really
care about is the fundamental.

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So I could then just
say, let me just

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think about the fundamental
component driving the network.

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And so maybe I would
mentally approximate this

00:11:17.620 --> 00:11:18.966 align:middle line:90%
as the following.

00:11:18.966 --> 00:11:22.980 align:middle line:90%


00:11:22.980 --> 00:11:29.070 align:middle line:84%
I call this VX1, the
fundamental component,

00:11:29.070 --> 00:11:37.650 align:middle line:84%
which would be VX1 of t would
be equal to 2 over pi VDC.

00:11:37.650 --> 00:11:40.830 align:middle line:90%


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In this case, I've
drawn it as a sine.

00:11:42.695 --> 00:11:44.070 align:middle line:84%
So I guess it
would be sine omega

00:11:44.070 --> 00:11:49.660 align:middle line:84%
t, if I only thought about
the fundamental component.

00:11:49.660 --> 00:11:53.680 align:middle line:84%
Or I could model it
exactly as VX over here

00:11:53.680 --> 00:11:55.930 align:middle line:84%
and think about the
square wave component.

00:11:55.930 --> 00:12:00.370 align:middle line:84%
And then I run this
into my network.

00:12:00.370 --> 00:12:06.100 align:middle line:90%


00:12:06.100 --> 00:12:11.560 align:middle line:84%
And if I look at this then,
what am I going to get?

00:12:11.560 --> 00:12:13.750 align:middle line:90%
I'm going to get a current.

00:12:13.750 --> 00:12:18.070 align:middle line:84%
Let me call this IL, which
is also the resistor current.

00:12:18.070 --> 00:12:25.500 align:middle line:84%
IL of j omega S is
simply going is simply

00:12:25.500 --> 00:12:37.710 align:middle line:84%
going to be equal to VX of j
omega S times Y in of j omega S.

00:12:37.710 --> 00:12:42.420 align:middle line:84%
In fact, if I'm going to do
it, let me just be careful.

00:12:42.420 --> 00:12:45.660 align:middle line:84%
If I'm just going to do
this in the Laplace domain

00:12:45.660 --> 00:12:48.270 align:middle line:84%
and not worry about
specific frequency content,

00:12:48.270 --> 00:12:50.340 align:middle line:84%
maybe I would just
say this is going

00:12:50.340 --> 00:12:53.760 align:middle line:84%
to be IL of S is VX
of S times Y in of S.

00:12:53.760 --> 00:12:58.185 align:middle line:84%
And then I can evaluate
that in the frequency domain

00:12:58.185 --> 00:13:00.480 align:middle line:90%
on S equals j omega.

00:13:00.480 --> 00:13:02.790 align:middle line:90%
But here's the point.

00:13:02.790 --> 00:13:08.980 align:middle line:84%
If everything gets filtered
except for the fundamental,

00:13:08.980 --> 00:13:21.930 align:middle line:84%
then I would expect
IL of t will be only

00:13:21.930 --> 00:13:26.540 align:middle line:84%
a sinusoid at the fundamental
switching frequency.

00:13:26.540 --> 00:13:29.690 align:middle line:90%


00:13:29.690 --> 00:13:33.970 align:middle line:84%
So that's what we call
the fundamental harmonic

00:13:33.970 --> 00:13:35.800 align:middle line:90%
approximation.

00:13:35.800 --> 00:13:39.820 align:middle line:84%
What I'm assuming is
this resonant tank

00:13:39.820 --> 00:13:44.680 align:middle line:84%
is sufficiently frequency
selective that I can ignore all

00:13:44.680 --> 00:13:46.430 align:middle line:90%
the nonfundamental components.

00:13:46.430 --> 00:13:49.900 align:middle line:84%
I can ignore DC perfectly,
because there's no DC component.

00:13:49.900 --> 00:13:52.630 align:middle line:84%
But whatever third
harmonic shows up,

00:13:52.630 --> 00:13:55.510 align:middle line:84%
I just assume the admittance
down to the third harmonic

00:13:55.510 --> 00:13:56.360 align:middle line:90%
is really low.

00:13:56.360 --> 00:14:00.200 align:middle line:90%


00:14:00.200 --> 00:14:03.290 align:middle line:84%
For example, if my
fundamental were here,

00:14:03.290 --> 00:14:06.260 align:middle line:84%
maybe my second
harmonic is here.

00:14:06.260 --> 00:14:08.210 align:middle line:84%
My third harmonic
is way down here.

00:14:08.210 --> 00:14:09.920 align:middle line:84%
You started off at a
third of the height.

00:14:09.920 --> 00:14:13.170 align:middle line:84%
And then it's got this
much bigger attenuation.

00:14:13.170 --> 00:14:16.070 align:middle line:84%
Maybe I just ignore the higher
harmonic content of the current

00:14:16.070 --> 00:14:20.030 align:middle line:84%
and just pretend this
perfect sinusoid.

00:14:20.030 --> 00:14:22.582 align:middle line:90%
Any questions about that?

00:14:22.582 --> 00:14:24.040 align:middle line:84%
AUDIENCE: You're
saying we can make

00:14:24.040 --> 00:14:25.810 align:middle line:84%
this approximation
because we're close

00:14:25.810 --> 00:14:27.000 align:middle line:90%
to that resonant frequency?

00:14:27.000 --> 00:14:28.250 align:middle line:90%
DAVID PERREAULT: That's right.

00:14:28.250 --> 00:14:31.630 align:middle line:84%
And there are times when that
approximation breaks down.

00:14:31.630 --> 00:14:33.190 align:middle line:90%
And we'll talk about that.

00:14:33.190 --> 00:14:38.230 align:middle line:84%
But to first order, for basic
analysis of resonant converters,

00:14:38.230 --> 00:14:40.780 align:middle line:84%
we often make the
assumption that

00:14:40.780 --> 00:14:43.840 align:middle line:84%
at least as far as the
current I'm going to get

00:14:43.840 --> 00:14:47.680 align:middle line:84%
is concerned, I can just
focus on the fundamental

00:14:47.680 --> 00:14:50.560 align:middle line:84%
and just think of
that current as being

00:14:50.560 --> 00:14:54.640 align:middle line:84%
a sine wave with a
magnitude that's determined

00:14:54.640 --> 00:15:00.210 align:middle line:84%
by the magnitude of the voltage
I'm driving with times whatever

00:15:00.210 --> 00:15:05.790 align:middle line:84%
the amplitude is here, in
terms of the admittance.

00:15:05.790 --> 00:15:08.270 align:middle line:90%
Any questions about that?

00:15:08.270 --> 00:15:11.240 align:middle line:84%
And then, of course, the
power is then I squared R.

00:15:11.240 --> 00:15:13.910 align:middle line:90%
So we get a lot of attenuation.

00:15:13.910 --> 00:15:15.390 align:middle line:84%
We get a very steep
characteristic

00:15:15.390 --> 00:15:16.800 align:middle line:90%
of that very frequency.

00:15:16.800 --> 00:15:19.660 align:middle line:90%


00:15:19.660 --> 00:15:20.260 align:middle line:90%
All right.

00:15:20.260 --> 00:15:22.023 align:middle line:84%
So we get an
approximate sinusoid.

00:15:22.023 --> 00:15:24.730 align:middle line:90%


00:15:24.730 --> 00:15:26.860 align:middle line:90%
So I could say--

00:15:26.860 --> 00:15:33.670 align:middle line:84%
I could write then here that the
component at the fundamental--

00:15:33.670 --> 00:15:37.660 align:middle line:90%
I have IL of t here.

00:15:37.660 --> 00:15:42.430 align:middle line:84%
But I could relate that
back and forth with IL

00:15:42.430 --> 00:15:53.250 align:middle line:84%
of j omega S, which
is equal to VX1,

00:15:53.250 --> 00:15:56.280 align:middle line:84%
the amplitude of
the fundamental,

00:15:56.280 --> 00:16:04.560 align:middle line:84%
times Y in of j omega S. And
it's the fact that this--

00:16:04.560 --> 00:16:06.690 align:middle line:84%
the admittance is so
frequency selective

00:16:06.690 --> 00:16:08.045 align:middle line:90%
that lets me modulate power.

00:16:08.045 --> 00:16:10.610 align:middle line:90%


00:16:10.610 --> 00:16:12.200 align:middle line:90%
All right.

00:16:12.200 --> 00:16:14.580 align:middle line:84%
Let's think about
how we could do that.

00:16:14.580 --> 00:16:16.730 align:middle line:84%
We could modulate
power, actually,

00:16:16.730 --> 00:16:20.670 align:middle line:84%
by going in either
direction off of resonance.

00:16:20.670 --> 00:16:22.490 align:middle line:90%
I would get maximum--

00:16:22.490 --> 00:16:25.430 align:middle line:84%
according to this, if I put my
switching frequency right here,

00:16:25.430 --> 00:16:28.250 align:middle line:84%
I'd get maximum power
for a given voltage.

00:16:28.250 --> 00:16:31.520 align:middle line:84%
If I go in either direction,
the admittance goes down,

00:16:31.520 --> 00:16:35.960 align:middle line:90%
and I get less power.

00:16:35.960 --> 00:16:38.300 align:middle line:84%
And the maximum
voltage I can apply

00:16:38.300 --> 00:16:42.080 align:middle line:84%
with this particular network is
the voltage across the resistor

00:16:42.080 --> 00:16:44.385 align:middle line:84%
is equal to the input
voltage, or the--

00:16:44.385 --> 00:16:46.510 align:middle line:84%
I should say, the fundamental
of the input voltage.

00:16:46.510 --> 00:16:49.090 align:middle line:90%


00:16:49.090 --> 00:16:49.730 align:middle line:90%
All right.

00:16:49.730 --> 00:16:51.610 align:middle line:90%
Well, what would I choose to do?

00:16:51.610 --> 00:16:54.460 align:middle line:84%
Very often, what
we're going to do

00:16:54.460 --> 00:16:58.420 align:middle line:84%
is we're going to run this
above resonance, at least

00:16:58.420 --> 00:16:59.570 align:middle line:90%
for modern devices.

00:16:59.570 --> 00:17:01.750 align:middle line:84%
And when I talk about
resonant converters,

00:17:01.750 --> 00:17:05.980 align:middle line:84%
they don't have to
be soft switched.

00:17:05.980 --> 00:17:08.530 align:middle line:84%
But frequently, you choose
this kind of approach

00:17:08.530 --> 00:17:10.960 align:middle line:84%
because you can make
it soft switched.

00:17:10.960 --> 00:17:16.480 align:middle line:84%
And if we operate
above resonance,

00:17:16.480 --> 00:17:20.726 align:middle line:84%
is the input admittance look
inductive or capacitive?

00:17:20.726 --> 00:17:23.890 align:middle line:90%


00:17:23.890 --> 00:17:27.081 align:middle line:84%
Or the input impedance, does it
look inductive or capacitive?

00:17:27.081 --> 00:17:29.973 align:middle line:90%


00:17:29.973 --> 00:17:31.600 align:middle line:90%
It looks inductive.

00:17:31.600 --> 00:17:33.700 align:middle line:84%
As I go to higher
and higher frequency,

00:17:33.700 --> 00:17:36.785 align:middle line:84%
the magnitude of the
impedance of the inductor

00:17:36.785 --> 00:17:37.660 align:middle line:90%
keeps getting bigger.

00:17:37.660 --> 00:17:39.370 align:middle line:84%
And the capacitor
keeps getting smaller.

00:17:39.370 --> 00:17:44.140 align:middle line:84%
So it starts to look inductive
once I get above resonance.

00:17:44.140 --> 00:17:49.000 align:middle line:84%
What that means is that relative
to the phase of the voltage,

00:17:49.000 --> 00:17:50.770 align:middle line:84%
the phase of the
current is going

00:17:50.770 --> 00:17:54.280 align:middle line:84%
to be phase shifted
with a lagging current.

00:17:54.280 --> 00:17:58.810 align:middle line:84%
So let's just think about
what this would look like.

00:17:58.810 --> 00:18:02.625 align:middle line:90%
Here's my half bridge again.

00:18:02.625 --> 00:18:06.560 align:middle line:90%


00:18:06.560 --> 00:18:10.370 align:middle line:90%
And again, I'm going to--

00:18:10.370 --> 00:18:14.390 align:middle line:84%
let me just draw in the body
diode of these FETs just

00:18:14.390 --> 00:18:16.990 align:middle line:90%
for clarity.

00:18:16.990 --> 00:18:18.350 align:middle line:90%
And I'm going to draw--

00:18:18.350 --> 00:18:25.460 align:middle line:84%
and here's L, C, and R. And
when I'm talking about I sub L,

00:18:25.460 --> 00:18:33.840 align:middle line:84%
I can think of the same thing
as being the same as I sub R.

00:18:33.840 --> 00:18:36.810 align:middle line:84%
And here is the voltage
that I'm synthesizing.

00:18:36.810 --> 00:18:41.590 align:middle line:84%
I'll call this V sub X. So
V sub X looks like this.

00:18:41.590 --> 00:18:49.170 align:middle line:90%


00:18:49.170 --> 00:18:52.990 align:middle line:90%
Just let me do this.

00:18:52.990 --> 00:19:02.110 align:middle line:84%
V sub X looks like this, where
I'm controlling this switching

00:19:02.110 --> 00:19:02.610 align:middle line:90%
period.

00:19:02.610 --> 00:19:06.720 align:middle line:90%


00:19:06.720 --> 00:19:09.480 align:middle line:84%
That should be-- supposed
to be 50% duty ratio.

00:19:09.480 --> 00:19:12.360 align:middle line:90%
So here's 2 pi over fS.

00:19:12.360 --> 00:19:14.730 align:middle line:90%
And this is t.

00:19:14.730 --> 00:19:21.960 align:middle line:84%
So if I'm above
resonance, so if 2 pi fS

00:19:21.960 --> 00:19:25.890 align:middle line:84%
is greater than omega
0, what I expect

00:19:25.890 --> 00:19:32.670 align:middle line:84%
is this net admittance
to look inductive,

00:19:32.670 --> 00:19:36.270 align:middle line:84%
which means that
I sub L should lag

00:19:36.270 --> 00:19:40.872 align:middle line:90%
the fundamental of this voltage.

00:19:40.872 --> 00:19:43.770 align:middle line:84%
Well, what does the fundamental
of this voltage look like?

00:19:43.770 --> 00:19:45.330 align:middle line:90%
This is VDC.

00:19:45.330 --> 00:19:51.240 align:middle line:90%
So this is V sub X. And--

00:19:51.240 --> 00:19:52.020 align:middle line:90%
of t.

00:19:52.020 --> 00:19:57.060 align:middle line:84%
What his fundamental looks
like is something like this.

00:19:57.060 --> 00:20:03.095 align:middle line:84%
V sub X1 is in phase with V
sub X. And it looks like this.

00:20:03.095 --> 00:20:07.950 align:middle line:90%


00:20:07.950 --> 00:20:13.530 align:middle line:84%
So the fundamental of V
sub X has an amplitude.

00:20:13.530 --> 00:20:15.570 align:middle line:90%
If the amplitude of--

00:20:15.570 --> 00:20:22.710 align:middle line:84%
if the peak value of
VX is VDC, this value

00:20:22.710 --> 00:20:27.130 align:middle line:84%
is going to be 2
over pi times VDC.

00:20:27.130 --> 00:20:29.730 align:middle line:90%
It's just a square wave.

00:20:29.730 --> 00:20:34.030 align:middle line:84%
That's what you get
for a square wave.

00:20:34.030 --> 00:20:38.760 align:middle line:84%
And what I've said is that the
inductor current should lag

00:20:38.760 --> 00:20:41.050 align:middle line:90%
the fundamental of the voltage.

00:20:41.050 --> 00:20:43.073 align:middle line:90%
So this is VX1.

00:20:43.073 --> 00:20:48.380 align:middle line:90%


00:20:48.380 --> 00:20:50.210 align:middle line:90%
The fundamentals should lag.

00:20:50.210 --> 00:20:52.360 align:middle line:84%
So what I should see
then is a current

00:20:52.360 --> 00:20:53.865 align:middle line:90%
that does something like this.

00:20:53.865 --> 00:21:03.750 align:middle line:90%


00:21:03.750 --> 00:21:11.760 align:middle line:84%
So here is IL of t for
under this condition.

00:21:11.760 --> 00:21:15.110 align:middle line:90%
Any questions about that?

00:21:15.110 --> 00:21:17.990 align:middle line:84%
Now, why am I
interested in this case?

00:21:17.990 --> 00:21:20.060 align:middle line:84%
Because let's think
about the switching

00:21:20.060 --> 00:21:23.473 align:middle line:90%
transitions on this inverter.

00:21:23.473 --> 00:21:26.860 align:middle line:90%


00:21:26.860 --> 00:21:30.040 align:middle line:84%
Let's think about
what's happening here.

00:21:30.040 --> 00:21:38.830 align:middle line:84%
If I call this S1 and this S2,
in this time period, S1 is on.

00:21:38.830 --> 00:21:41.280 align:middle line:84%
And in this time
period, S2 is on.

00:21:41.280 --> 00:21:44.680 align:middle line:90%


00:21:44.680 --> 00:21:46.150 align:middle line:90%
Make sense, everybody?

00:21:46.150 --> 00:21:50.530 align:middle line:84%
Let's focus in right on
this switching transition

00:21:50.530 --> 00:21:53.680 align:middle line:84%
right here, right when I'm
going to go from S1 to S2.

00:21:53.680 --> 00:21:56.440 align:middle line:90%
And let me zoom in on that.

00:21:56.440 --> 00:21:57.555 align:middle line:90%
So here I am.

00:21:57.555 --> 00:22:02.000 align:middle line:90%


00:22:02.000 --> 00:22:03.870 align:middle line:90%
I have S1 on.

00:22:03.870 --> 00:22:10.620 align:middle line:90%


00:22:10.620 --> 00:22:13.320 align:middle line:84%
At some point, I'm
going to turn S1 off.

00:22:13.320 --> 00:22:16.680 align:middle line:90%


00:22:16.680 --> 00:22:18.960 align:middle line:90%
And I'm going to initiate--

00:22:18.960 --> 00:22:20.130 align:middle line:90%
I'm going to turn S1 off.

00:22:20.130 --> 00:22:22.290 align:middle line:84%
And then I'm going
to turn S2 on.

00:22:22.290 --> 00:22:24.525 align:middle line:84%
But I need some dead
time between them,

00:22:24.525 --> 00:22:26.400 align:middle line:84%
because otherwise, I
could accidentally short

00:22:26.400 --> 00:22:28.850 align:middle line:90%
out my DC bus.

00:22:28.850 --> 00:22:33.115 align:middle line:84%
And in that time period, what
is the sign of the current IL?

00:22:33.115 --> 00:22:37.040 align:middle line:90%


00:22:37.040 --> 00:22:39.620 align:middle line:90%
It's greater than 0.

00:22:39.620 --> 00:22:44.060 align:middle line:84%
So if I were to think about
this switching transition--

00:22:44.060 --> 00:22:48.440 align:middle line:84%
and let me just think
about this particular time.

00:22:48.440 --> 00:22:52.370 align:middle line:84%
What I'm going to do at
that particular time--

00:22:52.370 --> 00:22:55.230 align:middle line:90%
here's VDC.

00:22:55.230 --> 00:23:00.650 align:middle line:84%
If I were to think about this,
what I'm doing is at that time,

00:23:00.650 --> 00:23:02.660 align:middle line:90%
I'm opening this switch.

00:23:02.660 --> 00:23:04.770 align:middle line:84%
And then this switch
is already open.

00:23:04.770 --> 00:23:05.900 align:middle line:90%
But there's a diode here.

00:23:05.900 --> 00:23:08.420 align:middle line:90%


00:23:08.420 --> 00:23:11.090 align:middle line:84%
And then there's an
output current that's

00:23:11.090 --> 00:23:13.765 align:middle line:90%
IL that's greater than 0.

00:23:13.765 --> 00:23:16.520 align:middle line:90%


00:23:16.520 --> 00:23:22.190 align:middle line:84%
Now, the thing I haven't
drawn in this picture

00:23:22.190 --> 00:23:26.390 align:middle line:84%
is the fact that these devices
actually have some capacitance.

00:23:26.390 --> 00:23:29.700 align:middle line:84%
And I could go add
additional capacitance.

00:23:29.700 --> 00:23:34.010 align:middle line:84%
So that's either the
device capacitance itself

00:23:34.010 --> 00:23:38.830 align:middle line:84%
or maybe I'm adding
external capacitance.

00:23:38.830 --> 00:23:42.082 align:middle line:84%
Now, if I put capacitors
across the device,

00:23:42.082 --> 00:23:44.290 align:middle line:84%
what kind of switching do
you think I'm going to get?

00:23:44.290 --> 00:23:47.940 align:middle line:84%
Zero-voltage switching or
zero current switching?

00:23:47.940 --> 00:23:49.320 align:middle line:90%
Zero-voltage switching, right?

00:23:49.320 --> 00:23:52.080 align:middle line:84%
So because when I
turn this switch off,

00:23:52.080 --> 00:23:56.300 align:middle line:84%
when I pop the switch off, when
I go to turn the switch off,

00:23:56.300 --> 00:23:57.860 align:middle line:90%
there's a capacitor here.

00:23:57.860 --> 00:24:01.100 align:middle line:84%
And there's a
capacitor here, which

00:24:01.100 --> 00:24:03.890 align:middle line:84%
are going to keep the
voltage across the turning

00:24:03.890 --> 00:24:08.190 align:middle line:84%
off switch low while
he's turning off.

00:24:08.190 --> 00:24:12.620 align:middle line:84%
So I can turn off the top
switch at very low loss.

00:24:12.620 --> 00:24:15.470 align:middle line:84%
What's going to happen
during this time period?

00:24:15.470 --> 00:24:18.630 align:middle line:84%
So imagine I turn this switch
off, and this switch is off.

00:24:18.630 --> 00:24:23.300 align:middle line:84%
So now I have
neither switch is on.

00:24:23.300 --> 00:24:26.550 align:middle line:84%
Well, I have a
positive current here.

00:24:26.550 --> 00:24:30.650 align:middle line:84%
The total voltage VDC
across these two capacitors

00:24:30.650 --> 00:24:32.710 align:middle line:90%
is going to be constant.

00:24:32.710 --> 00:24:34.730 align:middle line:84%
And if these two
capacitors are equal,

00:24:34.730 --> 00:24:36.350 align:middle line:84%
that means actually
the current has

00:24:36.350 --> 00:24:44.866 align:middle line:84%
to split between this
capacitor and this capacitor.

00:24:44.866 --> 00:24:47.920 align:middle line:84%
And so that means the
voltage on the top capacitor

00:24:47.920 --> 00:24:49.150 align:middle line:90%
is going to charge up.

00:24:49.150 --> 00:24:51.310 align:middle line:84%
And the voltage across
the bottom capacitor

00:24:51.310 --> 00:24:53.990 align:middle line:90%
is going to charge down.

00:24:53.990 --> 00:24:56.043 align:middle line:84%
So then if I were to
look at this voltage,

00:24:56.043 --> 00:24:58.210 align:middle line:84%
I'm going to zoom in right
at this time period, when

00:24:58.210 --> 00:25:00.560 align:middle line:90%
I have both S1 and S2 off.

00:25:00.560 --> 00:25:02.710 align:middle line:84%
What I'm going to
see is a transition

00:25:02.710 --> 00:25:04.470 align:middle line:84%
that's going to do
something like this.

00:25:04.470 --> 00:25:10.651 align:middle line:90%


00:25:10.651 --> 00:25:14.020 align:middle line:84%
And then when this
voltage hits 0--

00:25:14.020 --> 00:25:16.870 align:middle line:90%
and this is voltage VX--

00:25:16.870 --> 00:25:20.440 align:middle line:84%
when this voltage hits 0,
the diode has got to turn on.

00:25:20.440 --> 00:25:25.180 align:middle line:84%
So if this was S1 on, even if
I don't turn-- even if I don't

00:25:25.180 --> 00:25:29.750 align:middle line:84%
turn this bottom switch
on yet, when this hits 0,

00:25:29.750 --> 00:25:34.970 align:middle line:90%
I'm going to get S2/D2 is on.

00:25:34.970 --> 00:25:36.620 align:middle line:84%
The diode will
turn on naturally.

00:25:36.620 --> 00:25:38.740 align:middle line:84%
And then I can turn on
the switch with 0 voltage.

00:25:38.740 --> 00:25:41.260 align:middle line:90%


00:25:41.260 --> 00:25:45.010 align:middle line:84%
So if I were to zoom in on
this switching transition,

00:25:45.010 --> 00:25:46.900 align:middle line:84%
if I put some
capacitance here and I

00:25:46.900 --> 00:25:49.300 align:middle line:84%
put some dead time
between S1 and S2,

00:25:49.300 --> 00:25:52.660 align:middle line:84%
I can turn off this
switch at 0 voltage.

00:25:52.660 --> 00:25:55.090 align:middle line:84%
And I can turn on this
switch at 0 voltage

00:25:55.090 --> 00:25:57.420 align:middle line:90%
because the diode will catch it.

00:25:57.420 --> 00:25:59.860 align:middle line:84%
Does that make
sense to everybody?

00:25:59.860 --> 00:26:03.280 align:middle line:84%
Now, here's the cool thing
about a resonant converter.

00:26:03.280 --> 00:26:05.538 align:middle line:84%
What's the other
transition-- or in a series

00:26:05.538 --> 00:26:07.580 align:middle line:84%
resonant converter-- what's
the other transition?

00:26:07.580 --> 00:26:10.990 align:middle line:90%
I want to go from bottom to top.

00:26:10.990 --> 00:26:13.390 align:middle line:84%
When I want to go
from bottom to top,

00:26:13.390 --> 00:26:16.200 align:middle line:84%
the inductor current
is now negative.

00:26:16.200 --> 00:26:18.580 align:middle line:84%
That means the inductor
current's coming this way.

00:26:18.580 --> 00:26:21.210 align:middle line:84%
When I turn off
the bottom switch,

00:26:21.210 --> 00:26:22.740 align:middle line:90%
this capacitor will charge.

00:26:22.740 --> 00:26:26.020 align:middle line:84%
This capacitor will discharge
until the top diode turns on.

00:26:26.020 --> 00:26:27.270 align:middle line:90%
And I'll reverse the process.

00:26:27.270 --> 00:26:30.780 align:middle line:84%
And I'll also switch the bottom
device with 0 voltage turn off.

00:26:30.780 --> 00:26:34.060 align:middle line:84%
And the top device
with 0 voltage turn on.

00:26:34.060 --> 00:26:37.530 align:middle line:90%
Does that make sense, everybody?

00:26:37.530 --> 00:26:40.020 align:middle line:84%
So it's a long way
of saying, because I

00:26:40.020 --> 00:26:43.320 align:middle line:84%
have this sinusoidal current,
approximately sinusoidal

00:26:43.320 --> 00:26:45.100 align:middle line:90%
current, the current--

00:26:45.100 --> 00:26:46.680 align:middle line:90%
and I've made it inductive.

00:26:46.680 --> 00:26:49.860 align:middle line:84%
I phase delayed it with respect
to where the voltage is.

00:26:49.860 --> 00:26:53.640 align:middle line:84%
I get naturally the opportunity
to do zero-voltage switching.

00:26:53.640 --> 00:26:57.300 align:middle line:84%
So in most modern series
resonant converters,

00:26:57.300 --> 00:26:59.460 align:middle line:84%
because we're interested
in zero-voltage switching,

00:26:59.460 --> 00:27:02.220 align:middle line:84%
we will operate them
up in this range,

00:27:02.220 --> 00:27:05.760 align:middle line:84%
above resonance by some
degree, and modulate power

00:27:05.760 --> 00:27:10.200 align:middle line:84%
over this range, by going
down the curve this way.

00:27:10.200 --> 00:27:14.490 align:middle line:84%
Now, it turns out, if I
wanted to go the other way,

00:27:14.490 --> 00:27:16.495 align:middle line:84%
I could actually do
zero-current switching.

00:27:16.495 --> 00:27:18.120 align:middle line:84%
If I wanted to operate
below resonance,

00:27:18.120 --> 00:27:19.860 align:middle line:84%
I could do
zero-current switching.

00:27:19.860 --> 00:27:23.550 align:middle line:84%
But we're often interested in
getting zero-voltage switching

00:27:23.550 --> 00:27:27.180 align:middle line:84%
because I can get rid of losses
associated with the device

00:27:27.180 --> 00:27:28.450 align:middle line:90%
capacitor switching.

00:27:28.450 --> 00:27:31.085 align:middle line:90%


00:27:31.085 --> 00:27:31.960 align:middle line:90%
Questions about that?

00:27:31.960 --> 00:27:36.050 align:middle line:90%


00:27:36.050 --> 00:27:36.600 align:middle line:90%
All right.

00:27:36.600 --> 00:27:41.074 align:middle line:84%
So we can get
zero-voltage switching.

00:27:41.074 --> 00:27:45.810 align:middle line:84%
And by doing that, we can go
at pretty high frequencies.

00:27:45.810 --> 00:27:48.600 align:middle line:84%
And then we can use
frequency modulation,

00:27:48.600 --> 00:27:51.460 align:middle line:84%
frequency control to control
the power into our load.

00:27:51.460 --> 00:27:52.720 align:middle line:90%
Now, what is our load?

00:27:52.720 --> 00:27:55.320 align:middle line:84%
Well, I haven't said
what this load is.

00:27:55.320 --> 00:27:57.160 align:middle line:84%
This load could be
any number of things.

00:27:57.160 --> 00:28:00.060 align:middle line:84%
It could be, for
example, the equivalent

00:28:00.060 --> 00:28:02.220 align:middle line:84%
resistance of an
induction-heating load,

00:28:02.220 --> 00:28:03.005 align:middle line:90%
for example.

00:28:03.005 --> 00:28:05.965 align:middle line:90%


00:28:05.965 --> 00:28:12.280 align:middle line:84%
And thereby, by modulating
frequency, I modulate power.

00:28:12.280 --> 00:28:16.640 align:middle line:84%
And that's how an
induction heater can work.

00:28:16.640 --> 00:28:19.300 align:middle line:84%
And I can run at high
frequencies because of that.

00:28:19.300 --> 00:28:24.780 align:middle line:84%
Now, what's nice about this
series resonant inverter

00:28:24.780 --> 00:28:27.000 align:middle line:90%
circuit?

00:28:27.000 --> 00:28:30.630 align:middle line:84%
Well, the first thing I said is
we get zero-voltage switching

00:28:30.630 --> 00:28:33.760 align:middle line:84%
for our devices, which is
really helpful for efficiency.

00:28:33.760 --> 00:28:36.480 align:middle line:90%


00:28:36.480 --> 00:28:43.730 align:middle line:84%
Notice also that if I modulate
power, how do I-- let's assume R

00:28:43.730 --> 00:28:44.730 align:middle line:90%
is fixed for the moment.

00:28:44.730 --> 00:28:46.070 align:middle line:90%
It's a fixed resistor.

00:28:46.070 --> 00:28:48.980 align:middle line:84%
Let's assume I
modulate the power

00:28:48.980 --> 00:28:52.580 align:middle line:90%
by modulating the frequency.

00:28:52.580 --> 00:28:57.910 align:middle line:84%
I get lower power by making
this resistor current lower.

00:28:57.910 --> 00:29:00.790 align:middle line:84%
But that also means that the
device currents and the inductor

00:29:00.790 --> 00:29:03.790 align:middle line:84%
current and the capacitor
current also got lower.

00:29:03.790 --> 00:29:10.420 align:middle line:84%
So this kind of characteristic
has the nice habit that--

00:29:10.420 --> 00:29:15.850 align:middle line:84%
has the nice habit
that as I'm reducing

00:29:15.850 --> 00:29:18.850 align:middle line:84%
power, all my currents in
my devices and components

00:29:18.850 --> 00:29:20.320 align:middle line:90%
all go down with--

00:29:20.320 --> 00:29:21.410 align:middle line:90%
as I reduce power.

00:29:21.410 --> 00:29:24.280 align:middle line:84%
So I can keep efficiency
high as my power is

00:29:24.280 --> 00:29:26.140 align:middle line:90%
getting lower and lower.

00:29:26.140 --> 00:29:30.730 align:middle line:84%
And that's a nice characteristic
of a series resonant converter.

00:29:30.730 --> 00:29:33.970 align:middle line:84%
Another nice thing
is these device

00:29:33.970 --> 00:29:38.025 align:middle line:84%
voltages are both limited
to the DC input voltage.

00:29:38.025 --> 00:29:44.633 align:middle line:90%


00:29:44.633 --> 00:29:48.500 align:middle line:84%
However, a slight
warning, if I were

00:29:48.500 --> 00:29:51.450 align:middle line:84%
to look at, say, the
capacitor voltage,

00:29:51.450 --> 00:29:56.750 align:middle line:84%
if I were to ask about
VC, VC can actually

00:29:56.750 --> 00:29:59.780 align:middle line:84%
be much bigger than
the peak value of VX

00:29:59.780 --> 00:30:02.990 align:middle line:84%
because these two
components are in resonance.

00:30:02.990 --> 00:30:04.640 align:middle line:84%
And in fact, if you
remember, we said

00:30:04.640 --> 00:30:07.670 align:middle line:84%
that the capacitor voltage
in a series resonant network

00:30:07.670 --> 00:30:10.430 align:middle line:90%
can be Q times--

00:30:10.430 --> 00:30:16.290 align:middle line:84%
Q of omega 0 times the
fundamental input voltage.

00:30:16.290 --> 00:30:21.390 align:middle line:84%
So if I have a Q of 10, then
whatever the fundamental of this

00:30:21.390 --> 00:30:27.190 align:middle line:84%
voltage is, if I ran at
resonance, VC would be 10X that.

00:30:27.190 --> 00:30:29.560 align:middle line:84%
Or if Q is 100, it
would be 100X that.

00:30:29.560 --> 00:30:31.100 align:middle line:90%
So you've got to be careful.

00:30:31.100 --> 00:30:32.800 align:middle line:84%
The device voltages
are nicely limited.

00:30:32.800 --> 00:30:35.920 align:middle line:84%
But you've got to be very
careful about these two

00:30:35.920 --> 00:30:37.990 align:middle line:84%
components, can have pretty
big voltages on them,

00:30:37.990 --> 00:30:42.230 align:middle line:84%
depending upon the quality
factor of the network.

00:30:42.230 --> 00:30:43.850 align:middle line:84%
Now, we would like
quality factor

00:30:43.850 --> 00:30:48.830 align:middle line:84%
to be high so that we
get sinusoidal currents.

00:30:48.830 --> 00:30:52.010 align:middle line:84%
If you imagine that the quality
factor of this was really low--

00:30:52.010 --> 00:30:55.010 align:middle line:84%
that is, resistance was
really big, for example--

00:30:55.010 --> 00:30:58.520 align:middle line:84%
then instead of looking
like this pretty curve,

00:30:58.520 --> 00:31:01.470 align:middle line:90%
it would look like this.

00:31:01.470 --> 00:31:05.330 align:middle line:84%
And then maybe I don't do a good
job of attenuating my harmonics.

00:31:05.330 --> 00:31:07.160 align:middle line:84%
And my current wave
forms get distorted.

00:31:07.160 --> 00:31:09.950 align:middle line:84%
And then perhaps I don't
get the right phase shifts

00:31:09.950 --> 00:31:12.300 align:middle line:84%
for zero-voltage
switching and all that.

00:31:12.300 --> 00:31:15.230 align:middle line:84%
So you want Q to be
high enough that you

00:31:15.230 --> 00:31:18.680 align:middle line:84%
get good attenuation of
harmonics and low enough

00:31:18.680 --> 00:31:21.830 align:middle line:84%
that you don't have big
stresses on these components

00:31:21.830 --> 00:31:27.090 align:middle line:84%
and big parasitic losses
in those components.

00:31:27.090 --> 00:31:28.055 align:middle line:90%
Questions about that?

00:31:28.055 --> 00:31:34.230 align:middle line:90%


00:31:34.230 --> 00:31:39.000 align:middle line:84%
Now, what is a
challenge with this?

00:31:39.000 --> 00:31:43.360 align:middle line:90%
Well, this works beautifully.

00:31:43.360 --> 00:31:45.700 align:middle line:84%
And I should say
one other thing.

00:31:45.700 --> 00:31:50.040 align:middle line:84%
There's a limit that relates
how far above resonance I

00:31:50.040 --> 00:31:52.740 align:middle line:84%
have to be to the size
of these capacitors

00:31:52.740 --> 00:31:54.290 align:middle line:84%
and the amplitude
of the current.

00:31:54.290 --> 00:31:58.950 align:middle line:84%
Basically, this
integral is basically

00:31:58.950 --> 00:32:01.980 align:middle line:84%
underneath the orange curve
of the inductor current.

00:32:01.980 --> 00:32:05.130 align:middle line:84%
Between here and
where it crosses 0

00:32:05.130 --> 00:32:08.520 align:middle line:84%
is exactly the charge that I can
deliver onto these capacitors

00:32:08.520 --> 00:32:09.870 align:middle line:90%
for soft switching.

00:32:09.870 --> 00:32:11.940 align:middle line:84%
So I need a certain
amount of phase shift

00:32:11.940 --> 00:32:14.250 align:middle line:84%
and/or a certain amount
of current amplitude

00:32:14.250 --> 00:32:16.590 align:middle line:84%
in order to get zero-voltage
soft switching if I'm

00:32:16.590 --> 00:32:20.130 align:middle line:84%
going to use this load network
to do my soft switching.

00:32:20.130 --> 00:32:23.200 align:middle line:84%
There are other ways
to do it as well.

00:32:23.200 --> 00:32:26.080 align:middle line:84%
But that's something you
got to pay attention to.

00:32:26.080 --> 00:32:29.480 align:middle line:90%
But here's a challenge.

00:32:29.480 --> 00:32:35.900 align:middle line:84%
Suppose now I don't control
this resistor very well.

00:32:35.900 --> 00:32:38.240 align:middle line:84%
If this was an
induction heater thing,

00:32:38.240 --> 00:32:40.190 align:middle line:84%
the equivalent
resistance I might see

00:32:40.190 --> 00:32:45.260 align:middle line:84%
might depend upon the thing
I've put on my network

00:32:45.260 --> 00:32:49.602 align:middle line:84%
to heat, how much energy
I'm going to dump into it.

00:32:49.602 --> 00:32:54.260 align:middle line:84%
If this resistor gets too
small, the quality factor

00:32:54.260 --> 00:32:56.420 align:middle line:90%
of the network gets really high.

00:32:56.420 --> 00:32:58.830 align:middle line:84%
And then I'd better stay
away from resonance.

00:32:58.830 --> 00:33:01.910 align:middle line:84%
Otherwise, I'll get huge
voltages on my components--

00:33:01.910 --> 00:33:04.760 align:middle line:90%
on my inductor and capacitor.

00:33:04.760 --> 00:33:09.770 align:middle line:84%
On the other hand,
if I make R too big,

00:33:09.770 --> 00:33:13.760 align:middle line:84%
suddenly the network
quality factor gets too low.

00:33:13.760 --> 00:33:16.580 align:middle line:84%
And I get this
frequency attenuation.

00:33:16.580 --> 00:33:18.240 align:middle line:90%
I don't get good attenuation.

00:33:18.240 --> 00:33:21.110 align:middle line:84%
I've got to go to really high
frequencies to attenuate things.

00:33:21.110 --> 00:33:23.720 align:middle line:84%
So a challenge of
these resonant networks

00:33:23.720 --> 00:33:27.380 align:middle line:84%
is keeping the load resistance
in an acceptable range

00:33:27.380 --> 00:33:28.770 align:middle line:90%
for what you're trying to do.

00:33:28.770 --> 00:33:33.510 align:middle line:90%
And that's a trick of design.

00:33:33.510 --> 00:33:34.700 align:middle line:90%
Any questions about that?

00:33:34.700 --> 00:33:41.840 align:middle line:90%


00:33:41.840 --> 00:33:48.930 align:middle line:84%
I should say that I've shown
you a series resonant network.

00:33:48.930 --> 00:33:51.710 align:middle line:90%
You can use other topologies.

00:33:51.710 --> 00:33:54.230 align:middle line:84%
And they give you
different characteristics

00:33:54.230 --> 00:33:57.120 align:middle line:84%
in terms of the behavior you'll
get of the resonant network.

00:33:57.120 --> 00:33:58.953 align:middle line:84%
So let me just show you
a different example.

00:33:58.953 --> 00:34:02.780 align:middle line:90%


00:34:02.780 --> 00:34:04.820 align:middle line:84%
I could do the full
dual of this thing.

00:34:04.820 --> 00:34:06.900 align:middle line:84%
But let me show you
a different kind.

00:34:06.900 --> 00:34:08.580 align:middle line:84%
This is a series
resonant converter.

00:34:08.580 --> 00:34:10.420 align:middle line:84%
Here's a parallel
resonant inverter.

00:34:10.420 --> 00:34:13.520 align:middle line:90%


00:34:13.520 --> 00:34:14.904 align:middle line:90%
I'll have VDC again.

00:34:14.904 --> 00:34:19.480 align:middle line:90%


00:34:19.480 --> 00:34:25.060 align:middle line:84%
And for simplicity, let
me put in C infinity.

00:34:25.060 --> 00:34:28.480 align:middle line:84%
This is just a
blocking capacitor.

00:34:28.480 --> 00:34:31.060 align:middle line:84%
So I'm going to get a voltage
on the other side of this

00:34:31.060 --> 00:34:32.699 align:middle line:90%
that I'm going to call VX prime.

00:34:32.699 --> 00:34:37.719 align:middle line:90%


00:34:37.719 --> 00:34:41.739 align:middle line:84%
VX prime is, again, just
going to be a square wave.

00:34:41.739 --> 00:34:45.730 align:middle line:84%
And it's going to go from-- it's
going to go between VDC over 2

00:34:45.730 --> 00:34:47.534 align:middle line:90%
and minus VDC over 2.

00:34:47.534 --> 00:34:51.460 align:middle line:90%


00:34:51.460 --> 00:34:53.199 align:middle line:84%
I'm putting a blocking
capacitor in there

00:34:53.199 --> 00:34:56.739 align:middle line:84%
just to extract out
the AC component, which

00:34:56.739 --> 00:34:59.790 align:middle line:90%
I'm using to drive the network.

00:34:59.790 --> 00:35:03.720 align:middle line:84%
And then here's my
parallel resonant network.

00:35:03.720 --> 00:35:12.315 align:middle line:90%


00:35:12.315 --> 00:35:16.260 align:middle line:84%
This would be called a
parallel resonant inverter.

00:35:16.260 --> 00:35:18.152 align:middle line:84%
Instead of having a
blocking capacitor here,

00:35:18.152 --> 00:35:19.860 align:middle line:84%
I could have done this
in different ways,

00:35:19.860 --> 00:35:21.760 align:middle line:84%
including using a full
bridge, et cetera.

00:35:21.760 --> 00:35:23.980 align:middle line:84%
But I just want to
illustrate this.

00:35:23.980 --> 00:35:26.380 align:middle line:84%
Now, why is this a
parallel resonant network?

00:35:26.380 --> 00:35:39.700 align:middle line:84%
If I thought of VX prime
as a voltage source,

00:35:39.700 --> 00:35:45.185 align:middle line:84%
if I make VX prime 0, L, C,
and R here are in parallel.

00:35:45.185 --> 00:35:48.460 align:middle line:84%
So this is a parallel
resonant network

00:35:48.460 --> 00:35:50.410 align:middle line:84%
driven by a voltage
source inserted

00:35:50.410 --> 00:35:55.033 align:middle line:84%
in series with the
resonant inductor here.

00:35:55.033 --> 00:35:57.450 align:middle line:84%
So that's how somebody would
think about this and in terms

00:35:57.450 --> 00:35:59.100 align:middle line:90%
of a resonant converter.

00:35:59.100 --> 00:36:06.120 align:middle line:84%
And how might I think
about the behavior of this?

00:36:06.120 --> 00:36:08.700 align:middle line:90%
Well, maybe I could plot--

00:36:08.700 --> 00:36:11.480 align:middle line:90%
VC and VR are the same thing.

00:36:11.480 --> 00:36:18.150 align:middle line:84%
So maybe I could plot
the magnitude of V sub R

00:36:18.150 --> 00:36:26.530 align:middle line:84%
over VX prime versus
frequency for this network.

00:36:26.530 --> 00:36:30.750 align:middle line:84%
So I'm looking at the transfer
function between here and here

00:36:30.750 --> 00:36:33.060 align:middle line:90%
for this network.

00:36:33.060 --> 00:36:36.630 align:middle line:84%
At DC, clearly, VR equals
VC, or at low frequency,

00:36:36.630 --> 00:36:38.310 align:middle line:84%
because the inductor
becomes a short.

00:36:38.310 --> 00:36:43.300 align:middle line:84%
At really high frequency, this
rolls off at 40 dB per decade.

00:36:43.300 --> 00:36:45.030 align:middle line:84%
So what you're going
to get is something

00:36:45.030 --> 00:36:47.140 align:middle line:90%
that does something like this.

00:36:47.140 --> 00:36:48.870 align:middle line:90%
It's going to go for one.

00:36:48.870 --> 00:36:51.520 align:middle line:90%
It's going to peak up.

00:36:51.520 --> 00:36:53.920 align:middle line:90%
And then it's going to fall.

00:36:53.920 --> 00:36:58.150 align:middle line:84%
And this peak, if the
network quality factor here--

00:36:58.150 --> 00:37:01.810 align:middle line:84%
and quality factor here is now
R over the square root of L/C.

00:37:01.810 --> 00:37:04.540 align:middle line:90%
It's the other way around.

00:37:04.540 --> 00:37:07.180 align:middle line:84%
This peak is going to
be near omega 0, which

00:37:07.180 --> 00:37:11.836 align:middle line:84%
is 1 over the square
root of LC again.

00:37:11.836 --> 00:37:16.740 align:middle line:84%
So again, we get this
high-frequency selectivity

00:37:16.740 --> 00:37:22.440 align:middle line:84%
of the voltage
gain from my drive,

00:37:22.440 --> 00:37:25.410 align:middle line:84%
which has a fixed amplitude
set by the DC voltage,

00:37:25.410 --> 00:37:28.030 align:middle line:84%
to the voltage I put
across my resistor.

00:37:28.030 --> 00:37:34.360 align:middle line:84%
And again, if I'm operating
up here in this regime,

00:37:34.360 --> 00:37:37.880 align:middle line:84%
I'm going to have an inductive
input impedance coming in.

00:37:37.880 --> 00:37:40.930 align:middle line:84%
So again, I can soft
switch these devices,

00:37:40.930 --> 00:37:44.296 align:middle line:84%
zero-voltage switch
these devices.

00:37:44.296 --> 00:37:47.170 align:middle line:84%
And now I can, again,
by controlling frequency

00:37:47.170 --> 00:37:49.270 align:middle line:84%
of the drive,
control the amplitude

00:37:49.270 --> 00:37:54.040 align:middle line:84%
across my resistor and
hence control power.

00:37:54.040 --> 00:37:55.170 align:middle line:90%
Any questions about that?

00:37:55.170 --> 00:37:58.230 align:middle line:90%


00:37:58.230 --> 00:38:01.200 align:middle line:84%
Now, how does this network
differ from the series

00:38:01.200 --> 00:38:02.200 align:middle line:90%
resonant network?

00:38:02.200 --> 00:38:04.530 align:middle line:90%
Well, notice one thing.

00:38:04.530 --> 00:38:10.260 align:middle line:84%
In this series resonant
network, the largest voltage

00:38:10.260 --> 00:38:12.990 align:middle line:84%
I could ever put on
VR is the fundamental

00:38:12.990 --> 00:38:16.050 align:middle line:84%
that I drive with,
because it's just

00:38:16.050 --> 00:38:18.090 align:middle line:84%
a voltage divider
between the resistor

00:38:18.090 --> 00:38:21.030 align:middle line:90%
and the reactive components.

00:38:21.030 --> 00:38:25.650 align:middle line:84%
Here, I actually have--
because of the resonance

00:38:25.650 --> 00:38:28.870 align:middle line:84%
between L and C, I can
actually get voltage gain.

00:38:28.870 --> 00:38:33.750 align:middle line:84%
I can get a voltage that's much
bigger than my input voltage.

00:38:33.750 --> 00:38:36.030 align:middle line:84%
So if I want voltage
gain out of the thing,

00:38:36.030 --> 00:38:40.520 align:middle line:84%
maybe this parallel
network looks good.

00:38:40.520 --> 00:38:44.100 align:middle line:84%
And how much this peaks up
is a function of resistance.

00:38:44.100 --> 00:38:45.695 align:middle line:90%
So this is for R big.

00:38:45.695 --> 00:38:48.650 align:middle line:90%


00:38:48.650 --> 00:38:51.860 align:middle line:90%
Maybe I'll call that R big.

00:38:51.860 --> 00:38:55.280 align:middle line:90%
Maybe this is R medium.

00:38:55.280 --> 00:38:58.030 align:middle line:84%
If I had a big resistor,
it might look like this.

00:38:58.030 --> 00:39:04.590 align:middle line:90%


00:39:04.590 --> 00:39:08.240 align:middle line:84%
And if I had a small resistor,
maybe it'd look like this.

00:39:08.240 --> 00:39:12.570 align:middle line:90%


00:39:12.570 --> 00:39:14.200 align:middle line:90%
But here's the point.

00:39:14.200 --> 00:39:17.480 align:middle line:84%
I can get voltage gain, at least
if I have the right resistance

00:39:17.480 --> 00:39:17.980 align:middle line:90%
value.

00:39:17.980 --> 00:39:19.630 align:middle line:90%
And sometimes we use this.

00:39:19.630 --> 00:39:23.670 align:middle line:84%
So this kind of network
actually is often

00:39:23.670 --> 00:39:26.940 align:middle line:84%
what's used if you're going
to have a fluorescent bulb.

00:39:26.940 --> 00:39:30.150 align:middle line:84%
So if you think about it, like
one of these fluorescent bulbs

00:39:30.150 --> 00:39:32.140 align:middle line:90%
here, what is it?

00:39:32.140 --> 00:39:36.212 align:middle line:84%
It's a gas of-- it's a tube
with low-pressure gas in it.

00:39:36.212 --> 00:39:41.630 align:middle line:84%
If the lamp is off, that
has a really high impedance,

00:39:41.630 --> 00:39:45.230 align:middle line:84%
because it's just two electrodes
with some gas in between it.

00:39:45.230 --> 00:39:48.350 align:middle line:84%
And you've got to get a really,
really big voltage on it

00:39:48.350 --> 00:39:51.570 align:middle line:84%
to break down the gas and
so-called strike the lamp.

00:39:51.570 --> 00:39:53.870 align:middle line:90%
Well, how can I do it?

00:39:53.870 --> 00:39:56.810 align:middle line:84%
If I take this thing and I put
this thing as an open circuit

00:39:56.810 --> 00:39:58.880 align:middle line:84%
and I drive this
half bridge right

00:39:58.880 --> 00:40:00.980 align:middle line:84%
near the resonant
frequency of L and C,

00:40:00.980 --> 00:40:04.790 align:middle line:84%
I'm going to build up a really
big capacitor voltage here.

00:40:04.790 --> 00:40:07.910 align:middle line:84%
That capacitor voltage
could be tens of times

00:40:07.910 --> 00:40:11.390 align:middle line:90%
as big as my DC voltage.

00:40:11.390 --> 00:40:15.140 align:middle line:84%
Eventually, the fluorescent
lamp breaks over.

00:40:15.140 --> 00:40:17.450 align:middle line:90%
And then you've ionized the gas.

00:40:17.450 --> 00:40:19.640 align:middle line:84%
And then it looks like
a resistor but not

00:40:19.640 --> 00:40:21.630 align:middle line:84%
a huge resistor,
a small resistor.

00:40:21.630 --> 00:40:25.250 align:middle line:84%
And I go from the green
curve maybe down to the--

00:40:25.250 --> 00:40:26.930 align:middle line:84%
oh, sorry-- I go
from the green curve

00:40:26.930 --> 00:40:29.120 align:middle line:84%
maybe down to the
white or orange curve.

00:40:29.120 --> 00:40:32.360 align:middle line:84%
And then I can modulate the
amount of power and light

00:40:32.360 --> 00:40:35.165 align:middle line:90%
by moving frequency.

00:40:35.165 --> 00:40:37.490 align:middle line:84%
So this kind of network
would be at the core

00:40:37.490 --> 00:40:41.200 align:middle line:84%
of many fluorescent
lamp ballast drivers.

00:40:41.200 --> 00:40:45.010 align:middle line:84%
And we're taking advantage of
the resonant voltage gain I

00:40:45.010 --> 00:40:46.820 align:middle line:90%
can get from this high Q tank.

00:40:46.820 --> 00:40:50.580 align:middle line:84%
And it's particularly high Q
when the lamp isn't struck.

00:40:50.580 --> 00:40:52.290 align:middle line:84%
So sometimes I want
the big voltage,

00:40:52.290 --> 00:40:56.540 align:middle line:84%
even though I got to rate this
capacitor and inductor for it.

00:40:56.540 --> 00:40:57.655 align:middle line:90%
Any questions about that?

00:40:57.655 --> 00:41:00.860 align:middle line:90%


00:41:00.860 --> 00:41:05.690 align:middle line:84%
So I can get frequency-dependent
voltage gain and power control

00:41:05.690 --> 00:41:07.910 align:middle line:90%
in either of these networks.

00:41:07.910 --> 00:41:14.150 align:middle line:84%
This network has the opposite
characteristics of this network,

00:41:14.150 --> 00:41:19.310 align:middle line:84%
in the sense that if I make R
too big rather than too small,

00:41:19.310 --> 00:41:22.430 align:middle line:90%
I get very peaky resonances.

00:41:22.430 --> 00:41:25.940 align:middle line:84%
And if I make R too
small, this thing

00:41:25.940 --> 00:41:30.470 align:middle line:84%
starts to give me poor
frequency selectivity and hence

00:41:30.470 --> 00:41:33.590 align:middle line:90%
poor attenuation.

00:41:33.590 --> 00:41:35.990 align:middle line:84%
People choose one or
the other, depending

00:41:35.990 --> 00:41:37.520 align:middle line:90%
upon what they're trying to do.

00:41:37.520 --> 00:41:39.480 align:middle line:84%
Or I could choose
something in between.

00:41:39.480 --> 00:41:42.530 align:middle line:84%
So, for example, one
thing people might do

00:41:42.530 --> 00:41:45.920 align:middle line:84%
is say, OK, let
me have a network.

00:41:45.920 --> 00:41:49.310 align:middle line:84%
And maybe I'll make
it look like this.

00:41:49.310 --> 00:41:55.730 align:middle line:84%
I'll have two Cs and an R. So
maybe I'll call this C1 and C2,

00:41:55.730 --> 00:41:57.170 align:middle line:90%
and this is R.

00:41:57.170 --> 00:42:03.170 align:middle line:84%
So if R is small,
then it shorts out C2.

00:42:03.170 --> 00:42:04.110 align:middle line:90%
And I can ignore that.

00:42:04.110 --> 00:42:06.240 align:middle line:84%
And it looks like a
parallel resonant network.

00:42:06.240 --> 00:42:11.570 align:middle line:84%
If R is really big and I run
to a high enough frequency,

00:42:11.570 --> 00:42:13.700 align:middle line:84%
this branch looks
sort of inductive

00:42:13.700 --> 00:42:15.387 align:middle line:90%
when I'm above this resonance.

00:42:15.387 --> 00:42:17.970 align:middle line:84%
And then I have the equivalent
of a parallel resonant network.

00:42:17.970 --> 00:42:21.710 align:middle line:84%
This would be called
an LCC or a series

00:42:21.710 --> 00:42:24.230 align:middle line:90%
parallel resonant network.

00:42:24.230 --> 00:42:27.220 align:middle line:84%
And that kind of
network's used too,

00:42:27.220 --> 00:42:30.960 align:middle line:84%
to balance what happens at
large and small resistances,

00:42:30.960 --> 00:42:31.790 align:middle line:90%
for example.

00:42:31.790 --> 00:42:33.950 align:middle line:84%
It has some sort of
hybrid combination

00:42:33.950 --> 00:42:35.960 align:middle line:90%
of series and parallel.

00:42:35.960 --> 00:42:39.230 align:middle line:84%
You can also have LLC, where
there's two inductors and one

00:42:39.230 --> 00:42:39.830 align:middle line:90%
capacitor.

00:42:39.830 --> 00:42:41.660 align:middle line:84%
That's another, actually,
extremely common

00:42:41.660 --> 00:42:42.920 align:middle line:90%
resonant network.

00:42:42.920 --> 00:42:45.380 align:middle line:84%
So the easiest thing to
get your brain around

00:42:45.380 --> 00:42:48.220 align:middle line:90%
is the series and parallel kind.

00:42:48.220 --> 00:42:49.870 align:middle line:84%
There are other
kinds that people

00:42:49.870 --> 00:42:52.240 align:middle line:84%
use because they give
particular characteristics

00:42:52.240 --> 00:42:54.730 align:middle line:84%
for different ranges
of load resistance

00:42:54.730 --> 00:42:59.970 align:middle line:84%
or for different ranges of
operating power, for example.

00:42:59.970 --> 00:43:01.130 align:middle line:90%
Any questions about that?

00:43:01.130 --> 00:43:03.990 align:middle line:90%


00:43:03.990 --> 00:43:06.750 align:middle line:90%
Now, a lot of converters--

00:43:06.750 --> 00:43:10.080 align:middle line:84%
I mentioned things like, where
do they use these things?

00:43:10.080 --> 00:43:11.820 align:middle line:90%
Induction heating is common.

00:43:11.820 --> 00:43:15.372 align:middle line:84%
Driving fluorescent lamps,
where you want sinusoidal power

00:43:15.372 --> 00:43:16.330 align:middle line:90%
delivery into the lamp.

00:43:16.330 --> 00:43:19.680 align:middle line:84%
That's usually
pretty low frequency.

00:43:19.680 --> 00:43:23.910 align:middle line:84%
Wireless power transfer, if
I'm going to go across a link

00:43:23.910 --> 00:43:28.320 align:middle line:90%
where I want sinusoidal fields.

00:43:28.320 --> 00:43:30.180 align:middle line:84%
Another example,
however, is just

00:43:30.180 --> 00:43:32.680 align:middle line:90%
straight DC to DC conversion.

00:43:32.680 --> 00:43:36.060 align:middle line:84%
I didn't say what
this resistor was.

00:43:36.060 --> 00:43:40.170 align:middle line:84%
But imagine I use a
network like this one.

00:43:40.170 --> 00:43:41.370 align:middle line:90%
I take DC.

00:43:41.370 --> 00:43:44.740 align:middle line:84%
I chop it up, generate
a square wave.

00:43:44.740 --> 00:43:52.510 align:middle line:84%
If I have a high Q
tank, then this current

00:43:52.510 --> 00:43:54.362 align:middle line:84%
becomes sinusoidal,
or close to it.

00:43:54.362 --> 00:43:56.320 align:middle line:84%
And that's where I make
my fundamental harmonic

00:43:56.320 --> 00:43:57.500 align:middle line:90%
approximation.

00:43:57.500 --> 00:43:59.680 align:middle line:84%
And by the way,
for power transfer,

00:43:59.680 --> 00:44:03.400 align:middle line:84%
if this current
is sinusoidal, we

00:44:03.400 --> 00:44:07.360 align:middle line:84%
said we can only transfer
average power through voltages

00:44:07.360 --> 00:44:09.490 align:middle line:84%
and currents at
the same frequency.

00:44:09.490 --> 00:44:13.480 align:middle line:84%
So even though VX has a
bunch of harmonic content,

00:44:13.480 --> 00:44:18.400 align:middle line:84%
as long as this network filters
to make the current sinusoidal,

00:44:18.400 --> 00:44:20.830 align:middle line:84%
then the only
component of this thing

00:44:20.830 --> 00:44:29.200 align:middle line:84%
that matters is the fundamental
component of the drive

00:44:29.200 --> 00:44:34.030 align:middle line:84%
voltage because
no other harmonic

00:44:34.030 --> 00:44:37.330 align:middle line:84%
component delivers average
power through the network.

00:44:37.330 --> 00:44:39.520 align:middle line:84%
So the fact that
I'm mediating power

00:44:39.520 --> 00:44:45.280 align:middle line:84%
through a sinusoidal, in this
case, current is very valuable.

00:44:45.280 --> 00:44:47.750 align:middle line:84%
So how would I build
a DC-DC converter?

00:44:47.750 --> 00:44:53.170 align:middle line:84%
Well, maybe I'll use an
inverter, create a square wave,

00:44:53.170 --> 00:44:57.710 align:middle line:84%
use a high Q network
to extract a sinusoid.

00:44:57.710 --> 00:45:01.420 align:middle line:84%
And then I can use that to
control voltage gain, because I

00:45:01.420 --> 00:45:04.700 align:middle line:84%
can control the amplitude of the
current by varying frequency.

00:45:04.700 --> 00:45:08.140 align:middle line:84%
And then I just run
it into a rectifier.

00:45:08.140 --> 00:45:10.900 align:middle line:90%
So maybe I take this thing.

00:45:10.900 --> 00:45:11.925 align:middle line:90%
And I say, OK.

00:45:11.925 --> 00:45:15.690 align:middle line:90%


00:45:15.690 --> 00:45:18.610 align:middle line:90%
I say, let's build a converter.

00:45:18.610 --> 00:45:23.110 align:middle line:90%


00:45:23.110 --> 00:45:24.970 align:middle line:84%
And this is going to
be soft switched, which

00:45:24.970 --> 00:45:27.400 align:middle line:84%
is one of the reasons
why I'm doing it.

00:45:27.400 --> 00:45:30.910 align:middle line:84%
I have L, C. And
then what I'll do

00:45:30.910 --> 00:45:33.520 align:middle line:84%
is maybe I'll just put
a transformer here.

00:45:33.520 --> 00:45:44.110 align:middle line:84%
And then on the other
side of this transformer,

00:45:44.110 --> 00:45:47.200 align:middle line:90%
I'll put a rectifier--

00:45:47.200 --> 00:45:49.150 align:middle line:84%
in this case, a full
bridge rectifier--

00:45:49.150 --> 00:45:52.800 align:middle line:90%
and make that V out.

00:45:52.800 --> 00:45:56.560 align:middle line:90%
And this is transformer.

00:45:56.560 --> 00:45:57.560 align:middle line:90%
And this is transformer.

00:45:57.560 --> 00:46:02.770 align:middle line:84%
So if this is, for
example, I sub L,

00:46:02.770 --> 00:46:06.850 align:middle line:84%
maybe this is then
IL prime, which

00:46:06.850 --> 00:46:10.990 align:middle line:84%
is exactly just I sub L
scaled by the turns ratio

00:46:10.990 --> 00:46:12.480 align:middle line:84%
or the inverse of
the turns ratio.

00:46:12.480 --> 00:46:15.850 align:middle line:90%


00:46:15.850 --> 00:46:18.182 align:middle line:90%
What does this network--

00:46:18.182 --> 00:46:20.140 align:middle line:84%
if I were to say, What
does this impedance look

00:46:20.140 --> 00:46:21.130 align:middle line:90%
like, looking in here?

00:46:21.130 --> 00:46:24.440 align:middle line:90%


00:46:24.440 --> 00:46:29.930 align:middle line:84%
well, if IL is a
sinusoid, basically, I'm

00:46:29.930 --> 00:46:31.850 align:middle line:84%
going to take a
sinusoidal current.

00:46:31.850 --> 00:46:33.770 align:middle line:84%
And then I'm going
to rectify it.

00:46:33.770 --> 00:46:37.250 align:middle line:84%
So then IX here
would look like what?

00:46:37.250 --> 00:46:43.885 align:middle line:84%
It would look like exactly
like a rectified sinusoid

00:46:43.885 --> 00:46:45.890 align:middle line:90%
of amplitude.

00:46:45.890 --> 00:46:48.650 align:middle line:90%
Let me call this I sub L.

00:46:48.650 --> 00:46:52.090 align:middle line:84%
So if I sub L has
amplitude I sub L,

00:46:52.090 --> 00:46:56.880 align:middle line:84%
then this just looks
like a rectified version.

00:46:56.880 --> 00:46:59.440 align:middle line:90%
The DC current--

00:46:59.440 --> 00:47:00.790 align:middle line:90%
I'll call this IX.

00:47:00.790 --> 00:47:03.830 align:middle line:84%
The average value of IX--
and I'm running out of time.

00:47:03.830 --> 00:47:05.600 align:middle line:84%
So I don't have chance
to work this out.

00:47:05.600 --> 00:47:09.670 align:middle line:84%
The average value of IX is
simply going to be equal to 2

00:47:09.670 --> 00:47:13.910 align:middle line:90%
over pi times IL.

00:47:13.910 --> 00:47:14.570 align:middle line:90%
I'm sorry.

00:47:14.570 --> 00:47:15.430 align:middle line:90%
Yeah, times IL.

00:47:15.430 --> 00:47:18.785 align:middle line:90%


00:47:18.785 --> 00:47:25.450 align:middle line:84%
So in some sense, what
am I going to see here?

00:47:25.450 --> 00:47:28.260 align:middle line:84%
I'm going to deliver some
average current into my output.

00:47:28.260 --> 00:47:33.120 align:middle line:90%


00:47:33.120 --> 00:47:36.390 align:middle line:84%
What is the voltage
that appears?

00:47:36.390 --> 00:47:41.990 align:middle line:84%
If this is IL prime, let
me plot IL prime for you.

00:47:41.990 --> 00:47:47.250 align:middle line:90%


00:47:47.250 --> 00:47:49.325 align:middle line:90%
IL prime maybe looks like this.

00:47:49.325 --> 00:47:59.230 align:middle line:90%


00:47:59.230 --> 00:48:04.350 align:middle line:84%
What does this
voltage look like?

00:48:04.350 --> 00:48:09.080 align:middle line:90%
Let me call this V sub y.

00:48:09.080 --> 00:48:12.390 align:middle line:84%
Well, when IL prime is
positive, I have V out.

00:48:12.390 --> 00:48:14.750 align:middle line:84%
When L prime is negative,
I have minus V out.

00:48:14.750 --> 00:48:18.265 align:middle line:84%
So the voltage he
sees looks like this.

00:48:18.265 --> 00:48:24.425 align:middle line:90%


00:48:24.425 --> 00:48:25.300 align:middle line:90%
Does that make sense?

00:48:25.300 --> 00:48:27.920 align:middle line:90%


00:48:27.920 --> 00:48:31.400 align:middle line:84%
So the current
into the rectifier

00:48:31.400 --> 00:48:33.390 align:middle line:90%
generates a square wave voltage.

00:48:33.390 --> 00:48:35.432 align:middle line:84%
But I'm only transferring
power in this network.

00:48:35.432 --> 00:48:36.890 align:middle line:84%
The fact that
there's a square wave

00:48:36.890 --> 00:48:41.430 align:middle line:84%
voltage here and
here doesn't matter.

00:48:41.430 --> 00:48:43.610 align:middle line:84%
It's the fundamental
component of that voltage that

00:48:43.610 --> 00:48:45.330 align:middle line:90%
matters for power transfer.

00:48:45.330 --> 00:48:49.310 align:middle line:84%
The fundamental of this
orange square wave is--

00:48:49.310 --> 00:48:51.500 align:middle line:84%
basically, it looks
something like this.

00:48:51.500 --> 00:48:54.890 align:middle line:90%


00:48:54.890 --> 00:48:58.860 align:middle line:84%
It's exactly in phase
with the current.

00:48:58.860 --> 00:49:02.670 align:middle line:84%
So essentially, this
whole rectifier network

00:49:02.670 --> 00:49:04.470 align:middle line:84%
reflected through
this transformer

00:49:04.470 --> 00:49:09.030 align:middle line:84%
looks like an
equivalent resistance.

00:49:09.030 --> 00:49:13.150 align:middle line:84%
And I'm back exactly to
this original model I had.

00:49:13.150 --> 00:49:15.150 align:middle line:84%
And the only thing
I've done there is I've

00:49:15.150 --> 00:49:18.600 align:middle line:84%
said, I don't care about
the harmonics of this,

00:49:18.600 --> 00:49:22.800 align:middle line:84%
because as long as the
current's close to sinusoidal,

00:49:22.800 --> 00:49:27.280 align:middle line:84%
almost all the power
is in the fundamental.

00:49:27.280 --> 00:49:29.770 align:middle line:90%
So I've run out of time there.

00:49:29.770 --> 00:49:31.360 align:middle line:90%
But I'll come back next class.

00:49:31.360 --> 00:49:32.980 align:middle line:84%
And we can talk
a little bit more

00:49:32.980 --> 00:49:37.510 align:middle line:84%
about how we might model
DC-DC converters in this way.

00:49:37.510 --> 00:49:39.190 align:middle line:84%
But let me ask, are
there any questions

00:49:39.190 --> 00:49:40.550 align:middle line:90%
before we wrap up for the day?

00:49:40.550 --> 00:49:43.130 align:middle line:90%


00:49:43.130 --> 00:49:43.630 align:middle line:90%
All right.

00:49:43.630 --> 00:49:45.740 align:middle line:90%
I will see you tomorrow.

00:49:45.740 --> 00:49:49.000 align:middle line:90%