WEBVTT

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JUDY HOYT: And then on
Thursday, we'll have these.

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I also want to mention, towards
the end of lecture today,

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we'll have the course
evaluations for you to fill out.

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OK, before we start the
formal lecture for today,

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for those of you who
were here last time,

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I wanted to go over something
that we had talked about.

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We didn't have time
to go through how

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you would do these calculations
from the last handout, which

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was handout 36.

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On slide 27, there was
a couple of questions

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that we were asking.

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And I thought we'd just spent
about five minutes before we

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start today's formal
lecture going through this,

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at least on the board, so people
have an idea of how to make

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these back-of-the-envelope
calculations.

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So what you're being
asked to do here

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is you're looking
at a silicon MOSFET

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with-- a these are
the source drain

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extensions, these
shallow extensions that

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have a certain depth XJ.

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These are the deep source and
drain that have been silicided.

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Remember, the last lecture
was all about siliciding.

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So this blue region is supposed
to represent a silicided region.

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And then there's a metal contact
and this is highly schematized

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but imagine this little
thing coming down here

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as your aluminum metal
or whatever coming down

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and touching the silicide and
is spaced a certain distance

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the metal contact is by an
insulator from this point here

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where the silicide starts.

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And so what we're asked to
do is to calculate separately

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three resistors that
are in this problem.

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There's this
resistor here, which

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represents the resistance
of the source drain

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extension as the current
flows through the channel

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into the extension, which
is underneath the spacer.

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And then there's a resistance
associated with this sheet

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resistance of the
silicide arrangement

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because the current has
to get from this point

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here to the point where the
metal contact is up here.

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And then there's the
interfacial resistance

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or the contact
resistance associated

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with this metal contact.

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So those are the three.

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And in a few minutes here,
we can just go through that.

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And I thought it might be useful
for us to calculate those.

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So the first one, we're
asked to calculate the--

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let's figure out the
contact resistance.

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So you're given the
specific contact

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resistivity, which we talked
about in the last lecture as 2

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and 1/2 times 10 to the minus 7.

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And that has units of
ohm centimeter squared.

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It's a resistance times an area.

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And if I take that-- if I were
to get the contact resistance

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R of that contact, I just have
to take that rho sub S value

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and divide it by the
area of the contact.

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And are told that the area
of the contact in number one

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there on the slide is
0.2 by 1 square micron.

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So that's just going to be
2.5 times 10 to the minus 7

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over 0.25--

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so the numbers are easy--

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times 10 to the minus
8 square centimeters

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because 1 micron is 10 to
the minus 4 centimeters.

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And you have to square that.

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So you just calculate this out.

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And you end up with 100 ohms
for the contact resistance.

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So that's the resistance
between the metal

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and this contact right here
flowing through this face,

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given a contact
area of that size.

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So that'd be kind of a
state of the art contact.

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So you add about 100 ohms
associated with that.

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You also want to calculate
the resistor shown here

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by this little resistor here,
estimate what this resistor is

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for the current
flowing from this point

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to the point where it just
gets into the contact.

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Well, that's going
to be dominated

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by the sheet resistance of the
silicide of this blue region.

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So if we know the
sheet resistance,

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when we divide by the
thickness, we can calculate.

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For any sheet, you can always
calculate the resistance.

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So to get the sheet
resistance of the silicide,

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well, you're given
its resistivity.

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It's 15 times 10 to the
minus 6 ohm centimeter.

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So it's just going to be
its resistive rho divided

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by the thickness of the sheet.

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So that's 15 times 10 to
the minus 6 ohm centimeter.

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Remember, that's
a resistivity now.

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That's not a specific
contact resistance.

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And you are told the thickness
of that sheet, roughly.

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And I'm going to ignore
the doped region down

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here because this is a metal.

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It's a silicide.

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It has a much lower
resistance than the silicon.

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So I'm going to ignore that.

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We're just going to calculate
the resistivity of that metal

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sheet.

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And that thickness is 4 times
10 to the minus 6 centimeters.

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So the centimeters go out.

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And you end up with
a certain resistance,

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about 3.75 ohms per square.

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Remember, that's a
sheet resistance.

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So that's an ohms
per square sheet

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As for current flowing
through a sheet,

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we talked about this, that is a
square, so going in this space,

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coming out that face, where this
length and this width are equal.

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That's the definition
of the sheet resistance.

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So it's about 4 ohms per
square, something like that.

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Then we need to know--
once you know the sheet

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resistance, the nice thing about
once the sheet resistance, that

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tells you the resistance
going through a square.

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You just use geometry
considerations,

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how many squares
does the current go

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through in flowing from this
point here to the contact?

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Well, it's a half micron wall.

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And it's a micron into the page.

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So that's a half a
square, basically,

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because it looks
something like this.

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It's a half micron long.

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But it goes a micron into
the board, into the page.

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So this is 0.5.

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And this is 1.

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So by definition,
that's half a square

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because if it were
a full square,

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there'd be two of these
right next to each other.

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So then you can just
get the resistance

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of a silicide to be a 3.8 ohms
per squared times 1/2 a square.

00:06:07.680 --> 00:06:12.390 align:middle line:84%
And you end up with
about 1.9 ohms,

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very small,
comparatively speaking,

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couple of orders of magnitude,
maybe a factor of 50

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less than the
contact resistance.

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OK, so that seems reasonable.

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And then because it's a metal
and so it has a very low sheet

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resistance.

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So the resistance is small.

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So on the final one, number
three, what you're asked, now

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we're going to be calculating
the source drain extension

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resistance.

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So what's the
resistance associated

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with this very thin, shallow
junction depth, XJ, so

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this little resistor right here?

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So the current comes
out of the channel,

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has to flow in that
source drain extension

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before it hits the silicide.

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Well, again, that's a
very similar situation

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where we just need to
calculate a sheet resistance.

00:07:00.630 --> 00:07:02.100 align:middle line:84%
And from the sheet
resistance, we

00:07:02.100 --> 00:07:04.290 align:middle line:84%
figure out the number of
squares from the geometry.

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And we get the resistance.

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So again, so for the
source drain extension,

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for that reason, we're told
the resistive rho is 5 times 10

00:07:20.990 --> 00:07:22.580 align:middle line:90%
to the minus 4 ohm centimeter.

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And we know the
number of squares.

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And we have a thickness
of that region.

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So I can get the
sheet resistance.

00:07:34.370 --> 00:07:36.080 align:middle line:84%
Again, it's just a
resistivity divided

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by the thickness of the region.

00:07:38.430 --> 00:07:43.420 align:middle line:84%
So that's 5 times 10 to
the minus 4 ohm centimeter

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divided by--

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I think it was an easy number--

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500 angstrom.

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So that's 5 times 10 to
the minus six centimeters.

00:07:51.460 --> 00:07:52.450 align:middle line:90%
And that goes out.

00:07:52.450 --> 00:07:58.210 align:middle line:84%
And we end up with about
100 ohms per square.

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That's a typical shallow
junction for a shallow junction,

00:08:02.110 --> 00:08:05.170 align:middle line:84%
shallow being 500
angstroms or less.

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You dope it very heavily.

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We said this is doped 210 to
the 20 with arsenic or whatever.

00:08:09.760 --> 00:08:14.530 align:middle line:84%
And it's about 100 ohms per
square as the sheet resistance.

00:08:14.530 --> 00:08:15.430 align:middle line:90%
Now, again,

00:08:15.430 --> 00:08:17.193 align:middle line:84%
Looking at this, how
many squares is this?

00:08:17.193 --> 00:08:18.610 align:middle line:84%
Well, the distance
from this point

00:08:18.610 --> 00:08:20.260 align:middle line:84%
in the channel to
the point where

00:08:20.260 --> 00:08:22.200 align:middle line:84%
it contacts the silicide
that we're told,

00:08:22.200 --> 00:08:24.410 align:middle line:84%
that spacer width
is 0.1 microns.

00:08:24.410 --> 00:08:25.300 align:middle line:90%
So that's 0.1.

00:08:25.300 --> 00:08:27.920 align:middle line:90%
And into the board is 1 again.

00:08:27.920 --> 00:08:30.990 align:middle line:90%
So that's a tenth of a square.

00:08:30.990 --> 00:08:34.190 align:middle line:84%
So then we can just get the
resistance of the source drain

00:08:34.190 --> 00:08:35.809 align:middle line:90%
extension.

00:08:35.809 --> 00:08:38.750 align:middle line:84%
Then it's just the
sheet resistance

00:08:38.750 --> 00:08:41.039 align:middle line:90%
times the number of squares.

00:08:41.039 --> 00:08:47.490 align:middle line:84%
So that's 100 ohms per
squared times 0.1 squares.

00:08:47.490 --> 00:08:50.770 align:middle line:90%
And then we end up with 10 ohms.

00:08:50.770 --> 00:08:52.495 align:middle line:90%
So that resistors, roughly--

00:08:52.495 --> 00:08:56.290 align:middle line:84%
I mean, this is a very crude
estimate, that resistor here.

00:08:56.290 --> 00:08:58.240 align:middle line:84%
So this resistor here
is about 10 ohms.

00:08:58.240 --> 00:09:00.730 align:middle line:84%
This little sheet here
represents about a couple

00:09:00.730 --> 00:09:01.660 align:middle line:90%
of ohms.

00:09:01.660 --> 00:09:03.490 align:middle line:90%
The big resistance is what?

00:09:03.490 --> 00:09:05.147 align:middle line:84%
The big resistance
is the 100 ohms.

00:09:05.147 --> 00:09:06.730 align:middle line:84%
It's the contact
resistance because we

00:09:06.730 --> 00:09:10.570 align:middle line:84%
have a finite specific
contact resistivity,

00:09:10.570 --> 00:09:13.240 align:middle line:84%
2 and 1/2 times 10 to the
minus 7 ohm centimeter squared.

00:09:13.240 --> 00:09:16.040 align:middle line:84%
And we're trying to make
contact in a very small area.

00:09:16.040 --> 00:09:16.998 align:middle line:90%
So what's the solution?

00:09:16.998 --> 00:09:18.373 align:middle line:84%
Well, I can make
the area bigger,

00:09:18.373 --> 00:09:19.930 align:middle line:84%
make the devices
bigger on the chip.

00:09:19.930 --> 00:09:20.980 align:middle line:90%
I get fewer devices.

00:09:20.980 --> 00:09:22.240 align:middle line:90%
That's not good.

00:09:22.240 --> 00:09:24.427 align:middle line:90%
Or we have to scale this number.

00:09:24.427 --> 00:09:26.260 align:middle line:84%
According to the ITRS,
remember, this number

00:09:26.260 --> 00:09:27.490 align:middle line:90%
is going to have to go down.

00:09:27.490 --> 00:09:31.690 align:middle line:84%
In 2003, ITRS wants this
number to be about 2 times 10

00:09:31.690 --> 00:09:33.400 align:middle line:90%
to minus 7.

00:09:33.400 --> 00:09:35.390 align:middle line:84%
So it's already supposed
to be lower than that.

00:09:35.390 --> 00:09:37.098 align:middle line:84%
And over the next 10
years, it's supposed

00:09:37.098 --> 00:09:38.920 align:middle line:84%
to be lowered by a
factor of 3 or 4.

00:09:38.920 --> 00:09:42.400 align:middle line:84%
So this number of
100 ohms gets lower

00:09:42.400 --> 00:09:44.170 align:middle line:84%
or it certainly
does not increase

00:09:44.170 --> 00:09:45.635 align:middle line:90%
as we scale the devices.

00:09:45.635 --> 00:09:47.260 align:middle line:84%
But just kind of
gives you a rough idea

00:09:47.260 --> 00:09:50.230 align:middle line:84%
of what the big contributions
are if you do it right.

00:09:50.230 --> 00:09:53.070 align:middle line:84%
Again, if you didn't get enough
doping in this shallow source

00:09:53.070 --> 00:09:55.160 align:middle line:84%
drain extension,
this 10 ohm number

00:09:55.160 --> 00:09:59.230 align:middle line:84%
could go up, depending on
your junction depth, how you

00:09:59.230 --> 00:10:01.210 align:middle line:90%
scale that, and your doping.

00:10:01.210 --> 00:10:03.220 align:middle line:84%
But these are
simple calculations

00:10:03.220 --> 00:10:04.780 align:middle line:84%
you can do to back
of the envelope.

00:10:04.780 --> 00:10:07.430 align:middle line:84%
And we didn't get to go through
that last time we presented it.

00:10:07.430 --> 00:10:12.520 align:middle line:84%
But this gives you an idea of
how those numbers work out.

00:10:12.520 --> 00:10:15.380 align:middle line:84%
Any questions on that
or on the contact?

00:10:15.380 --> 00:10:17.380 align:middle line:84%
We only spent one
lecture on contacts.

00:10:17.380 --> 00:10:21.310 align:middle line:84%
So there's a little bit
of this in chapter 11,

00:10:21.310 --> 00:10:23.590 align:middle line:84%
although I don't think
there's a specific example

00:10:23.590 --> 00:10:24.625 align:middle line:90%
of a MOSFET like this.

00:10:24.625 --> 00:10:28.000 align:middle line:90%


00:10:28.000 --> 00:10:28.510 align:middle line:90%
OK.

00:10:28.510 --> 00:10:33.580 align:middle line:84%
So let's go on then to
today's actual material, which

00:10:33.580 --> 00:10:38.420 align:middle line:84%
is going to be a little bit of a
divergence, to a certain extent,

00:10:38.420 --> 00:10:40.300 align:middle line:90%
from the other lectures.

00:10:40.300 --> 00:10:41.800 align:middle line:84%
This material is
not in the text.

00:10:41.800 --> 00:10:47.770 align:middle line:84%
This is all more up-to-date
research material

00:10:47.770 --> 00:10:50.650 align:middle line:84%
that's come out and has not
yet been put into a textbook.

00:10:50.650 --> 00:10:52.960 align:middle line:90%
But you have the handouts.

00:10:52.960 --> 00:10:55.540 align:middle line:84%
So what I want to talk about--
what we've talked about so

00:10:55.540 --> 00:11:00.370 align:middle line:84%
far for semiconductors is just
using pure silicon, pure silicon

00:11:00.370 --> 00:11:05.020 align:middle line:84%
wafers and pure silicon
materials to make CMOS,

00:11:05.020 --> 00:11:07.240 align:middle line:90%
to make MOSFETs.

00:11:07.240 --> 00:11:09.183 align:middle line:84%
It turns out, if we
use epitaxial growth,

00:11:09.183 --> 00:11:10.600 align:middle line:84%
we did spend a
little time talking

00:11:10.600 --> 00:11:12.190 align:middle line:84%
about epitaxial
growth of silicon

00:11:12.190 --> 00:11:15.800 align:middle line:84%
by CVD or some
similar technique.

00:11:15.800 --> 00:11:17.320 align:middle line:84%
If we use epitaxial
growth, you can

00:11:17.320 --> 00:11:19.630 align:middle line:84%
mix in small
amounts of germanium

00:11:19.630 --> 00:11:21.790 align:middle line:84%
into the silicon material
and make an alloy

00:11:21.790 --> 00:11:22.900 align:middle line:90%
called silicon germanium.

00:11:22.900 --> 00:11:25.570 align:middle line:84%
Or you can mix an
even smaller amounts

00:11:25.570 --> 00:11:28.910 align:middle line:84%
of carbon, maybe 1% or so, and
make an alloy of the silicon

00:11:28.910 --> 00:11:29.660 align:middle line:90%
and carbon.

00:11:29.660 --> 00:11:31.220 align:middle line:90%
And people are doing this.

00:11:31.220 --> 00:11:34.010 align:middle line:84%
And some of these alloys are
used today in modern production

00:11:34.010 --> 00:11:35.570 align:middle line:90%
devices in manufacturing.

00:11:35.570 --> 00:11:39.170 align:middle line:84%
So I just wanted to go through
some of the important material

00:11:39.170 --> 00:11:42.380 align:middle line:84%
electronic properties of
these newer semiconductors

00:11:42.380 --> 00:11:45.290 align:middle line:84%
and how the layers are
processed to a certain extent

00:11:45.290 --> 00:11:47.900 align:middle line:84%
and what some of the issues
in research and development

00:11:47.900 --> 00:11:50.940 align:middle line:90%
that people are considering.

00:11:50.940 --> 00:11:53.600 align:middle line:84%
So here on slide
two, what I'm showing

00:11:53.600 --> 00:11:57.380 align:middle line:84%
are some applications of
these silicon germanium

00:11:57.380 --> 00:12:01.760 align:middle line:84%
alloys and related materials
like silicon germanium carbon.

00:12:01.760 --> 00:12:05.450 align:middle line:84%
The first bullet is for
a number of years now,

00:12:05.450 --> 00:12:07.940 align:middle line:84%
maybe the last 10
years, silicon germanium

00:12:07.940 --> 00:12:10.370 align:middle line:84%
has been used in
production as the base

00:12:10.370 --> 00:12:14.180 align:middle line:84%
layer in a heterojunction
bipolar transistor,

00:12:14.180 --> 00:12:17.570 align:middle line:84%
in a bipolar transistor, the
base layer being quite thin.

00:12:17.570 --> 00:12:19.860 align:middle line:84%
We haven't talked much about
bipolars in this class.

00:12:19.860 --> 00:12:22.850 align:middle line:84%
This class is mostly
about making CMOS devices.

00:12:22.850 --> 00:12:25.520 align:middle line:84%
But it's a thin layer, a
couple hundred angstroms, maybe

00:12:25.520 --> 00:12:27.760 align:middle line:90%
200 to 500 angstroms thick.

00:12:27.760 --> 00:12:31.330 align:middle line:84%
This is used in high frequency
analog applications, generally

00:12:31.330 --> 00:12:34.440 align:middle line:84%
telecommunications applications,
base stations, and things

00:12:34.440 --> 00:12:34.940 align:middle line:90%
like that.

00:12:34.940 --> 00:12:37.540 align:middle line:84%
And there are a number
of companies, maybe

00:12:37.540 --> 00:12:40.210 align:middle line:84%
half a dozen or more, that
manufacture these and sell

00:12:40.210 --> 00:12:41.300 align:middle line:90%
these devices.

00:12:41.300 --> 00:12:44.290 align:middle line:84%
So for the purpose of
growing thin films,

00:12:44.290 --> 00:12:46.450 align:middle line:84%
this is something
that has been done now

00:12:46.450 --> 00:12:49.160 align:middle line:90%
in manufacturing for some time.

00:12:49.160 --> 00:12:52.930 align:middle line:84%
The second bullet refers to
a little more advanced type

00:12:52.930 --> 00:12:53.600 align:middle line:90%
of material.

00:12:53.600 --> 00:12:56.270 align:middle line:84%
And this just coming
in to production now.

00:12:56.270 --> 00:12:59.818 align:middle line:84%
And these are layers of relaxed
silicon germanium or strained

00:12:59.818 --> 00:13:02.110 align:middle line:84%
silicon germanium-- and I'll
talk about what that means

00:13:02.110 --> 00:13:03.250 align:middle line:90%
in a little while--

00:13:03.250 --> 00:13:05.440 align:middle line:84%
that are used to induce
strain in silicon.

00:13:05.440 --> 00:13:09.280 align:middle line:84%
So these layers are used
to take silicon channel

00:13:09.280 --> 00:13:12.880 align:middle line:84%
and to either stretch it or
compress it mechanically.

00:13:12.880 --> 00:13:14.470 align:middle line:84%
And by stretching
and compressing

00:13:14.470 --> 00:13:17.410 align:middle line:84%
the lattice in the channel,
you can enhance the mobility

00:13:17.410 --> 00:13:18.280 align:middle line:90%
as it turns out.

00:13:18.280 --> 00:13:20.738 align:middle line:84%
Enhancing the mobility means
you get a higher current drive

00:13:20.738 --> 00:13:23.930 align:middle line:84%
for a given voltage so the
devices will switch faster.

00:13:23.930 --> 00:13:28.040 align:middle line:84%
So for enhancing CMOS,
some of these materials

00:13:28.040 --> 00:13:29.240 align:middle line:90%
are now in production.

00:13:29.240 --> 00:13:33.290 align:middle line:84%
Intel has a new Pentium that's
in production using this type

00:13:33.290 --> 00:13:36.530 align:middle line:90%
of technique, these materials.

00:13:36.530 --> 00:13:39.260 align:middle line:84%
Sometimes, silicon germanium
can be used as a boron diffusion

00:13:39.260 --> 00:13:39.860 align:middle line:90%
barrier.

00:13:39.860 --> 00:13:42.318 align:middle line:84%
We spent a lot of time in this
class talking about the fact

00:13:42.318 --> 00:13:44.625 align:middle line:84%
that boron is a fast
diffuser in silicon.

00:13:44.625 --> 00:13:47.000 align:middle line:84%
That's one of the problems
with making shallow junctions.

00:13:47.000 --> 00:13:48.980 align:middle line:84%
Well, it turns out,
in silicon germanium,

00:13:48.980 --> 00:13:51.380 align:middle line:84%
for reasons that are not
completely understood,

00:13:51.380 --> 00:13:54.320 align:middle line:84%
the more germanium you add,
the slower the boron diffusion

00:13:54.320 --> 00:13:54.990 align:middle line:90%
coefficient.

00:13:54.990 --> 00:13:57.260 align:middle line:84%
So if you put in 20%
germanium the lattice,

00:13:57.260 --> 00:14:00.110 align:middle line:84%
the boron diffusivity drops
by about a factor of 10

00:14:00.110 --> 00:14:01.180 align:middle line:90%
in silicon germanium.

00:14:01.180 --> 00:14:03.300 align:middle line:90%
So that's a huge factor.

00:14:03.300 --> 00:14:05.810 align:middle line:84%
So people may want to use
silicon germanium, just as

00:14:05.810 --> 00:14:08.540 align:middle line:84%
a means of slowing
down boron diffusion.

00:14:08.540 --> 00:14:10.160 align:middle line:90%
It's used in micromachining.

00:14:10.160 --> 00:14:13.070 align:middle line:84%
In MEMS technology, it happens
to be an excellent etch stop.

00:14:13.070 --> 00:14:17.780 align:middle line:84%
So there are etches, wet
chemical etches, primarily wet,

00:14:17.780 --> 00:14:21.410 align:middle line:84%
maybe a few dry, that will
stop on silicon germanium

00:14:21.410 --> 00:14:23.990 align:middle line:84%
and etch through silicon and
stop on silicon germanium

00:14:23.990 --> 00:14:25.110 align:middle line:90%
and vice versa.

00:14:25.110 --> 00:14:29.910 align:middle line:84%
So it can be used as a
sort of an etch stop layer.

00:14:29.910 --> 00:14:31.417 align:middle line:84%
Some people are
advocating using--

00:14:31.417 --> 00:14:33.000 align:middle line:84%
I don't think it's
in production but I

00:14:33.000 --> 00:14:35.130 align:middle line:84%
know of-- but
polycrystalline silicon

00:14:35.130 --> 00:14:37.270 align:middle line:90%
germanium as the gate material.

00:14:37.270 --> 00:14:39.270 align:middle line:84%
We've talked in this class
the last few lectures

00:14:39.270 --> 00:14:40.380 align:middle line:90%
about metal gates.

00:14:40.380 --> 00:14:42.060 align:middle line:84%
Before they get to
metal gates, people

00:14:42.060 --> 00:14:44.850 align:middle line:84%
were advocating using a
polycrystalline silicon

00:14:44.850 --> 00:14:47.190 align:middle line:84%
germanium instead of
polycrystalline silicon.

00:14:47.190 --> 00:14:48.720 align:middle line:84%
I don't know, again,
if that really

00:14:48.720 --> 00:14:50.100 align:middle line:90%
is making it into production.

00:14:50.100 --> 00:14:52.680 align:middle line:84%
Silicon germanium is also used
as an infrared photo detector

00:14:52.680 --> 00:14:55.590 align:middle line:84%
material for integrating
photodetectors

00:14:55.590 --> 00:14:57.940 align:middle line:90%
with silicon CMOS.

00:14:57.940 --> 00:15:00.997 align:middle line:84%
Silicon germanium carbon is
in production now, maybe not

00:15:00.997 --> 00:15:02.830 align:middle line:84%
silicon carbon, but
silicon germanium carbon

00:15:02.830 --> 00:15:05.740 align:middle line:84%
is in production with very small
amounts of carbon, maybe a half

00:15:05.740 --> 00:15:08.680 align:middle line:84%
a percent, as a
way of suppressing

00:15:08.680 --> 00:15:12.670 align:middle line:84%
transient enhanced diffusion
in heterojunction bipolar

00:15:12.670 --> 00:15:13.540 align:middle line:90%
transistors.

00:15:13.540 --> 00:15:15.748 align:middle line:84%
So think somebody's
doing a report on that.

00:15:15.748 --> 00:15:17.290 align:middle line:84%
One of the people
signed up for that.

00:15:17.290 --> 00:15:22.330 align:middle line:84%
So that's kind of a hot topic,
the use of carbon to completely

00:15:22.330 --> 00:15:23.830 align:middle line:90%
suck up all the interstitials.

00:15:23.830 --> 00:15:27.320 align:middle line:84%
And then that completely
changes the TD effect.

00:15:27.320 --> 00:15:30.610 align:middle line:84%
So these materials have
quite a bit of application.

00:15:30.610 --> 00:15:33.460 align:middle line:84%
So on slide 3, this looks
like a long outline.

00:15:33.460 --> 00:15:35.200 align:middle line:84%
But I'm just going
to touch on-- after I

00:15:35.200 --> 00:15:36.970 align:middle line:90%
introduce these the materials.

00:15:36.970 --> 00:15:40.420 align:middle line:84%
I'm going to touch a
little bit on the MOSFETs

00:15:40.420 --> 00:15:43.090 align:middle line:84%
and the applications of strained
silicon and strained silicon

00:15:43.090 --> 00:15:44.957 align:middle line:90%
germanium to CMOS.

00:15:44.957 --> 00:15:47.290 align:middle line:84%
I'll talk a little bit about
how the materials are grown

00:15:47.290 --> 00:15:49.060 align:middle line:84%
and about how the
dopants diffused

00:15:49.060 --> 00:15:52.450 align:middle line:84%
in these materials
and a little bit

00:15:52.450 --> 00:15:55.270 align:middle line:84%
about some newer material where
we're putting them on insulator.

00:15:55.270 --> 00:15:58.360 align:middle line:84%
Strained silicon on
insulator is a very kind

00:15:58.360 --> 00:16:02.860 align:middle line:84%
of a hot topic of
research these days.

00:16:02.860 --> 00:16:08.110 align:middle line:84%
Well, if we go to slide 4, this
is more of a motivational slide.

00:16:08.110 --> 00:16:09.760 align:middle line:84%
The question we're
trying to ask is,

00:16:09.760 --> 00:16:13.300 align:middle line:84%
if you have a CMOS circuit,
maybe inverter or something,

00:16:13.300 --> 00:16:16.180 align:middle line:84%
how quickly can it switch from
one state of the zero state

00:16:16.180 --> 00:16:20.260 align:middle line:84%
to on state-- the zero state
to the one state, for example?

00:16:20.260 --> 00:16:22.870 align:middle line:84%
And this the delay in
doing that is something

00:16:22.870 --> 00:16:24.640 align:middle line:90%
called the gate delay.

00:16:24.640 --> 00:16:26.260 align:middle line:84%
It's usually measured
in picoseconds.

00:16:26.260 --> 00:16:28.695 align:middle line:84%
And that gate delay is
something we want to minimize.

00:16:28.695 --> 00:16:30.070 align:middle line:84%
We want to minimize
the switching

00:16:30.070 --> 00:16:33.340 align:middle line:84%
of each gate in
the logic sequence

00:16:33.340 --> 00:16:38.180 align:middle line:84%
so that the overall circuit
can do computation faster.

00:16:38.180 --> 00:16:41.890 align:middle line:84%
So the gate delay generally, if
you've taken classes like 6012

00:16:41.890 --> 00:16:45.970 align:middle line:84%
or you've had some other
undergraduate classes on CMOS,

00:16:45.970 --> 00:16:48.730 align:middle line:84%
as you scale the gate length--
that's why we're making the gate

00:16:48.730 --> 00:16:49.960 align:middle line:90%
length shorter and shorter--

00:16:49.960 --> 00:16:51.170 align:middle line:90%
the gate delay goes down.

00:16:51.170 --> 00:16:53.650 align:middle line:84%
This is actually some data
showing how it does indeed

00:16:53.650 --> 00:16:55.030 align:middle line:90%
scale at 0.1 micron.

00:16:55.030 --> 00:16:59.140 align:middle line:84%
The gate delay is down
in the 5 or so picosecond

00:16:59.140 --> 00:17:01.940 align:middle line:90%
or some 5 picosecond range.

00:17:01.940 --> 00:17:04.760 align:middle line:84%
Well, it turns out that
the gate delay is inversely

00:17:04.760 --> 00:17:06.119 align:middle line:90%
proportional to the current.

00:17:06.119 --> 00:17:10.220 align:middle line:84%
So if you can pump more current
through each device, then

00:17:10.220 --> 00:17:13.010 align:middle line:84%
as one device charges,
the device after it

00:17:13.010 --> 00:17:14.093 align:middle line:90%
has to charge up a device.

00:17:14.093 --> 00:17:15.802 align:middle line:84%
The more currents
going through, the more

00:17:15.802 --> 00:17:17.730 align:middle line:84%
quickly it will charge
its neighboring device.

00:17:17.730 --> 00:17:20.329 align:middle line:84%
So the name of the game in
getting higher speed in logic

00:17:20.329 --> 00:17:23.420 align:middle line:84%
devices, at least for digital,
is at a given voltage,

00:17:23.420 --> 00:17:26.849 align:middle line:84%
to get more drain current
out of the device.

00:17:26.849 --> 00:17:28.975 align:middle line:84%
And so you say, OK,
at a given voltage,

00:17:28.975 --> 00:17:30.350 align:middle line:84%
how can I get more
drain current?

00:17:30.350 --> 00:17:32.390 align:middle line:84%
Well, this is what the
drain current looks like.

00:17:32.390 --> 00:17:35.360 align:middle line:84%
There are several physical
variables it depends on.

00:17:35.360 --> 00:17:37.940 align:middle line:84%
It depends on the mobility
of the carriers, directly

00:17:37.940 --> 00:17:38.750 align:middle line:90%
proportional.

00:17:38.750 --> 00:17:41.100 align:middle line:84%
It's inversely proportional
to the oxide thickness.

00:17:41.100 --> 00:17:43.970 align:middle line:84%
So if I make the oxide thinner,
I get a higher capacitance,

00:17:43.970 --> 00:17:45.020 align:middle line:90%
and the current goes up.

00:17:45.020 --> 00:17:47.330 align:middle line:84%
That's why we're talking
about gate dielectric scaling

00:17:47.330 --> 00:17:51.318 align:middle line:84%
all the way down to
below 10 angstroms.

00:17:51.318 --> 00:17:53.610 align:middle line:84%
So that's where the gate
dielectric scaling comes from.

00:17:53.610 --> 00:17:57.090 align:middle line:84%
And if I make the channel
shorter, it does also go up.

00:17:57.090 --> 00:18:00.140 align:middle line:84%
So how do people do
conventional scaling

00:18:00.140 --> 00:18:02.820 align:middle line:84%
to increase ID or
speed for logic?

00:18:02.820 --> 00:18:05.148 align:middle line:84%
They make the gate
length shorter.

00:18:05.148 --> 00:18:06.690 align:middle line:84%
They reduce the gate
oxide thickness.

00:18:06.690 --> 00:18:09.780 align:middle line:84%
The real question has been in
the last five or 10 years, what

00:18:09.780 --> 00:18:11.310 align:middle line:90%
about the mobility?

00:18:11.310 --> 00:18:13.617 align:middle line:84%
Is that a variable
that we can tweak?

00:18:13.617 --> 00:18:15.450 align:middle line:84%
We're pretty much done
with scaling the gate

00:18:15.450 --> 00:18:19.180 align:middle line:84%
oxide because we can't get much
thinner, only a few atoms thick.

00:18:19.180 --> 00:18:21.660 align:middle line:84%
Making the transistor shorter
is getting harder and harder

00:18:21.660 --> 00:18:24.060 align:middle line:84%
lithographically and for
electrostatic reasons,

00:18:24.060 --> 00:18:26.260 align:middle line:84%
don't have too many more
variables in this equation.

00:18:26.260 --> 00:18:30.510 align:middle line:84%
So mobility is the
last thing to touch.

00:18:30.510 --> 00:18:32.760 align:middle line:84%
And that's where the silicon
germanium alloys come in.

00:18:32.760 --> 00:18:35.370 align:middle line:84%
Here on page five,
what I'm showing

00:18:35.370 --> 00:18:38.820 align:middle line:84%
is some classic data
on the literature

00:18:38.820 --> 00:18:41.280 align:middle line:84%
of what the electron
mobility that number.

00:18:41.280 --> 00:18:43.800 align:middle line:84%
Mu N is not a single
number in a MOSFET.

00:18:43.800 --> 00:18:46.230 align:middle line:84%
So this is a plot of
the effective electron

00:18:46.230 --> 00:18:47.760 align:middle line:90%
mobility in a channel.

00:18:47.760 --> 00:18:49.650 align:middle line:84%
And again, as this
number goes up,

00:18:49.650 --> 00:18:51.660 align:middle line:84%
the current goes up
at a given voltage.

00:18:51.660 --> 00:18:53.970 align:middle line:84%
As a function of the
vertical field in the device,

00:18:53.970 --> 00:18:55.800 align:middle line:84%
the vertical field is
induced by the gate.

00:18:55.800 --> 00:18:59.400 align:middle line:84%
So as I put a gate
bias on the device,

00:18:59.400 --> 00:19:01.830 align:middle line:84%
as I bias the device,
the gate bias,

00:19:01.830 --> 00:19:03.230 align:middle line:90%
I get higher inversion charge.

00:19:03.230 --> 00:19:06.825 align:middle line:84%
And so in fact, the
mobility actually goes down.

00:19:06.825 --> 00:19:08.200 align:middle line:84%
But so you notice
it's a function

00:19:08.200 --> 00:19:11.170 align:middle line:84%
of the vertical effective
field in the silicon

00:19:11.170 --> 00:19:14.830 align:middle line:84%
and that modern MOSFETs
are operating somewhere

00:19:14.830 --> 00:19:16.010 align:middle line:90%
in this range right now.

00:19:16.010 --> 00:19:19.420 align:middle line:84%
I can just tell you, based
on the gate oxide thickness

00:19:19.420 --> 00:19:21.850 align:middle line:84%
and the typical
voltages, 1 to 3 volts

00:19:21.850 --> 00:19:25.400 align:middle line:84%
that MOSFETs are operating in,
if you calculated out the effect

00:19:25.400 --> 00:19:27.400 align:middle line:84%
the field in the channel,
it's about a mega volt

00:19:27.400 --> 00:19:28.400 align:middle line:90%
per centimeter.

00:19:28.400 --> 00:19:31.600 align:middle line:84%
So modern MOSFETs these
days, the electron mobility

00:19:31.600 --> 00:19:34.350 align:middle line:84%
is right about on this
curve, somewhere between 200

00:19:34.350 --> 00:19:37.180 align:middle line:90%
and 300 but, closer to 200.

00:19:37.180 --> 00:19:39.940 align:middle line:84%
A number of years ago when
we used lighter doping,

00:19:39.940 --> 00:19:43.360 align:middle line:84%
so let's say you're using
much lighter doping like 317,

00:19:43.360 --> 00:19:46.570 align:middle line:84%
and the oxides were thicker, the
vertical field was much lower,

00:19:46.570 --> 00:19:49.000 align:middle line:90%
maybe half of what it is today.

00:19:49.000 --> 00:19:50.125 align:middle line:90%
And the mobility was twice.

00:19:50.125 --> 00:19:51.430 align:middle line:90%
It was what 400.

00:19:51.430 --> 00:19:53.350 align:middle line:84%
So this is the
problem with mobility.

00:19:53.350 --> 00:19:57.992 align:middle line:84%
As we march down the ITRS, we
scale that gate oxide thickness.

00:19:57.992 --> 00:19:59.200 align:middle line:90%
So we get higher capacitance.

00:19:59.200 --> 00:20:01.010 align:middle line:90%
That's good.

00:20:01.010 --> 00:20:03.460 align:middle line:84%
But we also increasing
the doping in the channel,

00:20:03.460 --> 00:20:05.860 align:middle line:84%
and we're increasing the
vertical effective field.

00:20:05.860 --> 00:20:07.425 align:middle line:84%
So we're marching
down this curve.

00:20:07.425 --> 00:20:09.550 align:middle line:84%
And the mobility is going
lower and lower and lower

00:20:09.550 --> 00:20:10.510 align:middle line:90%
with each generation.

00:20:10.510 --> 00:20:11.090 align:middle line:90%
That's bad.

00:20:11.090 --> 00:20:16.567 align:middle line:84%
That takes away from our current
drive, to a certain extent.

00:20:16.567 --> 00:20:17.400 align:middle line:90%
So that's a problem.

00:20:17.400 --> 00:20:18.775 align:middle line:84%
So what people
have decided to do

00:20:18.775 --> 00:20:23.010 align:middle line:84%
is OK, it turns out, if I can
change this mobility curve,

00:20:23.010 --> 00:20:25.880 align:middle line:84%
in fact, I can push the whole
curve up quite significantly

00:20:25.880 --> 00:20:28.790 align:middle line:90%
if I put stress on the silicon.

00:20:28.790 --> 00:20:31.340 align:middle line:84%
And I'll say a little bit
more in the next few slides

00:20:31.340 --> 00:20:33.520 align:middle line:90%
about how that works.

00:20:33.520 --> 00:20:35.790 align:middle line:84%
So people have tried a
number of different ways

00:20:35.790 --> 00:20:39.420 align:middle line:84%
to stress out the devices or
to put stress on the silicone.

00:20:39.420 --> 00:20:41.290 align:middle line:84%
You have to stress
it in a certain way.

00:20:41.290 --> 00:20:43.020 align:middle line:84%
And this schematic
kind of gives you

00:20:43.020 --> 00:20:45.600 align:middle line:84%
an idea of a good way
of inducing stress.

00:20:45.600 --> 00:20:49.050 align:middle line:84%
For electrons, this looks like
just like a regular nMOSFET.

00:20:49.050 --> 00:20:53.370 align:middle line:84%
But you notice I've highlighted
this channel region in yellow.

00:20:53.370 --> 00:20:54.800 align:middle line:84%
And it's called
strained silicon.

00:20:54.800 --> 00:20:56.460 align:middle line:84%
A classically
strained silicon was

00:20:56.460 --> 00:20:59.940 align:middle line:84%
generated by taking a
wafer of silicon germanium

00:20:59.940 --> 00:21:04.350 align:middle line:84%
or a very thick layer of silicon
germanium, say with 20% or 30%

00:21:04.350 --> 00:21:06.540 align:middle line:84%
germanium, silicon germanium
has a larger lattice

00:21:06.540 --> 00:21:08.630 align:middle line:90%
parameter than silicon.

00:21:08.630 --> 00:21:10.800 align:middle line:84%
Pure germanium is
about 4% bigger.

00:21:10.800 --> 00:21:15.388 align:middle line:84%
So this 30% layer is going
to be a little bit larger

00:21:15.388 --> 00:21:16.430 align:middle line:90%
in its lattice parameter.

00:21:16.430 --> 00:21:18.870 align:middle line:90%
So if it's relaxed, it's bigger.

00:21:18.870 --> 00:21:20.900 align:middle line:84%
And if the silicon
layer is thin,

00:21:20.900 --> 00:21:23.060 align:middle line:84%
when you grow it epitaxially,
the silicon lattice

00:21:23.060 --> 00:21:25.940 align:middle line:84%
will actually stretch in
the X and the Y directions

00:21:25.940 --> 00:21:28.520 align:middle line:84%
to match that of the substrate,
as long as it's thin enough.

00:21:28.520 --> 00:21:30.680 align:middle line:84%
It's energetically favorable
to stretch the bonds

00:21:30.680 --> 00:21:32.460 align:middle line:90%
instead of breaking them.

00:21:32.460 --> 00:21:33.830 align:middle line:90%
So the silicon is stretched.

00:21:33.830 --> 00:21:37.610 align:middle line:84%
This lattice parameter in the
X and Y plane is about 1.5%

00:21:37.610 --> 00:21:40.400 align:middle line:84%
bigger than it would
be in normal silicon.

00:21:40.400 --> 00:21:44.070 align:middle line:84%
That's a huge amount for it
to take a crystal lattice

00:21:44.070 --> 00:21:45.380 align:middle line:90%
and stretch it by 1.5%.

00:21:45.380 --> 00:21:46.850 align:middle line:90%
That's a lot.

00:21:46.850 --> 00:21:49.280 align:middle line:84%
As a result, when you
stretch it in the X and Y,

00:21:49.280 --> 00:21:51.050 align:middle line:84%
it actually compresses
a little bit in Z.

00:21:51.050 --> 00:21:55.490 align:middle line:84%
So in fact, we call this
particular configuration uniform

00:21:55.490 --> 00:21:56.810 align:middle line:90%
biaxial tensile stress.

00:21:56.810 --> 00:22:01.940 align:middle line:84%
It's biaxial and it's tensile,
is being pulled in X and Y.

00:22:01.940 --> 00:22:03.500 align:middle line:84%
So this is sort
of the classic way

00:22:03.500 --> 00:22:06.000 align:middle line:84%
that people have introduced
strain and made MOSFETs.

00:22:06.000 --> 00:22:08.000 align:middle line:84%
And they've looked at the
mobility as a function

00:22:08.000 --> 00:22:09.167 align:middle line:90%
of the amount of the strain.

00:22:09.167 --> 00:22:11.360 align:middle line:84%
There are other methods
though for straining.

00:22:11.360 --> 00:22:13.220 align:middle line:84%
Most of what I'll talk
about in this lecture

00:22:13.220 --> 00:22:15.740 align:middle line:90%
is this epitaxial growth method.

00:22:15.740 --> 00:22:18.443 align:middle line:84%
It's the easiest one to get
a handle on the physics.

00:22:18.443 --> 00:22:19.610 align:middle line:90%
But there are other methods.

00:22:19.610 --> 00:22:22.280 align:middle line:84%
People have used, for example,
when you make a MOSFET,

00:22:22.280 --> 00:22:24.950 align:middle line:84%
you don't just make an
individual MOSFET on a device.

00:22:24.950 --> 00:22:28.490 align:middle line:84%
All around the MOSFET, we do
something called shallow trench

00:22:28.490 --> 00:22:30.510 align:middle line:84%
isolation that we talked
about in this course.

00:22:30.510 --> 00:22:33.980 align:middle line:84%
We dig out a trench on all
the way around the MOSFET.

00:22:33.980 --> 00:22:37.970 align:middle line:84%
And we fill it up with oxide
or something, some insulator.

00:22:37.970 --> 00:22:41.330 align:middle line:84%
Well, IBM show back
in '97, depending

00:22:41.330 --> 00:22:44.210 align:middle line:84%
on how you fill that up, you
can potentially induce stress,

00:22:44.210 --> 00:22:46.880 align:middle line:84%
either compressive or tensile,
depending on what material you

00:22:46.880 --> 00:22:50.505 align:middle line:84%
put in because you're digging
a moat around the device,

00:22:50.505 --> 00:22:52.130 align:middle line:84%
and you're putting
some material in it.

00:22:52.130 --> 00:22:58.080 align:middle line:84%
So you can actually use the STI,
so-called, to induce stress.

00:22:58.080 --> 00:23:00.690 align:middle line:84%
There are other processes
during fabrication

00:23:00.690 --> 00:23:05.460 align:middle line:84%
that Intel is using now where
they actually dig out the source

00:23:05.460 --> 00:23:06.090 align:middle line:90%
and drains.

00:23:06.090 --> 00:23:07.547 align:middle line:90%
They cut them out with etching.

00:23:07.547 --> 00:23:09.630 align:middle line:84%
And they fill them back
up with silicon germanium,

00:23:09.630 --> 00:23:12.390 align:middle line:84%
which compresses the channel,
which helps the hole mobility.

00:23:12.390 --> 00:23:14.670 align:middle line:84%
So people are doing
things like that.

00:23:14.670 --> 00:23:17.520 align:middle line:84%
You can actually
stress the device.

00:23:17.520 --> 00:23:20.070 align:middle line:84%
On top of the device, they put
a layer of high stress nitride

00:23:20.070 --> 00:23:21.810 align:middle line:84%
and try to induce
stress by applying

00:23:21.810 --> 00:23:23.355 align:middle line:90%
films that are high stress.

00:23:23.355 --> 00:23:24.480 align:middle line:90%
You can also bend the chip.

00:23:24.480 --> 00:23:27.868 align:middle line:84%
There's a small startup company
in the southeast of the United

00:23:27.868 --> 00:23:29.910 align:middle line:84%
States where they're taking
chips, thinning them,

00:23:29.910 --> 00:23:32.390 align:middle line:84%
and actually trying to pin them
mechanically during stress.

00:23:32.390 --> 00:23:33.390 align:middle line:90%
It seems a little crazy.

00:23:33.390 --> 00:23:36.040 align:middle line:90%
But it may be possible.

00:23:36.040 --> 00:23:40.060 align:middle line:84%
But epitaxial growth is in some
ways the most well controlled.

00:23:40.060 --> 00:23:45.181 align:middle line:84%
And the physics is a little
bit easier to get a handle on.

00:23:45.181 --> 00:23:47.180 align:middle line:84%
So let me just mention
here on slide 7.

00:23:47.180 --> 00:23:54.050 align:middle line:84%
This is the IBM work in 1997
where they talked about in STI--

00:23:54.050 --> 00:23:56.900 align:middle line:84%
we learned in this course,
you fill up the shallow trench

00:23:56.900 --> 00:23:57.710 align:middle line:90%
with--

00:23:57.710 --> 00:23:59.240 align:middle line:84%
well, first, you
oxidize the liner.

00:23:59.240 --> 00:24:02.180 align:middle line:84%
Then you fill it up with LTO
or some low temperature oxide.

00:24:02.180 --> 00:24:07.790 align:middle line:84%
What they say was they grew
an oxide liner for isolation.

00:24:07.790 --> 00:24:11.540 align:middle line:84%
And then they fill the
trench with polysilicon,

00:24:11.540 --> 00:24:14.120 align:middle line:84%
which they thought would
induce a lot of stress,

00:24:14.120 --> 00:24:16.310 align:middle line:84%
compressive stress,
pushing in all

00:24:16.310 --> 00:24:18.390 align:middle line:90%
around the edges of the device.

00:24:18.390 --> 00:24:20.720 align:middle line:84%
And then they looked
at the hole mobility.

00:24:20.720 --> 00:24:23.270 align:middle line:84%
And indeed, what they
found, particularly

00:24:23.270 --> 00:24:27.410 align:middle line:84%
on SOI layers, which are very
thin, when they made the device

00:24:27.410 --> 00:24:30.872 align:middle line:84%
width very small, say 1
micron compared to 10 microns,

00:24:30.872 --> 00:24:32.330 align:middle line:84%
so you make the
device width small,

00:24:32.330 --> 00:24:34.573 align:middle line:84%
that brings the shallow
trench in closer and closer

00:24:34.573 --> 00:24:36.740 align:middle line:84%
to the center of the channel
so it can have a bigger

00:24:36.740 --> 00:24:38.510 align:middle line:90%
effect as it's pushing in.

00:24:38.510 --> 00:24:41.270 align:middle line:84%
And they saw that the hole
mobility went up quite a bit.

00:24:41.270 --> 00:24:43.290 align:middle line:84%
On a 10-micron device,
maybe the mobility

00:24:43.290 --> 00:24:45.330 align:middle line:90%
was here, about 100 or 110.

00:24:45.330 --> 00:24:50.050 align:middle line:84%
It went up by about 34% to
about 140 just by doing this.

00:24:50.050 --> 00:24:51.720 align:middle line:84%
Now, maybe it wasn't
such a great idea

00:24:51.720 --> 00:24:54.420 align:middle line:84%
to put that much stress
and use polysilicon.

00:24:54.420 --> 00:24:56.100 align:middle line:84%
It wasn't necessarily
a practical thing.

00:24:56.100 --> 00:24:58.710 align:middle line:84%
But it just shows
that depending on how

00:24:58.710 --> 00:25:01.075 align:middle line:84%
you do your processes,
how you do your STI,

00:25:01.075 --> 00:25:03.450 align:middle line:84%
it can have a pretty big
effect, particularly on the hole

00:25:03.450 --> 00:25:05.540 align:middle line:90%
mobility.

00:25:05.540 --> 00:25:08.960 align:middle line:84%
So this was an indicator
early on that people

00:25:08.960 --> 00:25:13.070 align:middle line:84%
need to pay dramatic attention
to exactly what thermal budget

00:25:13.070 --> 00:25:16.520 align:middle line:84%
you use, what materials you
use in STI every layer you

00:25:16.520 --> 00:25:18.060 align:middle line:90%
put on that device.

00:25:18.060 --> 00:25:20.450 align:middle line:84%
Now that the devices are
small-- the width of devices

00:25:20.450 --> 00:25:22.560 align:middle line:90%
today is less than a micron.

00:25:22.560 --> 00:25:24.410 align:middle line:84%
Now that they're so
small, edge effects

00:25:24.410 --> 00:25:26.382 align:middle line:84%
can have a huge
impact on the stress

00:25:26.382 --> 00:25:27.590 align:middle line:90%
in the center of the channel.

00:25:27.590 --> 00:25:31.900 align:middle line:84%
And that can end up
impacting the mobility.

00:25:31.900 --> 00:25:33.900 align:middle line:84%
So I refer to the fact
that we have this strain.

00:25:33.900 --> 00:25:35.780 align:middle line:84%
And I guess I should have
introduced slide 8 a little bit

00:25:35.780 --> 00:25:36.500 align:middle line:90%
earlier.

00:25:36.500 --> 00:25:40.190 align:middle line:84%
But this just gives you a
picture, a ball and stick

00:25:40.190 --> 00:25:41.760 align:middle line:84%
picture of what
we're talking about.

00:25:41.760 --> 00:25:44.420 align:middle line:84%
So this ball and sticking
up in the upper left

00:25:44.420 --> 00:25:46.550 align:middle line:84%
is meant to represent
cubic silicone

00:25:46.550 --> 00:25:49.370 align:middle line:84%
because it has a lattice
parameter of about

00:25:49.370 --> 00:25:50.720 align:middle line:90%
5.4 angstroms.

00:25:50.720 --> 00:25:52.250 align:middle line:84%
It's the diamond
cubic structure.

00:25:52.250 --> 00:25:55.460 align:middle line:84%
But nevertheless, it has
a cubic symmetry to it.

00:25:55.460 --> 00:25:57.920 align:middle line:84%
X, Y and Z in those
three dimensions,

00:25:57.920 --> 00:26:03.150 align:middle line:84%
the lattice constant
parameter is the same number.

00:26:03.150 --> 00:26:06.390 align:middle line:84%
Cuprate germanium is larger,
same cubic structure,

00:26:06.390 --> 00:26:08.280 align:middle line:90%
but it's larger by about 4%.

00:26:08.280 --> 00:26:10.890 align:middle line:84%
If you make an alloy
anywhere in between,

00:26:10.890 --> 00:26:13.890 align:middle line:84%
and you have it thick
enough that it relaxes,

00:26:13.890 --> 00:26:15.842 align:middle line:84%
pretty much can use a
linear interpolation.

00:26:15.842 --> 00:26:16.800 align:middle line:90%
It's not quite perfect.

00:26:16.800 --> 00:26:19.000 align:middle line:84%
But you can use a
linear interpolation.

00:26:19.000 --> 00:26:22.380 align:middle line:84%
So at 50% silicon
germanium or 50% germanium,

00:26:22.380 --> 00:26:25.782 align:middle line:84%
the lattice mismatch
is about 2%.

00:26:25.782 --> 00:26:27.990 align:middle line:84%
So there are two different
types of silicon germanium

00:26:27.990 --> 00:26:29.560 align:middle line:90%
that people tend to talk about.

00:26:29.560 --> 00:26:31.950 align:middle line:84%
One is when you start
with a silicon substrate

00:26:31.950 --> 00:26:34.170 align:middle line:84%
and you grow a very thin
layer, say a few hundred

00:26:34.170 --> 00:26:37.170 align:middle line:84%
angstroms of silicon germanium
on silicon, what happens

00:26:37.170 --> 00:26:39.870 align:middle line:84%
is you're taking
this lattice here,

00:26:39.870 --> 00:26:43.290 align:middle line:84%
this cubic silicon
germanium wants to be cubic.

00:26:43.290 --> 00:26:44.280 align:middle line:90%
It's larger.

00:26:44.280 --> 00:26:46.800 align:middle line:84%
It wants to be larger in
equilibrium than silicon.

00:26:46.800 --> 00:26:48.210 align:middle line:90%
And you're squeezing it though.

00:26:48.210 --> 00:26:50.252 align:middle line:84%
It turns out, again, if
the layer is thin enough,

00:26:50.252 --> 00:26:53.580 align:middle line:84%
it's energetically favorable for
the in-plane lattice parameter

00:26:53.580 --> 00:26:55.140 align:middle line:84%
of this material
that you're growing

00:26:55.140 --> 00:26:56.950 align:middle line:90%
to match that of the substrate.

00:26:56.950 --> 00:27:00.060 align:middle line:84%
So the silicon germanium is
kind of squeezed in X and y.

00:27:00.060 --> 00:27:03.770 align:middle line:84%
And it pushes up in
Z. So this layer then

00:27:03.770 --> 00:27:05.570 align:middle line:84%
is what we call a
strained silicon

00:27:05.570 --> 00:27:07.220 align:middle line:90%
germanium on relaxed silicon.

00:27:07.220 --> 00:27:08.930 align:middle line:84%
And it's under
biaxial compressions.

00:27:08.930 --> 00:27:11.310 align:middle line:84%
Being compressed
in the XY plane.

00:27:11.310 --> 00:27:13.670 align:middle line:84%
Now, if we make it thick
enough, eventually, there's

00:27:13.670 --> 00:27:16.658 align:middle line:84%
too much stored energy
in those stretched bonds,

00:27:16.658 --> 00:27:18.950 align:middle line:84%
and the bonds will start
breaking and get dislocations,

00:27:18.950 --> 00:27:21.930 align:middle line:84%
and it'll relax back
to its cubic structure.

00:27:21.930 --> 00:27:24.080 align:middle line:84%
But for thin layers, you
can achieve this sort

00:27:24.080 --> 00:27:26.520 align:middle line:90%
of pseudomorphic structure.

00:27:26.520 --> 00:27:28.430 align:middle line:84%
You can also do kind
of the opposite,

00:27:28.430 --> 00:27:30.600 align:middle line:90%
or the upside-down experiment.

00:27:30.600 --> 00:27:32.480 align:middle line:84%
You take a wafer of
silicon germanium

00:27:32.480 --> 00:27:34.350 align:middle line:84%
that's very thick,
that's already relaxed,

00:27:34.350 --> 00:27:36.170 align:middle line:84%
that has a larger
lattice parameter

00:27:36.170 --> 00:27:40.010 align:middle line:84%
and try to stick silicon
on it in epitaxial growth.

00:27:40.010 --> 00:27:41.640 align:middle line:84%
Again, if the silicon
is thin enough,

00:27:41.640 --> 00:27:45.170 align:middle line:84%
it will now stretch in X
and Y to match the lattice

00:27:45.170 --> 00:27:46.400 align:middle line:90%
parameter of the substrate.

00:27:46.400 --> 00:27:49.670 align:middle line:84%
And it'll compress in Z. So we
call this silicon layer, epi

00:27:49.670 --> 00:27:51.440 align:middle line:84%
layer as being injured
biaxial tension.

00:27:51.440 --> 00:27:53.210 align:middle line:84%
And again, if you
grow it too large.

00:27:53.210 --> 00:27:54.710 align:middle line:84%
The bonds will no
longer stretch.

00:27:54.710 --> 00:27:55.310 align:middle line:90%
They'll break.

00:27:55.310 --> 00:27:56.640 align:middle line:90%
You'll get dislocations.

00:27:56.640 --> 00:27:57.500 align:middle line:90%
So it can go back.

00:27:57.500 --> 00:27:58.310 align:middle line:84%
Instead of being
stretched, it'll

00:27:58.310 --> 00:27:59.977 align:middle line:84%
go back to its normal
lattice parameter.

00:27:59.977 --> 00:28:02.110 align:middle line:90%
At that point, it'd be relaxed.

00:28:02.110 --> 00:28:05.050 align:middle line:84%
So this is the type of material
you'll see a lot in FETs.

00:28:05.050 --> 00:28:08.170 align:middle line:84%
And you see this material
in bipolar transistors

00:28:08.170 --> 00:28:09.860 align:middle line:90%
and some p-channel MOSFETs.

00:28:09.860 --> 00:28:12.690 align:middle line:90%


00:28:12.690 --> 00:28:15.240 align:middle line:84%
So what are some of the
important properties

00:28:15.240 --> 00:28:16.270 align:middle line:90%
of this strain?

00:28:16.270 --> 00:28:18.450 align:middle line:84%
I already mentioned
to you, for MOSFETs,

00:28:18.450 --> 00:28:21.060 align:middle line:84%
when you start stretching
the silicon lattice parameter

00:28:21.060 --> 00:28:24.295 align:middle line:84%
or compressing the parameter,
you can improve the mobility.

00:28:24.295 --> 00:28:25.920 align:middle line:84%
But there are other
parameters that you

00:28:25.920 --> 00:28:27.720 align:middle line:84%
change when you
introduce strain or when

00:28:27.720 --> 00:28:29.160 align:middle line:90%
you put silicon germanium in.

00:28:29.160 --> 00:28:32.760 align:middle line:84%
Probably one of the most
important parameters you need

00:28:32.760 --> 00:28:35.110 align:middle line:90%
to know about is the band gap.

00:28:35.110 --> 00:28:38.243 align:middle line:84%
So there is an energy band
gap difference between silicon

00:28:38.243 --> 00:28:39.160 align:middle line:90%
and silicon germanium.

00:28:39.160 --> 00:28:42.700 align:middle line:84%
If this represents the band
gap of relaxed silicon,

00:28:42.700 --> 00:28:45.700 align:middle line:84%
so EC is the conduction
band, EV is the valence band,

00:28:45.700 --> 00:28:48.070 align:middle line:84%
this is the band gap of
strained silicon germanium.

00:28:48.070 --> 00:28:49.420 align:middle line:90%
You see it's much smaller.

00:28:49.420 --> 00:28:52.240 align:middle line:84%
And most of the difference
occurs in the valence band.

00:28:52.240 --> 00:28:54.520 align:middle line:84%
The valence band
energy is larger.

00:28:54.520 --> 00:28:56.710 align:middle line:84%
So the silicon germanium
has a smaller band gap.

00:28:56.710 --> 00:28:57.850 align:middle line:90%
How much smaller?

00:28:57.850 --> 00:28:59.900 align:middle line:84%
Well, you can look
on this curve.

00:28:59.900 --> 00:29:02.350 align:middle line:84%
This is the difference between
the band gap of the two

00:29:02.350 --> 00:29:04.150 align:middle line:84%
as a function of
germanium content.

00:29:04.150 --> 00:29:06.760 align:middle line:84%
So here, if I have
strained silicon germanium,

00:29:06.760 --> 00:29:08.645 align:middle line:84%
you should use its
upper curve, not the one

00:29:08.645 --> 00:29:09.520 align:middle line:90%
that's as unstrained.

00:29:09.520 --> 00:29:14.650 align:middle line:84%
So a 20%, the band gap shrinks
by about 150 millivolts roughly.

00:29:14.650 --> 00:29:16.720 align:middle line:84%
So and you can read that
right off the curve.

00:29:16.720 --> 00:29:19.630 align:middle line:84%
Here at 50%, it's another
number, maybe 350.

00:29:19.630 --> 00:29:22.240 align:middle line:84%
So you have an idea
of how it moves.

00:29:22.240 --> 00:29:25.030 align:middle line:84%
All these data points are
our data from the literature.

00:29:25.030 --> 00:29:28.030 align:middle line:84%
There are people extracted the
band gap by various devices,

00:29:28.030 --> 00:29:30.130 align:middle line:84%
diodes, bipolar
transistors, photodiodes.

00:29:30.130 --> 00:29:32.740 align:middle line:84%
And the solid line
is some theory that

00:29:32.740 --> 00:29:34.190 align:middle line:90%
was published a long time ago.

00:29:34.190 --> 00:29:37.270 align:middle line:84%
So now, the other thing,
that's if it's strained.

00:29:37.270 --> 00:29:40.460 align:middle line:84%
If it's unstrained, if you
grow the silicon germanium

00:29:40.460 --> 00:29:44.020 align:middle line:84%
so thick that it relaxes
back, so it comes back

00:29:44.020 --> 00:29:47.530 align:middle line:84%
to this cubic structure, then
what happens to the band gap?

00:29:47.530 --> 00:29:50.500 align:middle line:84%
Well, in fact, the band gap
difference is a lot smaller.

00:29:50.500 --> 00:29:53.890 align:middle line:84%
When it's unstrained, the
band gap difference say a 20%

00:29:53.890 --> 00:29:55.820 align:middle line:90%
is only about 100 millivolts.

00:29:55.820 --> 00:29:58.802 align:middle line:84%
So a big fraction of
this band gap offset,

00:29:58.802 --> 00:30:00.760 align:middle line:84%
this band gap difference,
is due to the strain.

00:30:00.760 --> 00:30:03.640 align:middle line:84%
It's due to the lattice
parameter change.

00:30:03.640 --> 00:30:05.200 align:middle line:84%
A certain fraction
is due to the fact

00:30:05.200 --> 00:30:07.520 align:middle line:84%
that we're just
adding germanium.

00:30:07.520 --> 00:30:10.000 align:middle line:84%
So you need to know
whether the material is

00:30:10.000 --> 00:30:12.610 align:middle line:84%
unstrained or strained or
somewhere in between in order

00:30:12.610 --> 00:30:17.050 align:middle line:84%
to figure out what the
band structure looks like.

00:30:17.050 --> 00:30:18.473 align:middle line:84%
And in fact, on
slide 10, I don't

00:30:18.473 --> 00:30:20.140 align:middle line:84%
have to go through
this in great detail.

00:30:20.140 --> 00:30:22.640 align:middle line:84%
If you haven't had energy band
theory, it's a little tricky.

00:30:22.640 --> 00:30:25.450 align:middle line:84%
But slide 10 gives
you an idea of how

00:30:25.450 --> 00:30:29.410 align:middle line:84%
the strain does affect the
energy bands and the lineup.

00:30:29.410 --> 00:30:32.980 align:middle line:84%
And in fact, if we look at
the case for strained silicon

00:30:32.980 --> 00:30:36.195 align:middle line:84%
germanium on silicon, so
it'll be on-- remember,

00:30:36.195 --> 00:30:38.320 align:middle line:84%
we said when we grow strain,
so if the germanium is

00:30:38.320 --> 00:30:42.340 align:middle line:84%
under biaxial compression in the
X and Y planes being compressed,

00:30:42.340 --> 00:30:44.170 align:middle line:84%
strain the silicon
germanium on silicon,

00:30:44.170 --> 00:30:46.280 align:middle line:84%
the band lineup looks
like this, as I mentioned.

00:30:46.280 --> 00:30:49.230 align:middle line:84%
Most of the band offset
is in the valence band.

00:30:49.230 --> 00:30:51.620 align:middle line:84%
So the holes will tend to
be confined in the silicon

00:30:51.620 --> 00:30:53.150 align:middle line:90%
germanium.

00:30:53.150 --> 00:30:55.220 align:middle line:90%
There's very little band offset.

00:30:55.220 --> 00:30:57.350 align:middle line:84%
The lowest energy
conduction band

00:30:57.350 --> 00:30:59.270 align:middle line:84%
is about aligned
in strained silicon

00:30:59.270 --> 00:31:01.820 align:middle line:90%
germanium versus cubic silicon.

00:31:01.820 --> 00:31:04.710 align:middle line:84%
So there's not much opportunity
for confining electrons.

00:31:04.710 --> 00:31:06.620 align:middle line:84%
So this material,
it turns out, is

00:31:06.620 --> 00:31:09.447 align:middle line:84%
ideal for a heterojunction
bipolar transistor for an NPN.

00:31:09.447 --> 00:31:11.780 align:middle line:84%
This material has been in
production for about 10 years.

00:31:11.780 --> 00:31:16.450 align:middle line:84%
People use it in high
speed RF devices.

00:31:16.450 --> 00:31:18.810 align:middle line:84%
So that's kind of a more
well-characterized and

00:31:18.810 --> 00:31:21.150 align:middle line:84%
well-known structure
where the germanium

00:31:21.150 --> 00:31:24.540 align:middle line:84%
fraction in a typical HBT you
would buy off the shelf right

00:31:24.540 --> 00:31:28.470 align:middle line:84%
now is probably about between
10% and 20% of the atoms

00:31:28.470 --> 00:31:31.650 align:middle line:90%
would be germanium in an HBT.

00:31:31.650 --> 00:31:34.180 align:middle line:84%
On the other hand, if you
grow the opposite structure,

00:31:34.180 --> 00:31:36.990 align:middle line:84%
so you have relaxed silicon
germanium substrate and you grow

00:31:36.990 --> 00:31:38.100 align:middle line:84%
a thin layer of
silicon-- remember,

00:31:38.100 --> 00:31:39.540 align:middle line:84%
we said this was
biaxial tension--

00:31:39.540 --> 00:31:41.500 align:middle line:84%
the band line up
is quite different.

00:31:41.500 --> 00:31:45.120 align:middle line:84%
In fact, you do get a sizable
difference in the conduction

00:31:45.120 --> 00:31:47.590 align:middle line:90%
band position.

00:31:47.590 --> 00:31:49.960 align:middle line:84%
And in fact, the
conduction band is lower.

00:31:49.960 --> 00:31:51.210 align:middle line:90%
The energy is lower in strain.

00:31:51.210 --> 00:31:54.700 align:middle line:84%
So the electrons will tend to go
into the strained silicon layer.

00:31:54.700 --> 00:31:57.275 align:middle line:84%
So if you make a FET, and you
make this as your channel,

00:31:57.275 --> 00:31:59.400 align:middle line:84%
the electrons want to go
into the strained silicon.

00:31:59.400 --> 00:32:02.657 align:middle line:84%
The holes want to be in
the silicon germanium side.

00:32:02.657 --> 00:32:04.740 align:middle line:84%
So this is what's called
a type II band alignment.

00:32:04.740 --> 00:32:06.990 align:middle line:84%
So you can make lots
of interesting devices

00:32:06.990 --> 00:32:09.870 align:middle line:84%
just by taking silicon
and straining it

00:32:09.870 --> 00:32:11.430 align:middle line:90%
on unrelaxed silicon germanium.

00:32:11.430 --> 00:32:14.090 align:middle line:90%


00:32:14.090 --> 00:32:17.025 align:middle line:84%
The other thing that happens
here that's important,

00:32:17.025 --> 00:32:18.400 align:middle line:84%
and we'll talk
about when we talk

00:32:18.400 --> 00:32:20.710 align:middle line:84%
about the mobility enhancement,
you notice what's happened

00:32:20.710 --> 00:32:23.085 align:middle line:84%
is the conduction band is
actually split into two levels.

00:32:23.085 --> 00:32:25.690 align:middle line:84%
Originally, there was only
a single energy level.

00:32:25.690 --> 00:32:28.240 align:middle line:84%
And that splitting is
what's really responsible,

00:32:28.240 --> 00:32:32.042 align:middle line:84%
to a large extent, for
the mobility improvement.

00:32:32.042 --> 00:32:33.750 align:middle line:84%
If you really wanted
to get nitty gritty,

00:32:33.750 --> 00:32:34.667 align:middle line:90%
I won't go through it.

00:32:34.667 --> 00:32:38.220 align:middle line:84%
But here on page 11, I've made
a reference to a famous paper

00:32:38.220 --> 00:32:41.250 align:middle line:84%
by Chris Van de Walle and
Richard Martin published

00:32:41.250 --> 00:32:42.780 align:middle line:90%
in the mid 1980s.

00:32:42.780 --> 00:32:45.810 align:middle line:84%
Van de Walle and Martin
actually theoretically did

00:32:45.810 --> 00:32:50.250 align:middle line:84%
a pretty good job of trying to
calculate what the energy band

00:32:50.250 --> 00:32:52.920 align:middle line:84%
structure looks like
for strained silicon

00:32:52.920 --> 00:32:55.500 align:middle line:84%
germanium on cubic silicon,
which we're showing over

00:32:55.500 --> 00:32:58.830 align:middle line:84%
here and also for
strained silicon germanium

00:32:58.830 --> 00:33:00.200 align:middle line:90%
on cubic germanium.

00:33:00.200 --> 00:33:01.200 align:middle line:90%
They have both of these.

00:33:01.200 --> 00:33:03.970 align:middle line:84%
And I won't go through
it in any great detail.

00:33:03.970 --> 00:33:06.270 align:middle line:84%
But if you're interested
in the solid state physics

00:33:06.270 --> 00:33:07.930 align:middle line:84%
and you end up
working in this area,

00:33:07.930 --> 00:33:10.330 align:middle line:84%
this is a good paper
for you to look at.

00:33:10.330 --> 00:33:13.560 align:middle line:84%
Again, the band gap
would be the distance

00:33:13.560 --> 00:33:15.540 align:middle line:84%
between this point here
in the conduction band

00:33:15.540 --> 00:33:17.260 align:middle line:84%
and a point here in
the valence band.

00:33:17.260 --> 00:33:19.677 align:middle line:84%
So they actually calculated
how the valence and conduction

00:33:19.677 --> 00:33:23.445 align:middle line:84%
bands move as you add strain
and germanium to the system.

00:33:23.445 --> 00:33:26.040 align:middle line:90%


00:33:26.040 --> 00:33:31.083 align:middle line:84%
On slide 12, I'm also giving
you a reference for not only has

00:33:31.083 --> 00:33:33.000 align:middle line:84%
the band gap changes,
but people have actually

00:33:33.000 --> 00:33:36.330 align:middle line:84%
made some reference some
measurements of the energy band

00:33:36.330 --> 00:33:39.180 align:middle line:84%
offsets when you have strained
silicon on relaxed silicon

00:33:39.180 --> 00:33:41.650 align:middle line:90%
germanium say for a MOSFET.

00:33:41.650 --> 00:33:44.540 align:middle line:84%
This is taken out of Jeff
Welzer's thesis from 1994.

00:33:44.540 --> 00:33:46.960 align:middle line:84%
And what you can see here,
this is the basic structure.

00:33:46.960 --> 00:33:48.580 align:middle line:90%
You have an oxide.

00:33:48.580 --> 00:33:50.530 align:middle line:84%
You have a thin layer
of strained silicon.

00:33:50.530 --> 00:33:52.180 align:middle line:84%
And you have these
energy offsets here.

00:33:52.180 --> 00:33:54.400 align:middle line:84%
The energy conduction band
energy is a little lower.

00:33:54.400 --> 00:33:56.600 align:middle line:84%
And the valence band
energy is slightly

00:33:56.600 --> 00:33:57.850 align:middle line:90%
different in strained silicon.

00:33:57.850 --> 00:34:00.520 align:middle line:84%
And these numbers, delta, you
see how different they are,

00:34:00.520 --> 00:34:02.380 align:middle line:84%
these energy band
discontinuities

00:34:02.380 --> 00:34:04.450 align:middle line:84%
were actually measured
and delta EV here

00:34:04.450 --> 00:34:08.264 align:middle line:84%
as a function of the germanium
fraction in the substrate.

00:34:08.264 --> 00:34:09.639 align:middle line:84%
The bullets are
the measurements.

00:34:09.639 --> 00:34:12.370 align:middle line:84%
And the lines are
the calculations

00:34:12.370 --> 00:34:13.780 align:middle line:90%
from Van de Wall and Martin.

00:34:13.780 --> 00:34:15.530 align:middle line:84%
And indeed, you get
pretty good agreement.

00:34:15.530 --> 00:34:18.040 align:middle line:84%
So we have a rough idea now
of what these energy band

00:34:18.040 --> 00:34:20.155 align:middle line:84%
structures look like
when I add strain

00:34:20.155 --> 00:34:24.650 align:middle line:84%
or when I add silicon
germanium to the substrate.

00:34:24.650 --> 00:34:27.325 align:middle line:84%
So that's important for figuring
out how all these devices work.

00:34:27.325 --> 00:34:29.980 align:middle line:90%


00:34:29.980 --> 00:34:32.530 align:middle line:84%
I mentioned that when
you squeeze silicone,

00:34:32.530 --> 00:34:36.070 align:middle line:84%
either you stretch it
in a biaxial sense,

00:34:36.070 --> 00:34:37.330 align:middle line:90%
you can improve the mobility.

00:34:37.330 --> 00:34:39.262 align:middle line:84%
And the question is,
well, why is that?

00:34:39.262 --> 00:34:41.679 align:middle line:84%
I don't want to go into detail
in the solid state physics.

00:34:41.679 --> 00:34:44.860 align:middle line:84%
But it turns out, if you put
silicon in biaxial tension,

00:34:44.860 --> 00:34:48.310 align:middle line:84%
you break the cubic
symmetry of the lattice.

00:34:48.310 --> 00:34:51.550 align:middle line:84%
Ordinarily, in the
lattice, the XYZ directions

00:34:51.550 --> 00:34:54.550 align:middle line:84%
are all completely symmetric
when silicon is not strained.

00:34:54.550 --> 00:34:57.640 align:middle line:84%
When it strained, they
actually become asymmetric.

00:34:57.640 --> 00:35:00.850 align:middle line:84%
X and Y lattice parameter
is larger than in the Z.

00:35:00.850 --> 00:35:02.770 align:middle line:84%
And what happens
by that breaking

00:35:02.770 --> 00:35:09.370 align:middle line:84%
of the physical symmetry is that
the sixth energy of ellipsoids

00:35:09.370 --> 00:35:12.190 align:middle line:84%
in constant energy space that
are all at the same energy

00:35:12.190 --> 00:35:15.050 align:middle line:84%
actually split up when
you introduce a strain.

00:35:15.050 --> 00:35:17.420 align:middle line:84%
And two of them, these
two ellipsoids here

00:35:17.420 --> 00:35:20.840 align:middle line:84%
where the electrons can
be, these two red ones,

00:35:20.840 --> 00:35:22.340 align:middle line:84%
the so-called
perpendicular valleys

00:35:22.340 --> 00:35:25.490 align:middle line:84%
labeled Del 2, they actually
end up being at a lower energy

00:35:25.490 --> 00:35:27.080 align:middle line:90%
than these other four.

00:35:27.080 --> 00:35:31.460 align:middle line:84%
So we get this strain-induced
splitting in bulk silicon.

00:35:31.460 --> 00:35:34.548 align:middle line:84%
All six of these
valleys that represent

00:35:34.548 --> 00:35:36.590 align:middle line:84%
states that electrons can
occupy, all six of them

00:35:36.590 --> 00:35:37.730 align:middle line:90%
are at the same energy level.

00:35:37.730 --> 00:35:39.730 align:middle line:84%
But by group theory, when
we break the symmetry,

00:35:39.730 --> 00:35:44.252 align:middle line:84%
we break that up into a two-fold
degenerate level, which is lower

00:35:44.252 --> 00:35:45.960 align:middle line:84%
energy, and a four-fold
degenerate level.

00:35:45.960 --> 00:35:49.220 align:middle line:84%
So by breaking this up,
actually, what happens is now,

00:35:49.220 --> 00:35:52.250 align:middle line:84%
most of the electrons want
to be in these red valleys.

00:35:52.250 --> 00:35:54.470 align:middle line:84%
And the scattering between
the red and the green

00:35:54.470 --> 00:35:56.460 align:middle line:84%
is suppressed because
it costs you energy.

00:35:56.460 --> 00:35:58.820 align:middle line:84%
So instead of scattering
between all six,

00:35:58.820 --> 00:36:01.010 align:middle line:84%
you can only scatter
very effectively

00:36:01.010 --> 00:36:02.310 align:middle line:90%
between these two red ones.

00:36:02.310 --> 00:36:04.622 align:middle line:84%
And so the scattering
time goes up.

00:36:04.622 --> 00:36:07.080 align:middle line:84%
And the mobility is directly
proportional to the scattering

00:36:07.080 --> 00:36:08.070 align:middle line:90%
time.

00:36:08.070 --> 00:36:11.355 align:middle line:84%
The in-plane effective
mass also goes down.

00:36:11.355 --> 00:36:13.230 align:middle line:84%
So the mobility also
goes up for that reason.

00:36:13.230 --> 00:36:15.330 align:middle line:84%
So just by breaking
the symmetry,

00:36:15.330 --> 00:36:18.630 align:middle line:84%
we can change the occupation
of the energy bands in silicon.

00:36:18.630 --> 00:36:21.783 align:middle line:84%
And we can make the mobility
higher for electrons.

00:36:21.783 --> 00:36:23.200 align:middle line:84%
In the valence
band, I'm not going

00:36:23.200 --> 00:36:24.450 align:middle line:90%
to go through in great detail.

00:36:24.450 --> 00:36:26.070 align:middle line:84%
But it's quite a bit
more complicated.

00:36:26.070 --> 00:36:29.100 align:middle line:84%
But it turns out, with strain,
we also split the degeneracy

00:36:29.100 --> 00:36:30.310 align:middle line:90%
in the valence band.

00:36:30.310 --> 00:36:32.130 align:middle line:84%
We also suppress
interband scattering.

00:36:32.130 --> 00:36:33.210 align:middle line:90%
It is a lot more tricky.

00:36:33.210 --> 00:36:39.060 align:middle line:84%
But it is possible to also
induce improved hole mobility

00:36:39.060 --> 00:36:43.860 align:middle line:84%
or PMOS mobility by
introducing strain.

00:36:43.860 --> 00:36:45.542 align:middle line:84%
And in fact, here
on slide 14, I'll

00:36:45.542 --> 00:36:47.250 align:middle line:84%
just walk through some
of the older data.

00:36:47.250 --> 00:36:49.740 align:middle line:90%
This was from 1992 by Welzer.

00:36:49.740 --> 00:36:51.510 align:middle line:84%
These were the first
strain of MOSFETs

00:36:51.510 --> 00:36:54.090 align:middle line:84%
that were fabricated
where he made

00:36:54.090 --> 00:36:56.920 align:middle line:84%
a thin layer of strained silicon
on relaxed silicon germanium

00:36:56.920 --> 00:36:59.640 align:middle line:84%
and then just implanted
it and made a silicon

00:36:59.640 --> 00:37:01.500 align:middle line:90%
MOSFET with a source and drain.

00:37:01.500 --> 00:37:02.250 align:middle line:90%
It was an nMOSFET.

00:37:02.250 --> 00:37:04.560 align:middle line:84%
And this, he called
the surface channel

00:37:04.560 --> 00:37:07.475 align:middle line:84%
MOSFET because the bands aligned
so that the electrons wanted

00:37:07.475 --> 00:37:08.350 align:middle line:90%
to be at the surface.

00:37:08.350 --> 00:37:10.320 align:middle line:84%
So the channel is
at the surface.

00:37:10.320 --> 00:37:11.700 align:middle line:84%
This he called
the buried channel

00:37:11.700 --> 00:37:15.030 align:middle line:84%
MOSFET because if you look at
the energy band diagram here,

00:37:15.030 --> 00:37:17.160 align:middle line:84%
there's a little bit of
silicon germanium on top.

00:37:17.160 --> 00:37:20.070 align:middle line:84%
And that confines the electrons
to be a little bit buried

00:37:20.070 --> 00:37:21.400 align:middle line:90%
below the surface.

00:37:21.400 --> 00:37:25.520 align:middle line:84%
It's like a MOSFET but where
the channel is slightly buried.

00:37:25.520 --> 00:37:27.808 align:middle line:84%
And on slide 15, he
actually measured

00:37:27.808 --> 00:37:28.850 align:middle line:90%
some of those mobilities.

00:37:28.850 --> 00:37:30.558 align:middle line:84%
These were the first
mobilities measured.

00:37:30.558 --> 00:37:32.420 align:middle line:84%
And if you look at
this solid line,

00:37:32.420 --> 00:37:36.140 align:middle line:84%
this is the mobility measured
in a MOSFET that had no strain.

00:37:36.140 --> 00:37:38.870 align:middle line:84%
And for a surface channel
MOSFET, the mobility

00:37:38.870 --> 00:37:41.270 align:middle line:84%
that he measured
was about, oh, I

00:37:41.270 --> 00:37:44.510 align:middle line:84%
don't know, 80% higher, about
a factor of 1.8 improvement

00:37:44.510 --> 00:37:45.560 align:middle line:90%
in the surface channel.

00:37:45.560 --> 00:37:48.110 align:middle line:84%
So right off the bat, as a
function of vertical field,

00:37:48.110 --> 00:37:49.880 align:middle line:90%
you see we have parameter.

00:37:49.880 --> 00:37:52.945 align:middle line:84%
By changing the strain, you can
up the mobility by about 80%.

00:37:52.945 --> 00:37:54.320 align:middle line:84%
If you do the
buried channel, you

00:37:54.320 --> 00:37:57.530 align:middle line:84%
can get even higher
mobilities at low gate bias.

00:37:57.530 --> 00:37:59.780 align:middle line:84%
But the mobility
seems to go down

00:37:59.780 --> 00:38:02.760 align:middle line:84%
at high gate bias
for various reasons.

00:38:02.760 --> 00:38:04.970 align:middle line:84%
So kind of the first
evidence that strain

00:38:04.970 --> 00:38:07.113 align:middle line:90%
makes a big difference.

00:38:07.113 --> 00:38:08.780 align:middle line:84%
These are the actual
structures that one

00:38:08.780 --> 00:38:12.170 align:middle line:90%
can grow shown on slide 16.

00:38:12.170 --> 00:38:15.540 align:middle line:84%
Again to make an nMOSFET,
you can grow relaxed silicate

00:38:15.540 --> 00:38:17.540 align:middle line:84%
germanium with a thin
layer of strained silicon.

00:38:17.540 --> 00:38:19.970 align:middle line:84%
And this becomes a high
electron mobility channel.

00:38:19.970 --> 00:38:21.350 align:middle line:84%
This slightly
different structure

00:38:21.350 --> 00:38:23.930 align:middle line:84%
is needed for the
PMOS, very similar

00:38:23.930 --> 00:38:26.480 align:middle line:84%
but with slight
variations, so you

00:38:26.480 --> 00:38:31.890 align:middle line:84%
can make CMOS devices using
this type of technique.

00:38:31.890 --> 00:38:36.640 align:middle line:84%
And I'll skip through the
energy band diagrams for now.

00:38:36.640 --> 00:38:38.295 align:middle line:90%
Slide 17 shows some metrology.

00:38:38.295 --> 00:38:39.920 align:middle line:84%
The question you may
be thinking, well,

00:38:39.920 --> 00:38:41.200 align:middle line:90%
how do you really know?

00:38:41.200 --> 00:38:42.575 align:middle line:84%
All right, your
mobility went up.

00:38:42.575 --> 00:38:44.920 align:middle line:84%
But how do you really know
that the layers are strained?

00:38:44.920 --> 00:38:46.420 align:middle line:84%
Especially when
they're so thin, how

00:38:46.420 --> 00:38:49.210 align:middle line:84%
do you measure strain in a layer
that's only 100 angstroms thick?

00:38:49.210 --> 00:38:51.340 align:middle line:84%
You really can't use
X-ray diffraction.

00:38:51.340 --> 00:38:53.620 align:middle line:84%
X-ray diffraction on
100 angstrom layer

00:38:53.620 --> 00:38:55.870 align:middle line:84%
could be really tough because
the layer is very thin.

00:38:55.870 --> 00:38:59.230 align:middle line:84%
So how do you measure that
change in the lattice parameter?

00:38:59.230 --> 00:39:01.210 align:middle line:84%
Well, it turns out
there's a technique called

00:39:01.210 --> 00:39:04.150 align:middle line:84%
Raman scattering, which
is an optical interaction.

00:39:04.150 --> 00:39:05.770 align:middle line:84%
There are certain
vibrational modes

00:39:05.770 --> 00:39:10.540 align:middle line:84%
of a lattice that will
scatter a scatter of photons.

00:39:10.540 --> 00:39:13.750 align:middle line:84%
And the Raman effect
can be used to measure

00:39:13.750 --> 00:39:16.480 align:middle line:84%
the strain or the change in
the lattice parameter, even

00:39:16.480 --> 00:39:18.020 align:middle line:90%
a very, very thin layer.

00:39:18.020 --> 00:39:22.850 align:middle line:84%
So here's an example of a MOSFET
that was made, a Raman spectrum.

00:39:22.850 --> 00:39:25.840 align:middle line:84%
So you're measuring the
intensity of the scattered light

00:39:25.840 --> 00:39:30.280 align:middle line:84%
as a function of the frequency
in inverse centimeters.

00:39:30.280 --> 00:39:34.540 align:middle line:84%
And you see a large
peak here associated

00:39:34.540 --> 00:39:37.010 align:middle line:90%
with relaxed silicon germanium.

00:39:37.010 --> 00:39:39.440 align:middle line:84%
And there's a small
peak here, which

00:39:39.440 --> 00:39:41.780 align:middle line:84%
is the thin strained
silicon layer.

00:39:41.780 --> 00:39:44.540 align:middle line:84%
Now, if that layer
were unstrained,

00:39:44.540 --> 00:39:47.000 align:middle line:84%
bulk silicon, if you just
take a wafer of bulk silicon

00:39:47.000 --> 00:39:48.560 align:middle line:84%
and subject to Raman
scattering, you

00:39:48.560 --> 00:39:51.450 align:middle line:84%
get a line at 521
inverse centimeters.

00:39:51.450 --> 00:39:54.950 align:middle line:84%
So it turns out the shift
of the strained silicon

00:39:54.950 --> 00:39:59.030 align:middle line:84%
peak, the shift between that
peak and 521 is a measure

00:39:59.030 --> 00:40:00.540 align:middle line:90%
of the amount of strain.

00:40:00.540 --> 00:40:04.130 align:middle line:84%
So this is a very nice way
you can oxidize a wafer,

00:40:04.130 --> 00:40:06.032 align:middle line:84%
strip the oxide of
strained silicon.

00:40:06.032 --> 00:40:07.740 align:middle line:84%
You can see if the
strain is still there.

00:40:07.740 --> 00:40:11.630 align:middle line:84%
In fact, you can figure out
the relaxed silicon germanium

00:40:11.630 --> 00:40:14.070 align:middle line:90%
content as well using this.

00:40:14.070 --> 00:40:17.160 align:middle line:84%
So slide 18 just shows
you some measurements

00:40:17.160 --> 00:40:22.510 align:middle line:84%
that people have made, the Raman
peak shift and the frequency

00:40:22.510 --> 00:40:24.670 align:middle line:84%
shift in inverse
centimeter as a function

00:40:24.670 --> 00:40:27.280 align:middle line:84%
of the amount of germanium
fraction of the substrate.

00:40:27.280 --> 00:40:28.780 align:middle line:84%
For strained silicon
layers, you can

00:40:28.780 --> 00:40:31.780 align:middle line:84%
see there's a
theoretical line here.

00:40:31.780 --> 00:40:35.080 align:middle line:84%
And the bullets represent
measured points.

00:40:35.080 --> 00:40:40.180 align:middle line:84%
So using Raman, if you have
the right kind of Raman setup,

00:40:40.180 --> 00:40:42.080 align:middle line:84%
you can actually
get a peak shift.

00:40:42.080 --> 00:40:44.890 align:middle line:84%
So for 20% germanium here,
we expect a Raman peak shift

00:40:44.890 --> 00:40:49.310 align:middle line:84%
of about 6 to 7
inverse centimeters.

00:40:49.310 --> 00:40:52.630 align:middle line:84%
So that gives you an idea
of how you can measure

00:40:52.630 --> 00:40:56.250 align:middle line:90%
the strain in the material.

00:40:56.250 --> 00:40:59.070 align:middle line:84%
Slide 19 shows you a material
that's been oxidized.

00:40:59.070 --> 00:41:01.020 align:middle line:90%
You might be thinking, OK, fine.

00:41:01.020 --> 00:41:02.850 align:middle line:84%
You can grow these
epitaxial layers.

00:41:02.850 --> 00:41:03.870 align:middle line:90%
They'll be strained.

00:41:03.870 --> 00:41:06.240 align:middle line:84%
What happens if you
oxidize the silicon?

00:41:06.240 --> 00:41:08.970 align:middle line:84%
Is it going to somehow relax the
strain because of that oxidation

00:41:08.970 --> 00:41:11.740 align:middle line:84%
process and the breaking
the bonds and the oxidation?

00:41:11.740 --> 00:41:13.020 align:middle line:90%
Well, it turns out it doesn't.

00:41:13.020 --> 00:41:16.230 align:middle line:84%
In fact, the as-grown
Raman spectrum

00:41:16.230 --> 00:41:20.160 align:middle line:84%
here, this is for the epitaxial
layer as it was first grown,

00:41:20.160 --> 00:41:24.060 align:middle line:84%
you do get a strained silicon
peak right here near to 510.

00:41:24.060 --> 00:41:26.910 align:middle line:84%
If you oxidize it at
850 for 10 minutes,

00:41:26.910 --> 00:41:28.860 align:middle line:84%
you still get that
strained silicon peak in.

00:41:28.860 --> 00:41:31.097 align:middle line:84%
Although, the peak is
smaller height because,

00:41:31.097 --> 00:41:32.430 align:middle line:90%
of course, the layer is thinner.

00:41:32.430 --> 00:41:34.830 align:middle line:84%
When you oxidize,
you consume silicon.

00:41:34.830 --> 00:41:37.095 align:middle line:84%
But the peak position,
it remains at 510.

00:41:37.095 --> 00:41:38.580 align:middle line:90%
It remains at the same point.

00:41:38.580 --> 00:41:40.943 align:middle line:84%
And this has been
verified very many times.

00:41:40.943 --> 00:41:42.360 align:middle line:84%
And, of course,
in the MOSFET, you

00:41:42.360 --> 00:41:43.568 align:middle line:90%
do see the enhanced mobility.

00:41:43.568 --> 00:41:46.500 align:middle line:84%
So there doesn't seem to be any
significant strain relaxation,

00:41:46.500 --> 00:41:49.380 align:middle line:84%
at least when you oxidize in
these type of temperatures.

00:41:49.380 --> 00:41:51.722 align:middle line:84%
If you were to go
up to 1,000 or more,

00:41:51.722 --> 00:41:53.430 align:middle line:84%
then you could start
running into trouble

00:41:53.430 --> 00:41:55.635 align:middle line:84%
when the germanium
starts diffusing around.

00:41:55.635 --> 00:41:58.480 align:middle line:90%


00:41:58.480 --> 00:42:01.323 align:middle line:84%
So on slide 20, I'm
just reviewing for you,

00:42:01.323 --> 00:42:03.490 align:middle line:84%
giving you an idea of some
of the early measurements

00:42:03.490 --> 00:42:05.740 align:middle line:84%
people made of how the
mobility was enhanced.

00:42:05.740 --> 00:42:08.500 align:middle line:84%
And the left side
is for nMOSFETs.

00:42:08.500 --> 00:42:11.650 align:middle line:84%
And you see this black
line, this dashed line

00:42:11.650 --> 00:42:13.240 align:middle line:90%
is for control devices.

00:42:13.240 --> 00:42:17.200 align:middle line:84%
And these other lines on
top are for 10% germanium

00:42:17.200 --> 00:42:18.700 align:middle line:90%
in the substrate, 20 and 30.

00:42:18.700 --> 00:42:20.530 align:middle line:84%
You see, as you
add more germanium

00:42:20.530 --> 00:42:23.110 align:middle line:84%
in the substrate, the whole
of the electron mobility

00:42:23.110 --> 00:42:24.460 align:middle line:90%
curve all moves up.

00:42:24.460 --> 00:42:28.030 align:middle line:90%
And you get a nice enhancement.

00:42:28.030 --> 00:42:32.650 align:middle line:84%
On holes, for PMOS vets,
there was some enhancement

00:42:32.650 --> 00:42:34.870 align:middle line:84%
measured, although the
enhancement is diminished.

00:42:34.870 --> 00:42:36.850 align:middle line:84%
You see the enhancement
factor is actually

00:42:36.850 --> 00:42:39.340 align:middle line:84%
going down as you go to
higher vertical fields here.

00:42:39.340 --> 00:42:43.890 align:middle line:84%
So at higher vertical fields is
where a lot of modern MOSFETs

00:42:43.890 --> 00:42:44.390 align:middle line:90%
operate.

00:42:44.390 --> 00:42:47.350 align:middle line:84%
So that's a bit of
an issue for pMOSFETs

00:42:47.350 --> 00:42:50.080 align:middle line:90%
for using this technique.

00:42:50.080 --> 00:42:51.760 align:middle line:90%
Those are research devices.

00:42:51.760 --> 00:42:55.660 align:middle line:84%
This on slide 21 is some
more recent publications

00:42:55.660 --> 00:42:57.592 align:middle line:84%
in a manufacturing
style process.

00:42:57.592 --> 00:42:59.050 align:middle line:84%
Although it's not
in manufacturing,

00:42:59.050 --> 00:43:02.350 align:middle line:84%
the process was a full
manufacturing style process

00:43:02.350 --> 00:43:03.280 align:middle line:90%
that IBM did.

00:43:03.280 --> 00:43:06.250 align:middle line:84%
It had all the attributes of
a real manufactured device.

00:43:06.250 --> 00:43:08.170 align:middle line:90%
It had shallow trench isolation.

00:43:08.170 --> 00:43:12.340 align:middle line:84%
Had it had weld
implants, halo implants,

00:43:12.340 --> 00:43:15.520 align:middle line:84%
raised source drains by
EPI, and a thin gate oxide.

00:43:15.520 --> 00:43:19.030 align:middle line:84%
So this is a real device as
opposed to the university style.

00:43:19.030 --> 00:43:20.740 align:middle line:84%
And again, you can
see the mobility

00:43:20.740 --> 00:43:24.550 align:middle line:84%
for electrons goes up with
strain, about 100% improvement.

00:43:24.550 --> 00:43:25.910 align:middle line:90%
That is a factor of 2.

00:43:25.910 --> 00:43:28.970 align:middle line:84%
Holes, there is an
improvement at low gate bias.

00:43:28.970 --> 00:43:31.550 align:middle line:84%
But here at high effective
field or high gate bias,

00:43:31.550 --> 00:43:35.360 align:middle line:84%
the improvement is pretty
small, only a few percent.

00:43:35.360 --> 00:43:37.760 align:middle line:84%
That just shows the
state of the art

00:43:37.760 --> 00:43:41.880 align:middle line:84%
as it exists a
couple of years ago.

00:43:41.880 --> 00:43:44.450 align:middle line:84%
And if you were working at
relatively low gate bias,

00:43:44.450 --> 00:43:47.240 align:middle line:84%
and you just want to get an idea
of how the mobility enhancement

00:43:47.240 --> 00:43:48.650 align:middle line:84%
varies with the
amount of strain,

00:43:48.650 --> 00:43:51.260 align:middle line:84%
you can look at this
curve on page 22.

00:43:51.260 --> 00:43:54.330 align:middle line:84%
This is the electron
mobility enhancement factor.

00:43:54.330 --> 00:43:56.720 align:middle line:84%
So it's the peak mobility
in a strained silicon

00:43:56.720 --> 00:43:59.240 align:middle line:84%
FET divided the peak mobility
in an unstrained FET.

00:43:59.240 --> 00:44:01.940 align:middle line:84%
And you see here with
no strain, that it's 1.

00:44:01.940 --> 00:44:04.700 align:middle line:84%
And then it goes up to
about a factor of 1.8,

00:44:04.700 --> 00:44:05.908 align:middle line:90%
maybe 2, something like that.

00:44:05.908 --> 00:44:07.617 align:middle line:84%
There's a lot of data
have been published

00:44:07.617 --> 00:44:08.990 align:middle line:90%
in the last 10 or 12 years.

00:44:08.990 --> 00:44:12.790 align:middle line:84%
And they all seem to agree
about this saturating behavior.

00:44:12.790 --> 00:44:15.160 align:middle line:84%
On the right is for
loss for hole mobility.

00:44:15.160 --> 00:44:17.890 align:middle line:84%
The data does show an
increase, especially as you

00:44:17.890 --> 00:44:20.020 align:middle line:90%
get above about 30% germanium.

00:44:20.020 --> 00:44:22.450 align:middle line:84%
You can get larger
enhancement factors.

00:44:22.450 --> 00:44:24.108 align:middle line:84%
And this is the
theoretical curve.

00:44:24.108 --> 00:44:26.650 align:middle line:84%
The data seems to be a little
bit below the theoretical curve

00:44:26.650 --> 00:44:29.710 align:middle line:84%
but shows roughly the
kind of strain dependence

00:44:29.710 --> 00:44:30.950 align:middle line:90%
you would expect.

00:44:30.950 --> 00:44:33.435 align:middle line:84%
And so what this is telling
you, if you're saturating out,

00:44:33.435 --> 00:44:34.810 align:middle line:84%
you don't really
need to put more

00:44:34.810 --> 00:44:37.450 align:middle line:84%
for electrons, more than about
20% germanium in the substrate.

00:44:37.450 --> 00:44:38.600 align:middle line:90%
That's enough strain.

00:44:38.600 --> 00:44:40.660 align:middle line:84%
So the bands are split
enough, if you go beyond

00:44:40.660 --> 00:44:43.355 align:middle line:84%
that, you're inducing more
strain and more splitting.

00:44:43.355 --> 00:44:44.980 align:middle line:84%
But the mobility
itself is not actually

00:44:44.980 --> 00:44:47.813 align:middle line:84%
improving because something
else is limiting the mobility.

00:44:47.813 --> 00:44:50.230 align:middle line:84%
But it gives you a rough idea
of the amount of strain need

00:44:50.230 --> 00:44:54.540 align:middle line:84%
to induce in some
of these devices.

00:44:54.540 --> 00:44:59.250 align:middle line:84%
Page 23 is a summary of some of
the mobility enhancements now

00:44:59.250 --> 00:45:01.590 align:middle line:90%
for pMOSFETs.

00:45:01.590 --> 00:45:03.312 align:middle line:84%
It's the mobility
enhancement ratio.

00:45:03.312 --> 00:45:04.770 align:middle line:84%
Again, this is the
number you would

00:45:04.770 --> 00:45:07.230 align:middle line:84%
like to be large as a
function of vertical field.

00:45:07.230 --> 00:45:09.510 align:middle line:84%
If you operate the device
at very low vertical fields,

00:45:09.510 --> 00:45:11.100 align:middle line:90%
you can get large ratios.

00:45:11.100 --> 00:45:13.510 align:middle line:84%
But most modern devices
operate over here.

00:45:13.510 --> 00:45:16.770 align:middle line:84%
So the enhancement factor
is only about 1.1 or 1.2.

00:45:16.770 --> 00:45:18.600 align:middle line:90%
It's approaching 1.

00:45:18.600 --> 00:45:22.200 align:middle line:84%
That's a problem, unless you go
to very high germanium contents.

00:45:22.200 --> 00:45:25.890 align:middle line:84%
There's some data here
with a 40% substrate.

00:45:25.890 --> 00:45:28.410 align:middle line:84%
So that means the strained
silicon layer is very thin,

00:45:28.410 --> 00:45:30.270 align:middle line:84%
and it's strained
to a 40% substrate.

00:45:30.270 --> 00:45:32.080 align:middle line:84%
Here, in mobility
enhancement factor,

00:45:32.080 --> 00:45:33.570 align:middle line:84%
there's not a full
curve available.

00:45:33.570 --> 00:45:37.710 align:middle line:84%
The highest field is people
went to was about 0.6.

00:45:37.710 --> 00:45:40.060 align:middle line:84%
But they did get pretty
large enhancement factors.

00:45:40.060 --> 00:45:43.980 align:middle line:84%
So it looks like if you're
going to use biaxial tensile

00:45:43.980 --> 00:45:45.600 align:middle line:84%
strain in the silicon,
you need to go

00:45:45.600 --> 00:45:49.270 align:middle line:84%
to very high levels of strain
if you want this to work.

00:45:49.270 --> 00:45:52.350 align:middle line:84%
So that's one big
disadvantage for the pMOSFET

00:45:52.350 --> 00:45:53.580 align:middle line:90%
in this technology.

00:45:53.580 --> 00:45:56.350 align:middle line:90%


00:45:56.350 --> 00:46:01.390 align:middle line:84%
Oh, just another graph on
page 24 to give you an idea.

00:46:01.390 --> 00:46:03.130 align:middle line:90%
We talked about mobility.

00:46:03.130 --> 00:46:08.410 align:middle line:84%
How about things that you care
about electron velocity or GM

00:46:08.410 --> 00:46:10.840 align:middle line:84%
that a lot of circuit
designers are worried about?

00:46:10.840 --> 00:46:12.340 align:middle line:90%
Well, indeed, that does improve.

00:46:12.340 --> 00:46:16.540 align:middle line:84%
And even as you scale devices,
this is data back from 1998 now.

00:46:16.540 --> 00:46:17.290 align:middle line:90%
It's fairly old.

00:46:17.290 --> 00:46:21.100 align:middle line:84%
But it still gives you an
idea of if you look at the GM

00:46:21.100 --> 00:46:25.060 align:middle line:84%
here for an unstrained device
shown in red, as you scale,

00:46:25.060 --> 00:46:26.270 align:middle line:90%
it goes up like this.

00:46:26.270 --> 00:46:29.950 align:middle line:84%
For a strain nMOSFET
shown in blue, it goes up.

00:46:29.950 --> 00:46:33.730 align:middle line:84%
And this enhancement factor
or the ratio between these two

00:46:33.730 --> 00:46:35.950 align:middle line:90%
lines stays about constant.

00:46:35.950 --> 00:46:40.943 align:middle line:84%
In this plot all the way down
to about 90 nanometers or so

00:46:40.943 --> 00:46:42.610 align:middle line:84%
was the shortest
devices that were made,

00:46:42.610 --> 00:46:44.140 align:middle line:90%
just around 100 nanometers.

00:46:44.140 --> 00:46:46.632 align:middle line:84%
Since that time, shorter
devices have been made.

00:46:46.632 --> 00:46:48.340 align:middle line:84%
So the nice thing is
that the enhancement

00:46:48.340 --> 00:46:50.590 align:middle line:84%
doesn't seem to go away when
you go to short channels.

00:46:50.590 --> 00:46:54.683 align:middle line:84%
So that's very important
for the technology.

00:46:54.683 --> 00:46:56.100 align:middle line:84%
So let me talk a
little bit now, I

00:46:56.100 --> 00:46:58.980 align:middle line:84%
want to spend a few minutes
on how the material is grown

00:46:58.980 --> 00:47:02.948 align:middle line:84%
and some of the issues
related to how dopants

00:47:02.948 --> 00:47:03.990 align:middle line:90%
diffuse in this material.

00:47:03.990 --> 00:47:06.660 align:middle line:90%


00:47:06.660 --> 00:47:10.980 align:middle line:84%
Slide 26 just shows some typical
gas sources that are used.

00:47:10.980 --> 00:47:12.990 align:middle line:84%
A very common way
to grow this is

00:47:12.990 --> 00:47:17.520 align:middle line:84%
by low pressure CVD or
sometimes ultra high vacuum CVD,

00:47:17.520 --> 00:47:22.440 align:middle line:84%
depending on the particular
lab that's doing the work.

00:47:22.440 --> 00:47:25.590 align:middle line:84%
For epitaxial silicon germanium,
a very common silicon source

00:47:25.590 --> 00:47:27.000 align:middle line:90%
is silane.

00:47:27.000 --> 00:47:28.708 align:middle line:84%
Sometimes people
use dichlorosilane.

00:47:28.708 --> 00:47:30.750 align:middle line:84%
We've talked about dichloro
earlier in the class.

00:47:30.750 --> 00:47:32.550 align:middle line:84%
For germanium,
people use germane.

00:47:32.550 --> 00:47:33.590 align:middle line:90%
What is germane?

00:47:33.590 --> 00:47:34.590 align:middle line:90%
It's the same as silane.

00:47:34.590 --> 00:47:38.380 align:middle line:84%
But you take out the silicon,
and you put in a germanium atom.

00:47:38.380 --> 00:47:39.000 align:middle line:90%
So it's GeH4.

00:47:39.000 --> 00:47:41.520 align:middle line:90%


00:47:41.520 --> 00:47:43.530 align:middle line:84%
Hydrogen is often
used as a carrier gas,

00:47:43.530 --> 00:47:46.290 align:middle line:84%
although not in UH BCVD
but in low pressure CVD.

00:47:46.290 --> 00:47:47.700 align:middle line:90%
And these are common dopants.

00:47:47.700 --> 00:47:50.010 align:middle line:84%
Diborane and arsene
are used for P and N

00:47:50.010 --> 00:47:54.300 align:middle line:84%
type doping,
sometimes phosphine.

00:47:54.300 --> 00:47:57.360 align:middle line:84%
For silicon germanium
in a selective process,

00:47:57.360 --> 00:47:58.570 align:middle line:90%
you need to add--

00:47:58.570 --> 00:48:00.930 align:middle line:84%
so if you want to
deposit silicon germanium

00:48:00.930 --> 00:48:05.430 align:middle line:84%
on a wafer that has oxide on it
and little openings in the oxide

00:48:05.430 --> 00:48:09.450 align:middle line:84%
where there's windows that are
patterned so that you can reach

00:48:09.450 --> 00:48:12.360 align:middle line:84%
down into the silicon, this is
called selective deposition.

00:48:12.360 --> 00:48:14.940 align:middle line:84%
You need to add
hydrogen chloride, HCl.

00:48:14.940 --> 00:48:18.930 align:middle line:84%
And this is commonly done
for both the bipolar and CMOS

00:48:18.930 --> 00:48:20.670 align:middle line:90%
applications.

00:48:20.670 --> 00:48:24.150 align:middle line:84%
For silicon germanium carbon,
you do the same type of thing.

00:48:24.150 --> 00:48:26.850 align:middle line:84%
But you add one more gas,
which is called methyl silane.

00:48:26.850 --> 00:48:29.010 align:middle line:84%
And that the methyl
group, the CH3,

00:48:29.010 --> 00:48:32.190 align:middle line:84%
brings in the carbon, which
is used to dope those devices.

00:48:32.190 --> 00:48:35.380 align:middle line:90%


00:48:35.380 --> 00:48:37.000 align:middle line:84%
We talked a little
bit about strain.

00:48:37.000 --> 00:48:40.930 align:middle line:84%
And here on slide 27, I'm
showing a little bit of idea

00:48:40.930 --> 00:48:42.370 align:middle line:90%
what that means.

00:48:42.370 --> 00:48:45.370 align:middle line:84%
This ball and stick
diagram in the lower right

00:48:45.370 --> 00:48:48.430 align:middle line:84%
was our pictorial
picture in our heads.

00:48:48.430 --> 00:48:51.520 align:middle line:84%
When the EPI layer is thin,
we said the silicon germanium,

00:48:51.520 --> 00:48:54.760 align:middle line:84%
if it's thin enough, it
will compress in X and Y.

00:48:54.760 --> 00:48:56.320 align:middle line:84%
It will match the
lattice parameter

00:48:56.320 --> 00:48:58.570 align:middle line:90%
of the thick substrate.

00:48:58.570 --> 00:49:00.490 align:middle line:84%
That's only when
it's thin enough

00:49:00.490 --> 00:49:04.480 align:middle line:84%
and it's energetically
favorable to bend the bonds.

00:49:04.480 --> 00:49:06.897 align:middle line:84%
In that case, we say
it's fully strained.

00:49:06.897 --> 00:49:08.980 align:middle line:84%
If you build up more and
more layers, you build up

00:49:08.980 --> 00:49:10.820 align:middle line:84%
more and more stress,
at some point,

00:49:10.820 --> 00:49:13.070 align:middle line:84%
it becomes energetically
favorable to break bonds.

00:49:13.070 --> 00:49:16.000 align:middle line:84%
So at this interface,
bonds are actually broken.

00:49:16.000 --> 00:49:19.150 align:middle line:84%
And it's represented here
by these misfit dislocations

00:49:19.150 --> 00:49:24.860 align:middle line:84%
that are going into the
board or into the board here.

00:49:24.860 --> 00:49:27.910 align:middle line:84%
And so these misfit
dislocations end up

00:49:27.910 --> 00:49:30.733 align:middle line:84%
relieving the strain
on the thick layer.

00:49:30.733 --> 00:49:31.900 align:middle line:90%
They have a certain spacing.

00:49:31.900 --> 00:49:33.900 align:middle line:84%
And if you have enough
of them and their spacing

00:49:33.900 --> 00:49:35.750 align:middle line:84%
is tight enough, in
fact, you will end up

00:49:35.750 --> 00:49:37.170 align:middle line:90%
with a fully relaxed layer.

00:49:37.170 --> 00:49:39.170 align:middle line:84%
The silicon germanium
will have a last parameter

00:49:39.170 --> 00:49:41.550 align:middle line:90%
that it has an equilibrium.

00:49:41.550 --> 00:49:44.040 align:middle line:84%
And this is a cross-section
view in the upper right.

00:49:44.040 --> 00:49:47.700 align:middle line:84%
And this transmission electron
micrograph is a planar view.

00:49:47.700 --> 00:49:50.600 align:middle line:84%
So if you look down through
an epitaxial layer that's

00:49:50.600 --> 00:49:54.380 align:middle line:84%
been grown to be too thick,
and here is a bird's eye view.

00:49:54.380 --> 00:49:57.440 align:middle line:84%
This is a misfit dislocation
segment along the interface.

00:49:57.440 --> 00:49:59.960 align:middle line:84%
And there's a dislocation arm
that threads to the surface.

00:49:59.960 --> 00:50:03.950 align:middle line:84%
And these dark lines end
up having extra electron

00:50:03.950 --> 00:50:05.110 align:middle line:90%
diffraction contrast.

00:50:05.110 --> 00:50:08.510 align:middle line:84%
And these dark lines correspond
to misfit dislocations

00:50:08.510 --> 00:50:09.800 align:middle line:90%
at this interface.

00:50:09.800 --> 00:50:12.620 align:middle line:84%
And they run along
the easy slip planes

00:50:12.620 --> 00:50:14.480 align:middle line:84%
in silicon and
silicon germanium,

00:50:14.480 --> 00:50:16.410 align:middle line:84%
which they run along
the 110 direction,

00:50:16.410 --> 00:50:20.160 align:middle line:84%
so just typically parallel
and perpendicular to the flat.

00:50:20.160 --> 00:50:22.970 align:middle line:84%
So this film was grown to
be a little bit too thick.

00:50:22.970 --> 00:50:25.020 align:middle line:84%
And it started to
form dislocations.

00:50:25.020 --> 00:50:26.270 align:middle line:90%
It's no longer fully strained.

00:50:26.270 --> 00:50:28.850 align:middle line:90%


00:50:28.850 --> 00:50:31.100 align:middle line:84%
In fact, you may be
wondering, oh, well,

00:50:31.100 --> 00:50:33.500 align:middle line:90%
how thick is too thick?

00:50:33.500 --> 00:50:35.450 align:middle line:84%
Well, there is no one
number, unfortunately.

00:50:35.450 --> 00:50:37.430 align:middle line:84%
There for a long
time, people thought

00:50:37.430 --> 00:50:39.980 align:middle line:84%
there was a quote unquote
critical thickness so that

00:50:39.980 --> 00:50:41.730 align:middle line:84%
at a particular
germanium fraction,

00:50:41.730 --> 00:50:43.830 align:middle line:84%
when you go above
that thickness, bingo.

00:50:43.830 --> 00:50:45.080 align:middle line:90%
You get dislocations.

00:50:45.080 --> 00:50:47.620 align:middle line:90%
Doesn't quite happen that way.

00:50:47.620 --> 00:50:50.970 align:middle line:84%
In fact, there is a
whole metastable regime.

00:50:50.970 --> 00:50:52.470 align:middle line:84%
And the critical
thickness depends

00:50:52.470 --> 00:50:53.580 align:middle line:84%
on the temperature
at which you're

00:50:53.580 --> 00:50:56.220 align:middle line:84%
doing the growth because it's
a kinetically limited process.

00:50:56.220 --> 00:50:59.910 align:middle line:84%
And this is a good paper, Derek
Houghton's paper from 1991,

00:50:59.910 --> 00:51:03.692 align:middle line:84%
who describes the kinetic
model and explains the fact

00:51:03.692 --> 00:51:06.150 align:middle line:84%
that there's no one critical
thickness at a given germanium

00:51:06.150 --> 00:51:07.470 align:middle line:90%
fraction.

00:51:07.470 --> 00:51:09.150 align:middle line:84%
What he plotted
here was a summary

00:51:09.150 --> 00:51:12.960 align:middle line:84%
of the critical thickness
above which dislocations

00:51:12.960 --> 00:51:16.410 align:middle line:84%
form as a function of germanium
fraction of the silicon

00:51:16.410 --> 00:51:19.150 align:middle line:84%
germanium layer for different
growth temperatures.

00:51:19.150 --> 00:51:22.200 align:middle line:84%
So if you're growing at 900
degrees, you're very hot.

00:51:22.200 --> 00:51:24.300 align:middle line:84%
And it's very easy to
nucleate dislocations.

00:51:24.300 --> 00:51:25.950 align:middle line:90%
And they travel very rapidly.

00:51:25.950 --> 00:51:28.410 align:middle line:84%
You tend to then get the
equilibrium critical thickness

00:51:28.410 --> 00:51:30.370 align:middle line:90%
that that's this line here.

00:51:30.370 --> 00:51:32.130 align:middle line:84%
So if you're growing
at high temperature,

00:51:32.130 --> 00:51:34.950 align:middle line:84%
or you're annealing at high
temperature, if you're at 20%,

00:51:34.950 --> 00:51:37.350 align:middle line:84%
the equilibrium critical
thickness for silicon germanium

00:51:37.350 --> 00:51:41.320 align:middle line:84%
is about 120 angstroms, 110
angstroms, something like that.

00:51:41.320 --> 00:51:43.950 align:middle line:84%
So it says that if you're
growing in high temperature,

00:51:43.950 --> 00:51:47.520 align:middle line:84%
and you grow above about
120 angstroms of 20% silicon

00:51:47.520 --> 00:51:51.220 align:middle line:84%
germanium, it'll start to form
dislocations at that point.

00:51:51.220 --> 00:51:55.650 align:middle line:84%
However, if you are growing that
same germanium fraction at 550,

00:51:55.650 --> 00:51:58.140 align:middle line:84%
so you're in a very low
temperature epitaxial growth,

00:51:58.140 --> 00:51:59.850 align:middle line:84%
you're are kinetically
suppressing

00:51:59.850 --> 00:52:01.700 align:middle line:90%
the formation of dislocations.

00:52:01.700 --> 00:52:04.420 align:middle line:84%
In fact, the critical thickness
is like this curve here.

00:52:04.420 --> 00:52:06.450 align:middle line:90%
It's about 700 angstroms.

00:52:06.450 --> 00:52:09.240 align:middle line:84%
So there's a metastable
regime, if you

00:52:09.240 --> 00:52:12.000 align:middle line:84%
grow the layers thin enough,
you can keep them strained.

00:52:12.000 --> 00:52:15.270 align:middle line:84%
And they won't form dislocations
until a much thicker layer.

00:52:15.270 --> 00:52:16.800 align:middle line:84%
The problem with
that is, you can

00:52:16.800 --> 00:52:19.500 align:middle line:84%
grow them very thin at high
temperature, very thick,

00:52:19.500 --> 00:52:20.910 align:middle line:84%
and they won't
have dislocations.

00:52:20.910 --> 00:52:24.180 align:middle line:84%
But if you go to process them
it to make a device, at a higher

00:52:24.180 --> 00:52:26.055 align:middle line:84%
temperature,
dislocations can pop in

00:52:26.055 --> 00:52:28.180 align:middle line:84%
if you're above the
equilibrium critical thickness.

00:52:28.180 --> 00:52:30.330 align:middle line:84%
So this region is
called metastable

00:52:30.330 --> 00:52:32.280 align:middle line:84%
because you can grow
them at low temperatures

00:52:32.280 --> 00:52:33.420 align:middle line:90%
without dislocations.

00:52:33.420 --> 00:52:35.670 align:middle line:84%
But if you were to anneal
them at a higher temperature

00:52:35.670 --> 00:52:38.230 align:middle line:84%
dislocation, it would fall,
and it would start to relax.

00:52:38.230 --> 00:52:41.060 align:middle line:84%
Generally, this region up
here, up in the upper right,

00:52:41.060 --> 00:52:43.840 align:middle line:84%
so it's very thick films,
are almost always relaxed.

00:52:43.840 --> 00:52:46.240 align:middle line:84%
They'll always
have dislocations.

00:52:46.240 --> 00:52:49.180 align:middle line:84%
I refer you to this 1991
paper for a good reference

00:52:49.180 --> 00:52:54.610 align:middle line:84%
on understanding the formation
of misfits in strained silicon

00:52:54.610 --> 00:52:57.130 align:middle line:90%
germanium layers.

00:52:57.130 --> 00:53:04.370 align:middle line:84%
Slide 29, it turns out,
in the early 1990s,

00:53:04.370 --> 00:53:06.115 align:middle line:84%
there was some
breakthroughs on, you

00:53:06.115 --> 00:53:07.990 align:middle line:84%
say, well, growing
strains silicon germanium.

00:53:07.990 --> 00:53:09.070 align:middle line:90%
That's very interesting.

00:53:09.070 --> 00:53:10.180 align:middle line:90%
People want to do that.

00:53:10.180 --> 00:53:11.763 align:middle line:84%
There were actually
some breakthroughs

00:53:11.763 --> 00:53:13.790 align:middle line:84%
on how to grow relaxed
silicon germanium.

00:53:13.790 --> 00:53:16.720 align:middle line:84%
This seems like it should be
very easy to make the silicon

00:53:16.720 --> 00:53:17.420 align:middle line:90%
germanium relax.

00:53:17.420 --> 00:53:18.670 align:middle line:90%
You just grow it thick, right?

00:53:18.670 --> 00:53:21.400 align:middle line:84%
We just saw that paper
from Derek Houghton.

00:53:21.400 --> 00:53:26.238 align:middle line:84%
Well, if I'm at 30%, I just grow
it to be 3 or 4 microns up here.

00:53:26.238 --> 00:53:28.280 align:middle line:84%
It'll definitely be above
the critical thickness.

00:53:28.280 --> 00:53:29.072 align:middle line:90%
It will be relaxed.

00:53:29.072 --> 00:53:30.880 align:middle line:84%
It will have its own
lattice parameter.

00:53:30.880 --> 00:53:32.380 align:middle line:84%
The problem with
that, if you just

00:53:32.380 --> 00:53:35.740 align:middle line:84%
grow it right off the bat
like that, a box layer,

00:53:35.740 --> 00:53:40.490 align:middle line:84%
you end up with a huge number
of threading dislocations.

00:53:40.490 --> 00:53:42.668 align:middle line:84%
So if you don't
grade the profile,

00:53:42.668 --> 00:53:44.710 align:middle line:84%
you end up with more than
10 to the 9th, maybe 10

00:53:44.710 --> 00:53:47.920 align:middle line:84%
to the 10th of these
threading arms.

00:53:47.920 --> 00:53:51.760 align:middle line:84%
For every misfit, you have two
arms that go up to the surface.

00:53:51.760 --> 00:53:54.070 align:middle line:84%
And you have so many
of them that the layers

00:53:54.070 --> 00:53:56.230 align:middle line:84%
aren't very useful
for very many devices

00:53:56.230 --> 00:53:58.520 align:middle line:84%
because there's
too many defects.

00:53:58.520 --> 00:54:00.680 align:middle line:84%
But in the early '90s,
there were breakthroughs

00:54:00.680 --> 00:54:03.350 align:middle line:84%
on how to grow these
layers, how to grow them

00:54:03.350 --> 00:54:05.930 align:middle line:84%
in high enough temperature
so the threading arms could

00:54:05.930 --> 00:54:08.180 align:middle line:84%
run to the edge of
the wafer and how

00:54:08.180 --> 00:54:10.190 align:middle line:90%
to grade the germanium content.

00:54:10.190 --> 00:54:13.100 align:middle line:84%
So you start growing
at silicon lattice.

00:54:13.100 --> 00:54:15.740 align:middle line:84%
And then you gradually
add germanium as you go up

00:54:15.740 --> 00:54:17.750 align:middle line:84%
and you grade it
over many microns.

00:54:17.750 --> 00:54:20.310 align:middle line:84%
It turns out, when you do
that, you can relax the silicon

00:54:20.310 --> 00:54:20.810 align:middle line:90%
germanium.

00:54:20.810 --> 00:54:24.110 align:middle line:84%
But you can reduce the number of
arms that thread to the surface.

00:54:24.110 --> 00:54:26.235 align:middle line:84%
All the arms run out to
the edge of the wafer where

00:54:26.235 --> 00:54:27.735 align:middle line:84%
you don't care about
them you're not

00:54:27.735 --> 00:54:29.990 align:middle line:84%
going make any devices
at the edge of the wafer.

00:54:29.990 --> 00:54:32.150 align:middle line:84%
So the threading
dislocation density

00:54:32.150 --> 00:54:35.580 align:middle line:84%
can go down from 10 to the
9th to less than 10 to the 5th

00:54:35.580 --> 00:54:37.430 align:middle line:90%
if you do the grading right.

00:54:37.430 --> 00:54:39.620 align:middle line:84%
So a nice thing about
this is all of a sudden,

00:54:39.620 --> 00:54:42.200 align:middle line:84%
on silicon substrates in
the early '90s, people

00:54:42.200 --> 00:54:43.970 align:middle line:84%
had a way to take a
silicon substrate,

00:54:43.970 --> 00:54:46.040 align:middle line:84%
grow a relaxed silicon
germanium layer,

00:54:46.040 --> 00:54:48.800 align:middle line:84%
and have it be pretty high
quality and reasonable enough

00:54:48.800 --> 00:54:51.388 align:middle line:84%
high quality that you could
make devices on it that work.

00:54:51.388 --> 00:54:53.930 align:middle line:84%
There's still a lot of threading
dislocations, but not enough

00:54:53.930 --> 00:54:56.257 align:middle line:84%
to screw up the
devices too badly.

00:54:56.257 --> 00:54:58.590 align:middle line:84%
So that was kind of the
breakthrough that enabled people

00:54:58.590 --> 00:55:00.870 align:middle line:84%
to make relaxed silicon
germanium and then

00:55:00.870 --> 00:55:05.078 align:middle line:84%
strained silicon
MOSFETs on top of it.

00:55:05.078 --> 00:55:06.620 align:middle line:84%
What are some of
the materials issues

00:55:06.620 --> 00:55:09.290 align:middle line:84%
if you're growing this
relaxed silicon germanium?

00:55:09.290 --> 00:55:12.860 align:middle line:84%
Well, I already mentioned the
threading dislocation density.

00:55:12.860 --> 00:55:15.980 align:middle line:84%
It actually decreases if you go
to higher growth temperatures

00:55:15.980 --> 00:55:19.100 align:middle line:84%
because the dislocations
can move faster.

00:55:19.100 --> 00:55:21.650 align:middle line:84%
The problem, though,
is you also tend

00:55:21.650 --> 00:55:25.160 align:middle line:84%
to get a very strange field
that creates a crosshatch.

00:55:25.160 --> 00:55:29.240 align:middle line:84%
In fact, if you look a plan
view optical micrograph

00:55:29.240 --> 00:55:30.870 align:middle line:84%
of a relaxed silicon
germanium layer,

00:55:30.870 --> 00:55:32.540 align:middle line:90%
it looks like a plaid shirt.

00:55:32.540 --> 00:55:36.470 align:middle line:84%
This plaid is that buried
strain field causes the surface

00:55:36.470 --> 00:55:41.240 align:middle line:84%
to undulate ever so slightly,
maybe 100 angstrom, high hills

00:55:41.240 --> 00:55:42.500 align:middle line:90%
and valleys, very smooth.

00:55:42.500 --> 00:55:44.210 align:middle line:84%
And the period of
these undulations

00:55:44.210 --> 00:55:45.570 align:middle line:90%
are the spacing is quite large.

00:55:45.570 --> 00:55:47.660 align:middle line:90%
It can be microns.

00:55:47.660 --> 00:55:49.160 align:middle line:90%
So these are smooth undulations.

00:55:49.160 --> 00:55:51.590 align:middle line:84%
They don't really mess
with the electron mobility.

00:55:51.590 --> 00:55:53.900 align:middle line:84%
The electrons and holes
don't care about them.

00:55:53.900 --> 00:55:56.120 align:middle line:84%
It makes the wafers
look ugly, however.

00:55:56.120 --> 00:55:58.430 align:middle line:84%
And it makes
lithography difficult

00:55:58.430 --> 00:56:01.070 align:middle line:84%
because optical machines
don't like looking at plaid.

00:56:01.070 --> 00:56:02.510 align:middle line:84%
They like things
that look smooth.

00:56:02.510 --> 00:56:04.332 align:middle line:90%
So it is a practical problem.

00:56:04.332 --> 00:56:05.790 align:middle line:84%
People have found
a ways around it.

00:56:05.790 --> 00:56:09.085 align:middle line:84%
You can CNP the layer, and you
can remove all the undulations.

00:56:09.085 --> 00:56:10.710 align:middle line:84%
And it's not necessarily
a big problem.

00:56:10.710 --> 00:56:13.010 align:middle line:90%
But it is an issue.

00:56:13.010 --> 00:56:14.990 align:middle line:84%
If you grow the silicon
germanium too hot,

00:56:14.990 --> 00:56:18.050 align:middle line:84%
it turns out it doesn't
even grow as a planar film.

00:56:18.050 --> 00:56:21.320 align:middle line:84%
It grows as big little clumps,
little mountains or islands.

00:56:21.320 --> 00:56:22.940 align:middle line:84%
It doesn't wet the
surface properly.

00:56:22.940 --> 00:56:26.660 align:middle line:84%
And this type of growth
mode is generally

00:56:26.660 --> 00:56:29.360 align:middle line:84%
considered not very useful
because it's not really

00:56:29.360 --> 00:56:30.590 align:middle line:90%
a smooth film.

00:56:30.590 --> 00:56:33.410 align:middle line:84%
So you cannot grow silicon
germanium at too high

00:56:33.410 --> 00:56:35.285 align:middle line:84%
a temperature for a
given germanium fraction.

00:56:35.285 --> 00:56:38.700 align:middle line:90%


00:56:38.700 --> 00:56:41.880 align:middle line:84%
What do these relaxed silicon
germanium graded buffer layers

00:56:41.880 --> 00:56:42.390 align:middle line:90%
look like?

00:56:42.390 --> 00:56:44.473 align:middle line:84%
I said, well, they have
very few defects that

00:56:44.473 --> 00:56:45.390 align:middle line:90%
thread to the surface.

00:56:45.390 --> 00:56:47.100 align:middle line:90%
That's indeed true.

00:56:47.100 --> 00:56:49.282 align:middle line:84%
These are some cross
section TEM micrographs

00:56:49.282 --> 00:56:50.490 align:middle line:90%
of relaxed silicon germanium.

00:56:50.490 --> 00:56:53.678 align:middle line:84%
See at 10%, this is
the silicon substrate.

00:56:53.678 --> 00:56:54.720 align:middle line:90%
This is the graded layer.

00:56:54.720 --> 00:56:56.880 align:middle line:84%
There are lots of dislocations
in the graded layer.

00:56:56.880 --> 00:56:58.540 align:middle line:90%
That's what you want.

00:56:58.540 --> 00:57:00.580 align:middle line:84%
You want dislocations
down in the graded layer

00:57:00.580 --> 00:57:02.580 align:middle line:84%
because you want to relax
the lattice parameter.

00:57:02.580 --> 00:57:05.640 align:middle line:84%
You want it to expand to be
its equilibrium parameter.

00:57:05.640 --> 00:57:09.030 align:middle line:84%
But what you see is as
you get up to the surface,

00:57:09.030 --> 00:57:11.520 align:middle line:84%
if the graded layer is thick
enough into the box layer,

00:57:11.520 --> 00:57:15.157 align:middle line:84%
there are too many dislocations
of visible in cross-section PEM.

00:57:15.157 --> 00:57:16.740 align:middle line:84%
Again, this is up
here is where you're

00:57:16.740 --> 00:57:17.980 align:middle line:90%
going to build your device.

00:57:17.980 --> 00:57:19.330 align:middle line:90%
So that's what you care about.

00:57:19.330 --> 00:57:23.610 align:middle line:84%
But if you compare a 10% to
a 20% to a 30% germanium,

00:57:23.610 --> 00:57:25.140 align:middle line:84%
you see a higher
and higher density

00:57:25.140 --> 00:57:27.457 align:middle line:84%
of these buried
dislocations, of course,

00:57:27.457 --> 00:57:29.040 align:middle line:84%
as you increase the
germanium fraction

00:57:29.040 --> 00:57:33.110 align:middle line:84%
because you have to relieve
more lattice mismatch.

00:57:33.110 --> 00:57:36.040 align:middle line:90%
So the layers get pretty ugly.

00:57:36.040 --> 00:57:37.650 align:middle line:84%
Even though the
device is up on top,

00:57:37.650 --> 00:57:39.730 align:middle line:84%
there's still a lot
of integration issues.

00:57:39.730 --> 00:57:43.600 align:middle line:84%
You can imagine trying to make
CMOS circuits on a substrate

00:57:43.600 --> 00:57:44.575 align:middle line:90%
that looks like this.

00:57:44.575 --> 00:57:47.147 align:middle line:84%
All these buried dislocations
are going to worry

00:57:47.147 --> 00:57:48.730 align:middle line:84%
and they're going
to bother the device

00:57:48.730 --> 00:57:51.670 align:middle line:84%
engineers because after
all, we do have CMOS wells.

00:57:51.670 --> 00:57:56.890 align:middle line:84%
We do have deep junctions
in some of these structures.

00:57:56.890 --> 00:58:00.400 align:middle line:84%
So this silicon germanium can
affect our my shallow trench

00:58:00.400 --> 00:58:03.610 align:middle line:84%
isolation fabrication,
formation of silicides,

00:58:03.610 --> 00:58:05.320 align:middle line:90%
and the way dopants diffuse.

00:58:05.320 --> 00:58:06.805 align:middle line:90%
So it certainly is an issue.

00:58:06.805 --> 00:58:09.380 align:middle line:90%


00:58:09.380 --> 00:58:12.620 align:middle line:84%
In fact, there's a whole field
of research going on right now,

00:58:12.620 --> 00:58:15.040 align:middle line:84%
which is the study of
the diffusion of dopants

00:58:15.040 --> 00:58:17.510 align:middle line:90%
in silicon germanium.

00:58:17.510 --> 00:58:21.830 align:middle line:84%
And I'm showing
here on slide 32,

00:58:21.830 --> 00:58:24.500 align:middle line:84%
this is some data for
silicon germanium alloys

00:58:24.500 --> 00:58:26.490 align:middle line:90%
with 20% germanium in them.

00:58:26.490 --> 00:58:28.400 align:middle line:84%
And what we're looking
at is the diffusivity

00:58:28.400 --> 00:58:29.510 align:middle line:90%
of different dopants.

00:58:29.510 --> 00:58:32.970 align:middle line:84%
So this is the effective
equilibrium diffusivity.

00:58:32.970 --> 00:58:34.760 align:middle line:84%
So its diffusion
coefficient in centimeter

00:58:34.760 --> 00:58:38.660 align:middle line:84%
squared per second as a function
of inverse temperature, well,

00:58:38.660 --> 00:58:40.370 align:middle line:84%
the usual kind of
Arrhenius plot.

00:58:40.370 --> 00:58:43.850 align:middle line:84%
And if you look at boron,
so the dashed line here

00:58:43.850 --> 00:58:45.290 align:middle line:90%
is for diffusion in silicon.

00:58:45.290 --> 00:58:48.230 align:middle line:84%
And the solid is for diffusion
in silicon germanium.

00:58:48.230 --> 00:58:52.890 align:middle line:84%
If you look at boron here, in
fact, in 20% silicon germanium,

00:58:52.890 --> 00:58:54.060 align:middle line:90%
the diffusivities reduced.

00:58:54.060 --> 00:58:55.852 align:middle line:84%
I'd said before, a
factor of 10, looks more

00:58:55.852 --> 00:58:58.410 align:middle line:84%
like a factor of 6 or so,
depending on the temperature.

00:58:58.410 --> 00:59:01.528 align:middle line:84%
But so the boron
diffusivity goes down

00:59:01.528 --> 00:59:03.570 align:middle line:84%
in silicon germanium,
which is nice because boron

00:59:03.570 --> 00:59:05.550 align:middle line:90%
is a fast diffuser in silicon.

00:59:05.550 --> 00:59:07.770 align:middle line:84%
But if you look at
arsenic, this is arsenic

00:59:07.770 --> 00:59:09.000 align:middle line:90%
in silicon, the dashed line.

00:59:09.000 --> 00:59:11.520 align:middle line:84%
Arsenic in silicon germanium
is the solid line here

00:59:11.520 --> 00:59:12.790 align:middle line:90%
with the green arrow.

00:59:12.790 --> 00:59:14.250 align:middle line:84%
So the arsenic in
silicon germanium

00:59:14.250 --> 00:59:15.490 align:middle line:90%
is diffusing a lot faster.

00:59:15.490 --> 00:59:17.700 align:middle line:84%
In fact, arsenic in
silicon germanium

00:59:17.700 --> 00:59:19.710 align:middle line:84%
is diffusing at about
the same rate as born

00:59:19.710 --> 00:59:22.270 align:middle line:90%
in silicon germanium at 20%.

00:59:22.270 --> 00:59:24.450 align:middle line:84%
So we've taken the boron
diffusion coefficient,

00:59:24.450 --> 00:59:25.470 align:middle line:90%
it goes down.

00:59:25.470 --> 00:59:27.970 align:middle line:84%
Arsenic, which is usually very
slow in silicon, now goes up.

00:59:27.970 --> 00:59:30.512 align:middle line:84%
Now they diffuse about equally,
which is kind of interesting.

00:59:30.512 --> 00:59:32.730 align:middle line:84%
You might make some
interesting device structures

00:59:32.730 --> 00:59:34.320 align:middle line:84%
when you have
symmetric diffusion

00:59:34.320 --> 00:59:37.110 align:middle line:84%
coefficients between the
N and the P type doping.

00:59:37.110 --> 00:59:39.720 align:middle line:84%
Unfortunately, what it means
is that in silicon germanium

00:59:39.720 --> 00:59:41.790 align:middle line:84%
MOSFETs, we actually
are much more

00:59:41.790 --> 00:59:44.370 align:middle line:84%
worried about the
n-type dopant diffusion

00:59:44.370 --> 00:59:45.750 align:middle line:84%
because that's
what's going fast.

00:59:45.750 --> 00:59:48.330 align:middle line:84%
And we're less worried about
the p-type doping diffusion

00:59:48.330 --> 00:59:49.890 align:middle line:84%
because the boron
is going slower.

00:59:49.890 --> 00:59:51.880 align:middle line:84%
Phosphorus doesn't
help the situation.

00:59:51.880 --> 00:59:55.810 align:middle line:84%
Phosphorus is also enhanced,
maybe about a factor of 2 or 3,

00:59:55.810 --> 00:59:58.630 align:middle line:90%
depending upon the temperature.

00:59:58.630 --> 01:00:01.630 align:middle line:84%
So and this line here
gives you an idea roughly

01:00:01.630 --> 01:00:03.880 align:middle line:90%
of the diffusivity of germanium.

01:00:03.880 --> 01:00:06.632 align:middle line:84%
Well, this is at a very
low germanium fraction

01:00:06.632 --> 01:00:07.840 align:middle line:90%
as a function of temperature.

01:00:07.840 --> 01:00:10.855 align:middle line:84%
It's diffusing slower
than the dopants, at least

01:00:10.855 --> 01:00:11.980 align:middle line:90%
at this germanium fraction.

01:00:11.980 --> 01:00:15.380 align:middle line:90%


01:00:15.380 --> 01:00:19.030 align:middle line:84%
So I mentioned to you
that arsenic moves faster

01:00:19.030 --> 01:00:20.000 align:middle line:90%
in silicon germanium.

01:00:20.000 --> 01:00:21.667 align:middle line:84%
This is actually a
big problem if you're

01:00:21.667 --> 01:00:24.670 align:middle line:84%
trying to make a strained
silicon mMOSFET with silicon

01:00:24.670 --> 01:00:26.210 align:middle line:90%
germanium in the substrate.

01:00:26.210 --> 01:00:29.770 align:middle line:84%
Let's say you're trying to
make a shallow source drains.

01:00:29.770 --> 01:00:34.720 align:middle line:84%
So you implant 50 keV
at 3 times 10 to 15,

01:00:34.720 --> 01:00:37.660 align:middle line:84%
may be a typical
source drain implant.

01:00:37.660 --> 01:00:42.110 align:middle line:84%
And you anneal it at 1,000
degrees for various times.

01:00:42.110 --> 01:00:45.800 align:middle line:84%
And the dashed lines here
are for a silicon substrate

01:00:45.800 --> 01:00:48.090 align:middle line:84%
and the solid are for
silicon germanium.

01:00:48.090 --> 01:00:51.500 align:middle line:84%
So if you just look at,
say, this dashed line here,

01:00:51.500 --> 01:00:54.830 align:middle line:84%
this red dashed line,
for the silicon substrate

01:00:54.830 --> 01:00:57.947 align:middle line:84%
with this 22nd
anneal at 1,000, you

01:00:57.947 --> 01:00:59.780 align:middle line:84%
have a junction depth
of about 500 angstrom.

01:00:59.780 --> 01:01:00.950 align:middle line:90%
That's perfect.

01:01:00.950 --> 01:01:02.640 align:middle line:84%
For the silicon
germanium substrate,

01:01:02.640 --> 01:01:04.850 align:middle line:84%
which is the solid
line, 22nd anneal,

01:01:04.850 --> 01:01:08.000 align:middle line:84%
your junction depth is
more than twice that.

01:01:08.000 --> 01:01:10.230 align:middle line:90%
It's like a 1,200 angstroms.

01:01:10.230 --> 01:01:12.650 align:middle line:84%
So the arsenic and
the silicon germanium

01:01:12.650 --> 01:01:14.180 align:middle line:90%
is going much more rapidly.

01:01:14.180 --> 01:01:16.430 align:middle line:90%
You see this big, big shift.

01:01:16.430 --> 01:01:18.260 align:middle line:90%
And that's a problem.

01:01:18.260 --> 01:01:20.030 align:middle line:84%
If you use very
short anneal times,

01:01:20.030 --> 01:01:21.830 align:middle line:84%
you can minimize
that difference.

01:01:21.830 --> 01:01:24.440 align:middle line:84%
But 1,000 degrees,
one second is not

01:01:24.440 --> 01:01:26.330 align:middle line:84%
really enough to really
repair all the damage

01:01:26.330 --> 01:01:27.630 align:middle line:90%
and to activate all the dopant.

01:01:27.630 --> 01:01:30.410 align:middle line:84%
So there's a very
interesting issue here

01:01:30.410 --> 01:01:35.815 align:middle line:84%
is, how do we optimize the
annealing time for anti dopant?

01:01:35.815 --> 01:01:37.940 align:middle line:84%
So we get good activation
in the silicon germanium.

01:01:37.940 --> 01:01:41.760 align:middle line:84%
But we don't introduce too
much diffusion, otherwise,

01:01:41.760 --> 01:01:47.050 align:middle line:84%
we can't control the
device fabrication.

01:01:47.050 --> 01:01:48.707 align:middle line:84%
Here's another
issue on slide 34.

01:01:48.707 --> 01:01:51.040 align:middle line:84%
I'm not trying to make silicon
germanium look difficult.

01:01:51.040 --> 01:01:52.510 align:middle line:90%
But it is a new material.

01:01:52.510 --> 01:01:55.120 align:middle line:90%
And a lot of things change.

01:01:55.120 --> 01:01:59.470 align:middle line:84%
Slide 34 shows you that
indeed, the germanium itself

01:01:59.470 --> 01:02:01.010 align:middle line:90%
can diffuse.

01:02:01.010 --> 01:02:04.750 align:middle line:84%
Well, we're talking about taking
a silicon germanium thick layer

01:02:04.750 --> 01:02:06.970 align:middle line:84%
and putting a thin
layer, say 100 angstroms,

01:02:06.970 --> 01:02:08.140 align:middle line:90%
of strained silicon on it.

01:02:08.140 --> 01:02:09.640 align:middle line:90%
That's my channel.

01:02:09.640 --> 01:02:10.930 align:middle line:90%
OK, that sounds fine.

01:02:10.930 --> 01:02:12.550 align:middle line:90%
We can grow that epitaxially.

01:02:12.550 --> 01:02:14.770 align:middle line:84%
But now, I need to
implant the source trays

01:02:14.770 --> 01:02:16.015 align:middle line:90%
and anneal it at 1,000.

01:02:16.015 --> 01:02:18.640 align:middle line:84%
What's going to happen to that
silicon germanium, the germanium

01:02:18.640 --> 01:02:20.170 align:middle line:90%
and silicon germanium?

01:02:20.170 --> 01:02:23.020 align:middle line:84%
Well, it's going to diffuse
up into the silicon.

01:02:23.020 --> 01:02:27.477 align:middle line:84%
Once we get germanium into
the channel, that's a no no.

01:02:27.477 --> 01:02:29.560 align:middle line:84%
The electrons don't like
germanium in the channel.

01:02:29.560 --> 01:02:31.560 align:middle line:84%
The electrons can be
scattered by the germanium.

01:02:31.560 --> 01:02:33.080 align:middle line:90%
Mobility goes way down.

01:02:33.080 --> 01:02:34.990 align:middle line:90%
And your device is ruined.

01:02:34.990 --> 01:02:36.592 align:middle line:84%
You lose a lot of
your strain too.

01:02:36.592 --> 01:02:38.800 align:middle line:84%
So you have to keep the
germanium out of the channel.

01:02:38.800 --> 01:02:40.092 align:middle line:90%
Well, it doesn't sound too bad.

01:02:40.092 --> 01:02:42.970 align:middle line:84%
But if you just look at some
of the diffusion coefficients,

01:02:42.970 --> 01:02:46.030 align:middle line:84%
in fact, these different
lines, these are measured.

01:02:46.030 --> 01:02:47.980 align:middle line:84%
This is the germanium
self-diffusion

01:02:47.980 --> 01:02:51.380 align:middle line:84%
in silicon germanium alloys for
different germanium content.

01:02:51.380 --> 01:02:52.460 align:middle line:90%
So this is for silicon.

01:02:52.460 --> 01:02:54.370 align:middle line:84%
So this will be
silicon self diffusion.

01:02:54.370 --> 01:03:00.830 align:middle line:84%
This is 10% germanium,
20%, 30, 40 and 50.

01:03:00.830 --> 01:03:05.127 align:middle line:84%
So if you just look at a given
temperature, say at 950 degrees.

01:03:05.127 --> 01:03:07.460 align:middle line:84%
Look it's what's happening
to the diffusion coefficient.

01:03:07.460 --> 01:03:11.930 align:middle line:84%
In pure silicon, germanium
diffusing very slowly

01:03:11.930 --> 01:03:14.600 align:middle line:84%
for a low germanium
content, here, at around 10

01:03:14.600 --> 01:03:17.160 align:middle line:84%
to the minus 17th centimeter
squared per second.

01:03:17.160 --> 01:03:21.050 align:middle line:84%
But if you go up to a 40%
alloy, the diffusivity

01:03:21.050 --> 01:03:23.190 align:middle line:84%
goes up by two
orders of magnitude.

01:03:23.190 --> 01:03:25.670 align:middle line:84%
So what this is
saying is basically,

01:03:25.670 --> 01:03:28.700 align:middle line:84%
you get an exponential
increase, it

01:03:28.700 --> 01:03:32.240 align:middle line:84%
looks like, in the germanium
diffusion coefficient

01:03:32.240 --> 01:03:34.750 align:middle line:84%
as you increase the amount
of germanium in the alloy.

01:03:34.750 --> 01:03:36.560 align:middle line:90%
So it's a big issue.

01:03:36.560 --> 01:03:39.412 align:middle line:84%
If you want to do
strained silicon on 20%,

01:03:39.412 --> 01:03:41.120 align:middle line:84%
you're going to have
a silicon germanium.

01:03:41.120 --> 01:03:42.828 align:middle line:84%
You have a certain
diffusion coefficient.

01:03:42.828 --> 01:03:44.780 align:middle line:84%
If you do it on
30%, all of a sudden

01:03:44.780 --> 01:03:48.480 align:middle line:84%
your diffusion coefficient,
factor of 5 or so higher.

01:03:48.480 --> 01:03:49.970 align:middle line:84%
So that's a big
issue because you

01:03:49.970 --> 01:03:52.137 align:middle line:84%
don't want the germanium
diffusing into the channel.

01:03:52.137 --> 01:03:55.850 align:middle line:84%
So this data is not exactly
interdiffusion data.

01:03:55.850 --> 01:03:58.590 align:middle line:84%
That whole problem
needs to be worked out.

01:03:58.590 --> 01:04:02.070 align:middle line:84%
But interdiffusion is definitely
observed for like 1,000 degrees

01:04:02.070 --> 01:04:03.640 align:middle line:90%
10 seconds at 20%.

01:04:03.640 --> 01:04:05.473 align:middle line:90%
So that that's a no no.

01:04:05.473 --> 01:04:07.140 align:middle line:84%
So that's going to
be a big issue in how

01:04:07.140 --> 01:04:08.723 align:middle line:84%
we're going to
activate source strains

01:04:08.723 --> 01:04:10.110 align:middle line:90%
in those kind of structures.

01:04:10.110 --> 01:04:12.950 align:middle line:90%


01:04:12.950 --> 01:04:16.190 align:middle line:84%
That's an interesting
research area.

01:04:16.190 --> 01:04:19.640 align:middle line:84%
You might be saying, well, what
is the mechanism of diffusion

01:04:19.640 --> 01:04:21.350 align:middle line:90%
of germanium in silicon anyway?

01:04:21.350 --> 01:04:22.790 align:middle line:90%
Actually, it's not really known.

01:04:22.790 --> 01:04:26.990 align:middle line:84%
On page 35, there's an
example of people are just

01:04:26.990 --> 01:04:28.320 align:middle line:90%
trying to get a handle on this.

01:04:28.320 --> 01:04:32.330 align:middle line:84%
This was published about
a year and a half ago.

01:04:32.330 --> 01:04:35.020 align:middle line:84%
And this particular
experiment, they

01:04:35.020 --> 01:04:37.850 align:middle line:84%
did a process where they
had strained silicon

01:04:37.850 --> 01:04:39.410 align:middle line:90%
on relaxed silicon germanium.

01:04:39.410 --> 01:04:42.410 align:middle line:84%
And they did an anneal in
a rapid thermal annealer

01:04:42.410 --> 01:04:43.800 align:middle line:90%
where they put in ammonia.

01:04:43.800 --> 01:04:46.160 align:middle line:84%
So they're doing rapid
thermal nitratation.

01:04:46.160 --> 01:04:49.310 align:middle line:84%
So what do we know
about nitratation?

01:04:49.310 --> 01:04:52.063 align:middle line:84%
Well, nitratation, we believe
injects vacancies, right?

01:04:52.063 --> 01:04:52.980 align:middle line:90%
That's what we use it.

01:04:52.980 --> 01:04:55.400 align:middle line:84%
So in the samples
that were nitrided,

01:04:55.400 --> 01:04:57.785 align:middle line:84%
the germanium diffused right
through the strained silicon

01:04:57.785 --> 01:04:58.910 align:middle line:90%
all the way to the surface.

01:04:58.910 --> 01:05:01.130 align:middle line:84%
And the sims
profile for the blue

01:05:01.130 --> 01:05:03.170 align:middle line:84%
here shows a germanium
went right through that

01:05:03.170 --> 01:05:04.170 align:middle line:90%
set 100 angstrom layer.

01:05:04.170 --> 01:05:06.060 align:middle line:90%
It was gone.

01:05:06.060 --> 01:05:07.707 align:middle line:84%
The red line is
for the germanium

01:05:07.707 --> 01:05:09.290 align:middle line:84%
that was annealed
in an inert ambient.

01:05:09.290 --> 01:05:13.040 align:middle line:84%
It diffused a little bit during
this rapid thermal anneal.

01:05:13.040 --> 01:05:15.680 align:middle line:84%
But ignore the surface
peak because that's

01:05:15.680 --> 01:05:17.150 align:middle line:90%
sort of a sims artifact.

01:05:17.150 --> 01:05:19.230 align:middle line:84%
But at least it
didn't go all the way.

01:05:19.230 --> 01:05:22.197 align:middle line:84%
So this is a very
preliminary result.

01:05:22.197 --> 01:05:23.280 align:middle line:90%
And it has to be repeated.

01:05:23.280 --> 01:05:25.550 align:middle line:84%
But it's sort of
indicates that processes

01:05:25.550 --> 01:05:27.537 align:middle line:84%
that inject vacancies
probably should

01:05:27.537 --> 01:05:29.120 align:middle line:84%
be avoided if you're
trying to control

01:05:29.120 --> 01:05:31.520 align:middle line:90%
the diffusion of germanium.

01:05:31.520 --> 01:05:34.310 align:middle line:84%
And so there are
a lot of interest

01:05:34.310 --> 01:05:38.090 align:middle line:84%
in doing processes to inject
interstitials, inject vacancies.

01:05:38.090 --> 01:05:41.450 align:middle line:84%
All the same kind of tests
that have done in silicon

01:05:41.450 --> 01:05:44.360 align:middle line:84%
can now be done in strained
silicon on silicon germanium

01:05:44.360 --> 01:05:46.387 align:middle line:84%
to see how the
germanium diffuses

01:05:46.387 --> 01:05:47.720 align:middle line:90%
or even how the dopants diffuse.

01:05:47.720 --> 01:05:52.160 align:middle line:90%


01:05:52.160 --> 01:05:54.953 align:middle line:84%
I want to say a little bit now
about these MOSFETs on insulator

01:05:54.953 --> 01:05:57.620 align:middle line:84%
because I've talked a little bit
about how the silicon germanium

01:05:57.620 --> 01:05:58.967 align:middle line:90%
is becoming a problem.

01:05:58.967 --> 01:06:00.800 align:middle line:84%
How can we get around
some of these problems

01:06:00.800 --> 01:06:05.160 align:middle line:84%
by doing strained
silicon on insulator?

01:06:05.160 --> 01:06:08.730 align:middle line:84%
Well, on page 37, I'm showing
an example of a potential thing

01:06:08.730 --> 01:06:09.810 align:middle line:90%
you might be thinking of.

01:06:09.810 --> 01:06:13.230 align:middle line:84%
Well, let's say we could get
rid of-- if we go back here,

01:06:13.230 --> 01:06:19.230 align:middle line:84%
let me go back a few slides, and
just look at this on slide 31,

01:06:19.230 --> 01:06:21.840 align:middle line:84%
this ugly looking thing
with all these dislocations

01:06:21.840 --> 01:06:23.970 align:middle line:84%
and that thick silicon
germanium substrate.

01:06:23.970 --> 01:06:25.810 align:middle line:84%
I need them to relax
the strain so I

01:06:25.810 --> 01:06:27.810 align:middle line:84%
can grow a thin layer of
strained silica on top.

01:06:27.810 --> 01:06:30.780 align:middle line:84%
But I don't really need them
once the strain is relaxed.

01:06:30.780 --> 01:06:33.390 align:middle line:84%
So that idea was, what if
you could take this layer?

01:06:33.390 --> 01:06:35.400 align:middle line:84%
The top portion
looks pretty good.

01:06:35.400 --> 01:06:37.590 align:middle line:84%
If you could take this
whole layer and bond it

01:06:37.590 --> 01:06:41.010 align:middle line:84%
to another wafer and then
get rid of, etch away,

01:06:41.010 --> 01:06:43.350 align:middle line:84%
all the dislocated
material, then you'd

01:06:43.350 --> 01:06:46.680 align:middle line:84%
have relaxed silicon germanium
on insulator, for example.

01:06:46.680 --> 01:06:48.420 align:middle line:84%
And all this
dislocation material

01:06:48.420 --> 01:06:50.670 align:middle line:84%
would have been etched
off or maybe removed

01:06:50.670 --> 01:06:52.410 align:middle line:90%
by a smart cut like process.

01:06:52.410 --> 01:06:54.520 align:middle line:84%
I think some of you
are studying smart cut.

01:06:54.520 --> 01:06:58.030 align:middle line:84%
We talked about a little bit
we talked about SOI formation.

01:06:58.030 --> 01:07:01.920 align:middle line:84%
So, in fact, that's what
this cartoon on slide 37

01:07:01.920 --> 01:07:05.050 align:middle line:84%
shows where you might have a
thin layer of relaxed silicon

01:07:05.050 --> 01:07:07.150 align:middle line:84%
germanium that
has been generated

01:07:07.150 --> 01:07:09.572 align:middle line:84%
by growing a thick
layer and bonding it on.

01:07:09.572 --> 01:07:11.530 align:middle line:84%
And then you could grow
strained silicon on top

01:07:11.530 --> 01:07:15.200 align:middle line:84%
and make your nMOS and
your pMOS that way.

01:07:15.200 --> 01:07:16.930 align:middle line:84%
So this is one idea
that people have

01:07:16.930 --> 01:07:23.470 align:middle line:84%
been pursuing to get around some
of those dislocation issues.

01:07:23.470 --> 01:07:25.410 align:middle line:84%
In fact, on slide 38,
if you're interested,

01:07:25.410 --> 01:07:27.243 align:middle line:84%
I've listed a number
of different references

01:07:27.243 --> 01:07:30.510 align:middle line:84%
here on how people are trying
to form relaxed silicon

01:07:30.510 --> 01:07:31.800 align:middle line:90%
germanium on insulator.

01:07:31.800 --> 01:07:34.440 align:middle line:84%
It turns out, there are a lot
of different processes, not just

01:07:34.440 --> 01:07:35.550 align:middle line:90%
the bonding process.

01:07:35.550 --> 01:07:38.460 align:middle line:84%
There is a SIMOX-like
process where

01:07:38.460 --> 01:07:41.490 align:middle line:84%
people grow silicon germanium
on silicon epitaxily,

01:07:41.490 --> 01:07:43.410 align:middle line:84%
and then they ion
implant the oxygen.

01:07:43.410 --> 01:07:45.690 align:middle line:90%
That's exactly how SOI is made.

01:07:45.690 --> 01:07:47.880 align:middle line:84%
So SOI, they ion implant
into pure silicon.

01:07:47.880 --> 01:07:49.680 align:middle line:84%
Here, they ion
implant the oxygen

01:07:49.680 --> 01:07:51.270 align:middle line:90%
into a silicon germanium layer.

01:07:51.270 --> 01:07:55.140 align:middle line:84%
So the SIMOX-like process,
Toshiba has talked about that.

01:07:55.140 --> 01:07:56.790 align:middle line:90%
There are some problems though.

01:07:56.790 --> 01:07:59.580 align:middle line:84%
For high germanium contents
of above about 15%,

01:07:59.580 --> 01:08:01.890 align:middle line:90%
it doesn't work very well.

01:08:01.890 --> 01:08:04.290 align:middle line:84%
There's another very
interesting technique,

01:08:04.290 --> 01:08:08.340 align:middle line:84%
also came out of Toshiba,
called germanium condensation.

01:08:08.340 --> 01:08:10.575 align:middle line:84%
They actually start
with an SOI wafer.

01:08:10.575 --> 01:08:13.230 align:middle line:84%
So they start with a wafer you
buy from a commercial vendor.

01:08:13.230 --> 01:08:14.760 align:middle line:84%
It would have
silicon on insulator.

01:08:14.760 --> 01:08:17.652 align:middle line:84%
They epitaxially grow a thin
layer of silicon germanium

01:08:17.652 --> 01:08:19.319 align:middle line:84%
with a relatively low
germanium content.

01:08:19.319 --> 01:08:21.160 align:middle line:84%
And then the oxidized
the whole thing.

01:08:21.160 --> 01:08:24.100 align:middle line:84%
It turns out, in the
oxidation, the germanium

01:08:24.100 --> 01:08:26.979 align:middle line:84%
is snow plowed forward
into the layer.

01:08:26.979 --> 01:08:28.367 align:middle line:90%
And the layer relaxes.

01:08:28.367 --> 01:08:29.950 align:middle line:84%
So they end up with
a higher germanium

01:08:29.950 --> 01:08:31.600 align:middle line:90%
content after oxidation.

01:08:31.600 --> 01:08:33.130 align:middle line:84%
And they have written
in the layer--

01:08:33.130 --> 01:08:34.922 align:middle line:84%
originally strained
silicon germanium layer

01:08:34.922 --> 01:08:37.810 align:middle line:84%
ends up relaxing by
the oxidation process

01:08:37.810 --> 01:08:39.710 align:middle line:90%
at very high temperatures.

01:08:39.710 --> 01:08:41.569 align:middle line:90%
So that seems to be interesting.

01:08:41.569 --> 01:08:45.069 align:middle line:84%
There's a very similar technique
called melt solidification

01:08:45.069 --> 01:08:47.410 align:middle line:90%
by another group.

01:08:47.410 --> 01:08:50.050 align:middle line:84%
And the bond and etch back
is what I mentioned before.

01:08:50.050 --> 01:08:53.649 align:middle line:84%
You grow the relaxed
silicon germanium, bond it

01:08:53.649 --> 01:08:56.335 align:middle line:84%
to an oxide wafer, and etch
it back or smart cut it off.

01:08:56.335 --> 01:08:59.140 align:middle line:90%


01:08:59.140 --> 01:09:01.255 align:middle line:84%
This is just that same
process on slide 39.

01:09:01.255 --> 01:09:02.560 align:middle line:90%
I won't go in great detail.

01:09:02.560 --> 01:09:06.250 align:middle line:84%
But you can imagine, by
bonding and selective etching,

01:09:06.250 --> 01:09:08.800 align:middle line:84%
you grow your graded silicon
germanium relax layer,

01:09:08.800 --> 01:09:12.850 align:middle line:84%
you grow your relaxed
cap, and then you

01:09:12.850 --> 01:09:16.330 align:middle line:84%
flip it over and bond it to
an oxidized handle wafer,

01:09:16.330 --> 01:09:19.210 align:middle line:84%
just like you would
in a bond an etch SOI.

01:09:19.210 --> 01:09:21.160 align:middle line:84%
And then you etch
everything back.

01:09:21.160 --> 01:09:23.410 align:middle line:84%
And you end up with just
relaxed silicon germanium

01:09:23.410 --> 01:09:28.010 align:middle line:84%
after you've done CMP, relaxed
silicon germanium on insulator.

01:09:28.010 --> 01:09:30.080 align:middle line:84%
So that's a technique
that's being

01:09:30.080 --> 01:09:32.899 align:middle line:84%
pursued to form relaxed
silicon germanium uninsulated.

01:09:32.899 --> 01:09:36.439 align:middle line:84%
Then you can grow strained
silicon afterwards.

01:09:36.439 --> 01:09:39.770 align:middle line:84%
You can also do bonding and
hydrogen-induced delamination

01:09:39.770 --> 01:09:41.750 align:middle line:90%
or smart cut.

01:09:41.750 --> 01:09:43.609 align:middle line:84%
If we study smart
cut for silicon,

01:09:43.609 --> 01:09:46.130 align:middle line:84%
here, we start with a relaxed
silicon germanium epi layer.

01:09:46.130 --> 01:09:49.069 align:middle line:84%
We ion implant with hydrogen.
And at the peak of the hydrogen,

01:09:49.069 --> 01:09:51.899 align:middle line:90%
bubbles form.

01:09:51.899 --> 01:09:55.190 align:middle line:84%
So after we've done the
bonding, we heat it up.

01:09:55.190 --> 01:09:57.920 align:middle line:84%
And those bubbles end
up cleaving it off.

01:09:57.920 --> 01:09:59.510 align:middle line:84%
You get the
delamination process.

01:09:59.510 --> 01:10:02.370 align:middle line:84%
This is exactly analogous
to what happens in SOI fab.

01:10:02.370 --> 01:10:04.370 align:middle line:84%
And now you have silicon
germanium on insulator.

01:10:04.370 --> 01:10:06.800 align:middle line:84%
Of course, it has to be
polished and smoothed.

01:10:06.800 --> 01:10:09.200 align:middle line:84%
But it is a way to
form that material.

01:10:09.200 --> 01:10:11.888 align:middle line:90%


01:10:11.888 --> 01:10:14.430 align:middle line:84%
I'll skip through this at this
point because we're basically,

01:10:14.430 --> 01:10:16.972 align:middle line:84%
it shows, when you make that,
and you make a strained silicon

01:10:16.972 --> 01:10:18.750 align:middle line:84%
MOSFET, you get
the same mobility

01:10:18.750 --> 01:10:22.380 align:middle line:84%
that people have
seen in the past.

01:10:22.380 --> 01:10:24.073 align:middle line:84%
Again, I'll skip that,
interest of time.

01:10:24.073 --> 01:10:26.490 align:middle line:84%
And what I want to end up with
is there's another approach

01:10:26.490 --> 01:10:28.890 align:middle line:84%
people thought,
well, why don't you

01:10:28.890 --> 01:10:31.890 align:middle line:84%
just transfer the strained
silicon layer itself?

01:10:31.890 --> 01:10:33.510 align:middle line:90%
Why do we even have to transfer?

01:10:33.510 --> 01:10:35.790 align:middle line:84%
Once you grow the relaxed
silicon germanium,

01:10:35.790 --> 01:10:38.460 align:middle line:84%
you can grow strained
silicon on top of it.

01:10:38.460 --> 01:10:41.310 align:middle line:84%
Bond that to oxide, and
then remove everything

01:10:41.310 --> 01:10:43.090 align:middle line:90%
except the strained silicon.

01:10:43.090 --> 01:10:45.600 align:middle line:84%
And if the strain
remains, then you

01:10:45.600 --> 01:10:47.970 align:middle line:84%
have strained silicon
directly on the insulator.

01:10:47.970 --> 01:10:49.860 align:middle line:84%
You remove the silicon
germanium completely.

01:10:49.860 --> 01:10:52.360 align:middle line:84%
So you don't have to worry about
silicon germanium diffusion

01:10:52.360 --> 01:10:54.640 align:middle line:84%
and diffusion of dope into
silicon germanium and all

01:10:54.640 --> 01:10:55.180 align:middle line:90%
of that.

01:10:55.180 --> 01:10:57.840 align:middle line:84%
So this is an ultra thin
strained silicon directly

01:10:57.840 --> 01:10:59.520 align:middle line:90%
on insulator sort of concept.

01:10:59.520 --> 01:11:01.530 align:middle line:90%
This is just a cartoon.

01:11:01.530 --> 01:11:06.170 align:middle line:84%
It's actually been demonstrated
fairly recently here at MIT

01:11:06.170 --> 01:11:07.270 align:middle line:90%
on page 44.

01:11:07.270 --> 01:11:09.200 align:middle line:84%
In fact, this is the
process that was used.

01:11:09.200 --> 01:11:12.660 align:middle line:84%
A very complicated stack
of epi layers was grown.

01:11:12.660 --> 01:11:14.210 align:middle line:84%
But the important
thing is the top

01:11:14.210 --> 01:11:16.100 align:middle line:84%
of the stack was
strained silicon.

01:11:16.100 --> 01:11:19.910 align:middle line:84%
And that whole stack was bonded
to an oxidized silicon wafer.

01:11:19.910 --> 01:11:22.350 align:middle line:84%
And then everything was
removed by selective etching.

01:11:22.350 --> 01:11:24.290 align:middle line:84%
So when you're done,
all you have left

01:11:24.290 --> 01:11:27.200 align:middle line:84%
is strained silicon
directly on the oxide.

01:11:27.200 --> 01:11:30.020 align:middle line:84%
And you use etch
top layers, so you

01:11:30.020 --> 01:11:32.120 align:middle line:84%
can etch back the
entire wafer and just

01:11:32.120 --> 01:11:35.230 align:middle line:90%
leave strained silicon behind.

01:11:35.230 --> 01:11:37.360 align:middle line:84%
And in fact, on page
45, what you see

01:11:37.360 --> 01:11:41.290 align:middle line:84%
is that the strained silicon
is bonded to the oxide.

01:11:41.290 --> 01:11:43.280 align:middle line:84%
It's low defect
density material.

01:11:43.280 --> 01:11:45.820 align:middle line:84%
And if you do Raman
scattering, the strain remains.

01:11:45.820 --> 01:11:48.160 align:middle line:84%
Even after you remove
the silicon germanium,

01:11:48.160 --> 01:11:50.230 align:middle line:84%
you annealing at
high temperatures,

01:11:50.230 --> 01:11:52.670 align:middle line:84%
even up to 1,000 degrees,
the strain doesn't go away.

01:11:52.670 --> 01:11:54.320 align:middle line:90%
So the bond is very strong.

01:11:54.320 --> 01:11:57.040 align:middle line:84%
So now, you have strained
silicon directly on insulator.

01:11:57.040 --> 01:11:59.800 align:middle line:84%
Looks just like SOI, you can
process it just like SOI.

01:11:59.800 --> 01:12:01.310 align:middle line:84%
But the strain is
already built in.

01:12:01.310 --> 01:12:05.438 align:middle line:84%
You don't have any germanium
that you need to worry about.

01:12:05.438 --> 01:12:07.730 align:middle line:84%
So I think that's going to
be a pretty interesting area

01:12:07.730 --> 01:12:08.960 align:middle line:90%
for the future.

01:12:08.960 --> 01:12:10.730 align:middle line:84%
Just yesterday, I
read in the paper

01:12:10.730 --> 01:12:14.030 align:middle line:84%
that it had been announced that
a company called Soitec is now

01:12:14.030 --> 01:12:16.700 align:middle line:84%
manufacturing 300-millimeter
strained silicon directly

01:12:16.700 --> 01:12:18.590 align:middle line:90%
on insulator SSDOI.

01:12:18.590 --> 01:12:21.350 align:middle line:84%
And once it becomes
available 300 millimeter,

01:12:21.350 --> 01:12:25.350 align:middle line:84%
a lot of companies will be able
to use it for their production.

01:12:25.350 --> 01:12:27.680 align:middle line:84%
So that's about all I
have to say on that.

01:12:27.680 --> 01:12:29.930 align:middle line:90%
I know I need to leave you time.

01:12:29.930 --> 01:12:31.623 align:middle line:90%
I'm glad I see the surveys here.

01:12:31.623 --> 01:12:33.290 align:middle line:84%
I hope you haven't
been waiting outside.

01:12:33.290 --> 01:12:37.730 align:middle line:84%
But please take 10 minutes or
so and go ahead and fill out

01:12:37.730 --> 01:12:41.440 align:middle line:90%
the course evaluation survey.

01:12:41.440 --> 01:12:43.000 align:middle line:90%