WEBVTT 00:00:00.000 --> 00:00:04.022 align:middle line:90% 00:00:04.022 --> 00:00:05.480 align:middle line:84% JUDY HOYT: OK, maybe we'll go ahead 00:00:05.480 --> 00:00:08.438 align:middle line:84% and get started, at least with the announcements. 00:00:08.438 --> 00:00:09.980 align:middle line:84% Yeah, hopefully everybody's recovered 00:00:09.980 --> 00:00:12.090 align:middle line:90% from their Thanksgiving feast. 00:00:12.090 --> 00:00:15.980 align:middle line:84% And looks like people are sleeping in today. 00:00:15.980 --> 00:00:20.870 align:middle line:84% What I'm showing up here is the schedule to orient us. 00:00:20.870 --> 00:00:23.030 align:middle line:90% This is lecture 22. 00:00:23.030 --> 00:00:25.790 align:middle line:84% We'll talk about silicides, device contacts, 00:00:25.790 --> 00:00:28.670 align:middle line:84% and I've added in a new material this year 00:00:28.670 --> 00:00:30.320 align:middle line:90% on novel gate materials. 00:00:30.320 --> 00:00:32.750 align:middle line:90% And part of this is covered-- 00:00:32.750 --> 00:00:35.340 align:middle line:84% the first two topics are covered in chapter 11. 00:00:35.340 --> 00:00:36.930 align:middle line:84% And then we have one more lecture, 00:00:36.930 --> 00:00:40.190 align:middle line:84% which is on strained silicon and silicon germanium 00:00:40.190 --> 00:00:42.290 align:middle line:90% growth and processing. 00:00:42.290 --> 00:00:46.700 align:middle line:84% And then next week we have two class periods scheduled. 00:00:46.700 --> 00:00:49.190 align:middle line:84% There'll be four speakers in each. 00:00:49.190 --> 00:00:51.830 align:middle line:84% And those will be the oral reports 00:00:51.830 --> 00:00:55.460 align:middle line:84% and the student reports given on Tuesday and Thursday. 00:00:55.460 --> 00:00:59.300 align:middle line:84% And in fact, I have a slightly better version of this schedule, 00:00:59.300 --> 00:01:05.349 align:middle line:84% I think, in this Excel file, and this is posted up on the web, 00:01:05.349 --> 00:01:05.950 align:middle line:90% by the way. 00:01:05.950 --> 00:01:08.920 align:middle line:84% So on December 7th, we have these four speakers. 00:01:08.920 --> 00:01:13.210 align:middle line:84% We're going to hear short presentations, about 16 minutes 00:01:13.210 --> 00:01:16.510 align:middle line:84% each, from these four students on everything 00:01:16.510 --> 00:01:19.487 align:middle line:84% from high k going to diffusion and gallium arsenide. 00:01:19.487 --> 00:01:21.070 align:middle line:84% And then on the Thursday of the ninth, 00:01:21.070 --> 00:01:24.100 align:middle line:84% we have these four students scheduled. 00:01:24.100 --> 00:01:25.870 align:middle line:84% And I just want to remind people, 00:01:25.870 --> 00:01:27.850 align:middle line:84% if you're doing an oral report, you're 00:01:27.850 --> 00:01:32.800 align:middle line:84% expected to provide handouts, the same type of handout 00:01:32.800 --> 00:01:34.700 align:middle line:90% that I use during lecture. 00:01:34.700 --> 00:01:38.830 align:middle line:84% And if you need help in making Xerox copies, 00:01:38.830 --> 00:01:39.910 align:middle line:90% contact my assistant. 00:01:39.910 --> 00:01:42.767 align:middle line:84% Her contact information is published on the web. 00:01:42.767 --> 00:01:44.350 align:middle line:84% Make sure you get to her early enough. 00:01:44.350 --> 00:01:48.250 align:middle line:84% Don't give her the job the same day, that morning, 00:01:48.250 --> 00:01:50.932 align:middle line:84% but maybe the day before would be good. 00:01:50.932 --> 00:01:52.390 align:middle line:84% And also, if you're doing a written 00:01:52.390 --> 00:01:57.027 align:middle line:84% report they are due on Thursday, December 9 in class. 00:01:57.027 --> 00:01:59.110 align:middle line:84% If you have any questions about the final project, 00:01:59.110 --> 00:02:04.410 align:middle line:84% just please email me or contact me after class. 00:02:04.410 --> 00:02:08.190 align:middle line:84% OK, so that's the bookkeeping and to remind people 00:02:08.190 --> 00:02:09.419 align:middle line:90% about the final project. 00:02:09.419 --> 00:02:13.020 align:middle line:90% Let's go on and start-- 00:02:13.020 --> 00:02:16.410 align:middle line:90% we can start today's lecture. 00:02:16.410 --> 00:02:21.650 align:middle line:84% The notes for today's lecture are given in handout 36. 00:02:21.650 --> 00:02:25.700 align:middle line:84% And today we want to talk about a couple 00:02:25.700 --> 00:02:27.680 align:middle line:90% of devices, a couple of areas-- 00:02:27.680 --> 00:02:29.212 align:middle line:90% the formation of silicides. 00:02:29.212 --> 00:02:31.670 align:middle line:84% I've referred to silicides a number of times in the course, 00:02:31.670 --> 00:02:32.750 align:middle line:84% but we really haven't gotten a chance 00:02:32.750 --> 00:02:34.070 align:middle line:90% to talk about what they are. 00:02:34.070 --> 00:02:35.900 align:middle line:90% Now we'll find out. 00:02:35.900 --> 00:02:38.570 align:middle line:84% How we make contact, how we make the structures 00:02:38.570 --> 00:02:40.740 align:middle line:84% and make good, electrical contacts and the device. 00:02:40.740 --> 00:02:43.160 align:middle line:84% And as I mentioned, I've added a new module this year 00:02:43.160 --> 00:02:44.450 align:middle line:90% on novel gate materials. 00:02:44.450 --> 00:02:47.090 align:middle line:84% And we started some of that last time. 00:02:47.090 --> 00:02:49.130 align:middle line:84% So far, we've talked about how to get 00:02:49.130 --> 00:02:52.700 align:middle line:84% these insulating and doped regions inside the device. 00:02:52.700 --> 00:02:55.970 align:middle line:84% We've talked about oxidation, implantation, diffusion, 00:02:55.970 --> 00:03:00.470 align:middle line:84% thin film deposition, and how we etch structures. 00:03:00.470 --> 00:03:04.010 align:middle line:84% But at this point in the device fabrication of the seam laws 00:03:04.010 --> 00:03:06.800 align:middle line:84% flow, we need some way to make a good electrical contact. 00:03:06.800 --> 00:03:08.660 align:middle line:84% And I put good electrical contact in quotes 00:03:08.660 --> 00:03:11.420 align:middle line:90% because it's somewhat nebulous. 00:03:11.420 --> 00:03:13.340 align:middle line:84% But we'll see in this lecture what we mean 00:03:13.340 --> 00:03:14.690 align:middle line:90% by good electrical contact-- 00:03:14.690 --> 00:03:16.230 align:middle line:90% two doped regions. 00:03:16.230 --> 00:03:18.980 align:middle line:84% And so this lecture is kind of the first link 00:03:18.980 --> 00:03:20.850 align:middle line:84% to the backend technology course. 00:03:20.850 --> 00:03:22.392 align:middle line:84% The contact itself is still generally 00:03:22.392 --> 00:03:24.308 align:middle line:84% considered part of the frontend because you're 00:03:24.308 --> 00:03:25.560 align:middle line:90% contacting the silicon. 00:03:25.560 --> 00:03:28.350 align:middle line:84% And then beyond, that everything is 00:03:28.350 --> 00:03:32.640 align:middle line:84% in the 6.773, which is the backend technology. 00:03:32.640 --> 00:03:34.290 align:middle line:84% This is just a schematic I've shown 00:03:34.290 --> 00:03:37.080 align:middle line:84% a couple of different times to point out to you what 00:03:37.080 --> 00:03:39.120 align:middle line:90% I mean by the contact. 00:03:39.120 --> 00:03:40.680 align:middle line:84% You're familiar with this by now. 00:03:40.680 --> 00:03:44.980 align:middle line:84% We have the silicon source and the silicon heavily doped drain. 00:03:44.980 --> 00:03:46.290 align:middle line:90% Here's the gate material. 00:03:46.290 --> 00:03:50.490 align:middle line:84% And I need some way of making a contact 00:03:50.490 --> 00:03:53.250 align:middle line:84% between this electrical connection here, this metal 00:03:53.250 --> 00:03:55.780 align:middle line:90% line, and the silicon itself. 00:03:55.780 --> 00:03:59.220 align:middle line:84% And you can see that can consist of several different materials. 00:03:59.220 --> 00:04:02.490 align:middle line:84% In this particular picture, these sort 00:04:02.490 --> 00:04:05.370 align:middle line:84% of dark regions contacting the silicon 00:04:05.370 --> 00:04:06.900 align:middle line:84% are going to be made of silicide. 00:04:06.900 --> 00:04:09.780 align:middle line:84% And we'll talk today about how you fabricate those silicides. 00:04:09.780 --> 00:04:13.160 align:middle line:90% 00:04:13.160 --> 00:04:15.410 align:middle line:84% Let me also-- I want to talk about local interconnect. 00:04:15.410 --> 00:04:17.285 align:middle line:84% Sometimes the contacts themselves are also 00:04:17.285 --> 00:04:19.160 align:middle line:84% used for something called local interconnect. 00:04:19.160 --> 00:04:20.870 align:middle line:84% And I should point out here, this 00:04:20.870 --> 00:04:24.920 align:middle line:84% is an example of a local interconnect where 00:04:24.920 --> 00:04:29.540 align:middle line:84% I've got a contact region that is being used to interconnect, 00:04:29.540 --> 00:04:32.330 align:middle line:84% say, from one layer to the next, or locally 00:04:32.330 --> 00:04:35.390 align:middle line:84% from one part of the device to a neighboring device, 00:04:35.390 --> 00:04:36.980 align:middle line:90% but not across the whole chip. 00:04:36.980 --> 00:04:38.690 align:middle line:84% These are called global interconnects 00:04:38.690 --> 00:04:40.640 align:middle line:84% because these wires go potentially 00:04:40.640 --> 00:04:43.190 align:middle line:90% across the entire chip up here. 00:04:43.190 --> 00:04:45.170 align:middle line:84% But this is a local interconnect. 00:04:45.170 --> 00:04:48.940 align:middle line:84% It only extends over a very small distance. 00:04:48.940 --> 00:04:51.450 align:middle line:84% In fact, on slide number two of your handout, 00:04:51.450 --> 00:04:53.910 align:middle line:84% I've got an example of a local interconnect 00:04:53.910 --> 00:04:56.490 align:middle line:90% and what it might consist of. 00:04:56.490 --> 00:04:58.110 align:middle line:84% This is just the circuit schematic. 00:04:58.110 --> 00:05:00.600 align:middle line:84% If you have taken electrical engineering courses, 00:05:00.600 --> 00:05:02.310 align:middle line:84% you know this is a bipolar transistor 00:05:02.310 --> 00:05:04.140 align:middle line:90% with a base and the emitter. 00:05:04.140 --> 00:05:06.370 align:middle line:84% This little arrow represents the emitter region. 00:05:06.370 --> 00:05:08.040 align:middle line:84% And you see in this circuit schematic 00:05:08.040 --> 00:05:09.900 align:middle line:84% that the emitter of this transistor 00:05:09.900 --> 00:05:14.630 align:middle line:84% is connected by a wire to a resistor, r. 00:05:14.630 --> 00:05:16.130 align:middle line:84% Well, this is the circuit schematic. 00:05:16.130 --> 00:05:19.400 align:middle line:84% And below is the actual implementation of this circuit 00:05:19.400 --> 00:05:20.900 align:middle line:90% in silicon. 00:05:20.900 --> 00:05:26.030 align:middle line:84% And in fact, if you recognize that this is an NPN device, 00:05:26.030 --> 00:05:28.820 align:middle line:84% and this little n region right here is the emitter-- 00:05:28.820 --> 00:05:32.000 align:middle line:84% this is the P-type base as shown here in red, 00:05:32.000 --> 00:05:33.590 align:middle line:84% and this is the N-type collector. 00:05:33.590 --> 00:05:36.410 align:middle line:84% And what you see here is this emitter region 00:05:36.410 --> 00:05:39.950 align:middle line:90% has a metal contact to it. 00:05:39.950 --> 00:05:44.370 align:middle line:84% And it is connected locally to this P-type tube region, 00:05:44.370 --> 00:05:46.110 align:middle line:90% which is, in fact, a resistor. 00:05:46.110 --> 00:05:51.020 align:middle line:84% This is a resistor because the current can flow from this metal 00:05:51.020 --> 00:05:54.740 align:middle line:84% contact here through the P-type region-- it has a certain sheet 00:05:54.740 --> 00:05:56.510 align:middle line:84% resistance, or a certain resistance-- 00:05:56.510 --> 00:05:58.200 align:middle line:90% and out this other end. 00:05:58.200 --> 00:06:02.693 align:middle line:84% So this is an example of using a very short metal wire. 00:06:02.693 --> 00:06:04.610 align:middle line:84% Might even end up being silicide or something. 00:06:04.610 --> 00:06:06.890 align:middle line:84% A very short metal wire locally on the chip 00:06:06.890 --> 00:06:09.770 align:middle line:84% to do interconnect from, say, one neighboring 00:06:09.770 --> 00:06:11.330 align:middle line:84% device-- in this case a transistor-- 00:06:11.330 --> 00:06:15.950 align:middle line:84% to another neighboring device, a resistor. 00:06:15.950 --> 00:06:18.010 align:middle line:84% So that's what we mean by local interconnect. 00:06:18.010 --> 00:06:20.620 align:middle line:90% 00:06:20.620 --> 00:06:22.150 align:middle line:84% Talk a little bit about historically 00:06:22.150 --> 00:06:23.530 align:middle line:90% about how contacts were made. 00:06:23.530 --> 00:06:25.930 align:middle line:90% And this is shown on slide 3. 00:06:25.930 --> 00:06:30.760 align:middle line:84% In the early days, if this was the drain or the source 00:06:30.760 --> 00:06:35.350 align:middle line:84% of a transistor, a MOSFET, people simply 00:06:35.350 --> 00:06:38.530 align:middle line:84% used aluminum, which was the metal of choice, directly 00:06:38.530 --> 00:06:41.320 align:middle line:84% on silicon to make both the contacts 00:06:41.320 --> 00:06:42.815 align:middle line:90% and the interconnect material. 00:06:42.815 --> 00:06:43.690 align:middle line:90% So it was convenient. 00:06:43.690 --> 00:06:45.730 align:middle line:84% You could contact the silicon with aluminum, 00:06:45.730 --> 00:06:47.950 align:middle line:84% and then you could run wires along the chip. 00:06:47.950 --> 00:06:50.860 align:middle line:84% And that could interconnect the various devices. 00:06:50.860 --> 00:06:54.010 align:middle line:84% The advantages of aluminum has a low resistivity. 00:06:54.010 --> 00:06:57.160 align:middle line:84% It's the second lowest of all the metal candidates, copper 00:06:57.160 --> 00:06:59.350 align:middle line:90% being the lowest. 00:06:59.350 --> 00:07:04.790 align:middle line:84% And it has very good adhesion to silicon and to silicon dioxide. 00:07:04.790 --> 00:07:09.370 align:middle line:84% It's a very stable metal, and it makes good electrical contact 00:07:09.370 --> 00:07:11.530 align:middle line:84% to heavily doped silicon, as long as the silicon is 00:07:11.530 --> 00:07:13.690 align:middle line:90% heavily doped. 00:07:13.690 --> 00:07:15.230 align:middle line:90% Why does it do that? 00:07:15.230 --> 00:07:18.070 align:middle line:84% Well, aluminum tends to reduce any native oxide 00:07:18.070 --> 00:07:18.880 align:middle line:90% present on silicon. 00:07:18.880 --> 00:07:22.042 align:middle line:84% You know if you take a silicon wafer and you do an HF dip, 00:07:22.042 --> 00:07:23.500 align:middle line:84% you'll get rid of any native oxide. 00:07:23.500 --> 00:07:25.450 align:middle line:84% But if you let it sit for any period-- 00:07:25.450 --> 00:07:27.880 align:middle line:84% a few minutes, an hour or so-- you 00:07:27.880 --> 00:07:31.360 align:middle line:84% grow a thin, natural native oxide, SiO2, 00:07:31.360 --> 00:07:32.890 align:middle line:90% at room temperature on silicon. 00:07:32.890 --> 00:07:36.170 align:middle line:84% May only be about 10 angstroms thick, but it's still there. 00:07:36.170 --> 00:07:37.960 align:middle line:84% The nice thing about aluminum is that it 00:07:37.960 --> 00:07:42.130 align:middle line:84% tends to reduce or eat up that oxide on the silicon, 00:07:42.130 --> 00:07:46.290 align:middle line:84% and it forms a very thin layer of Al2O3. 00:07:46.290 --> 00:07:49.230 align:middle line:84% But this layer is quite thin, and the aluminum itself 00:07:49.230 --> 00:07:51.540 align:middle line:90% can diffuse right through it. 00:07:51.540 --> 00:07:56.150 align:middle line:84% So this enables you to form a very good electrical contact 00:07:56.150 --> 00:07:59.900 align:middle line:84% without having an intervening layer of oxide. 00:07:59.900 --> 00:08:03.740 align:middle line:84% Some metals you might put down and they 00:08:03.740 --> 00:08:06.675 align:middle line:84% won't eat through the silicon native oxide, the SiO2. 00:08:06.675 --> 00:08:08.300 align:middle line:84% And then they'll just be sitting there, 00:08:08.300 --> 00:08:09.890 align:middle line:84% and you won't get a good electrical contact. 00:08:09.890 --> 00:08:11.570 align:middle line:84% Aluminum has this property that eats 00:08:11.570 --> 00:08:16.760 align:middle line:84% through that little native oxide so you get a good contact. 00:08:16.760 --> 00:08:19.550 align:middle line:84% So it was a convenient and a good material 00:08:19.550 --> 00:08:21.155 align:middle line:84% for people to use for many years. 00:08:21.155 --> 00:08:24.050 align:middle line:90% 00:08:24.050 --> 00:08:26.800 align:middle line:84% Slide 4 just shows you some of the basic properties 00:08:26.800 --> 00:08:30.280 align:middle line:84% of interconnect materials just so you get oriented. 00:08:30.280 --> 00:08:31.540 align:middle line:90% Here is aluminum on the top. 00:08:31.540 --> 00:08:34.000 align:middle line:84% Again, one of the most popular for many years. 00:08:34.000 --> 00:08:36.700 align:middle line:84% The resistivity is listed in the second column, 00:08:36.700 --> 00:08:39.940 align:middle line:84% somewhere around 2.7 to 3 micro ohm 00:08:39.940 --> 00:08:41.919 align:middle line:90% centimeter for the resistivity. 00:08:41.919 --> 00:08:45.230 align:middle line:84% Again, the resistivity is a property of the material. 00:08:45.230 --> 00:08:47.750 align:middle line:84% And the last column shows the melting point. 00:08:47.750 --> 00:08:50.660 align:middle line:84% So it is a low melting point material. 00:08:50.660 --> 00:08:52.780 align:middle line:84% The only other metal of consequence 00:08:52.780 --> 00:08:55.510 align:middle line:84% that has a lower resistivity is copper, which is shown here, 00:08:55.510 --> 00:08:57.670 align:middle line:90% the third one, the third row. 00:08:57.670 --> 00:09:00.700 align:middle line:84% That's about 1.7 to 2 micron centimeter. 00:09:00.700 --> 00:09:03.500 align:middle line:84% Copper has a much high melting point. 00:09:03.500 --> 00:09:07.700 align:middle line:84% Copper has other difficulties associated with its integration. 00:09:07.700 --> 00:09:10.470 align:middle line:84% Copper, if it gets into silicon, can be a deep level. 00:09:10.470 --> 00:09:13.340 align:middle line:84% So it can cause lifetime problems. 00:09:13.340 --> 00:09:16.290 align:middle line:84% Copper oxidizes very readily, even at room temperature. 00:09:16.290 --> 00:09:20.640 align:middle line:84% So you need to protect it, if you're all aware of that. 00:09:20.640 --> 00:09:24.800 align:middle line:84% And copper is more difficult to deposit than aluminum. 00:09:24.800 --> 00:09:27.485 align:middle line:84% But copper is the material of choice for today's interconnect. 00:09:27.485 --> 00:09:31.293 align:middle line:84% I think I brought a wafer from Intel about halfway 00:09:31.293 --> 00:09:33.710 align:middle line:84% through the course, a 12-inch wafer, and showed it to you. 00:09:33.710 --> 00:09:36.020 align:middle line:84% And you noticed it was all pretty copper colored. 00:09:36.020 --> 00:09:39.260 align:middle line:84% It's because the modern interconnect material is copper. 00:09:39.260 --> 00:09:41.060 align:middle line:84% A few places are still using aluminum. 00:09:41.060 --> 00:09:42.860 align:middle line:84% Aluminum was historically what's used. 00:09:42.860 --> 00:09:46.850 align:middle line:84% Copper was introduced in research in the mid 80s 00:09:46.850 --> 00:09:50.030 align:middle line:84% and in production about 10 years past that. 00:09:50.030 --> 00:09:54.780 align:middle line:90% 00:09:54.780 --> 00:09:58.380 align:middle line:84% On slide 4, I'm showing some basic physics 00:09:58.380 --> 00:10:00.430 align:middle line:84% that you may or may not be familiar with. 00:10:00.430 --> 00:10:02.365 align:middle line:84% But you need to understand the basics of it 00:10:02.365 --> 00:10:04.740 align:middle line:84% in order to understand what we mean by a good electrical. 00:10:04.740 --> 00:10:09.150 align:middle line:84% Contact their contacts can, to a semiconductor, 00:10:09.150 --> 00:10:12.210 align:middle line:84% can be sort of divided into roughly two classes. 00:10:12.210 --> 00:10:16.680 align:middle line:84% There's an ohmic contact and a Schottky contact. 00:10:16.680 --> 00:10:18.690 align:middle line:84% A Schottky contact is shown here. 00:10:18.690 --> 00:10:20.190 align:middle line:84% And if you just look at the current, 00:10:20.190 --> 00:10:22.440 align:middle line:84% this little schematic shows the current 00:10:22.440 --> 00:10:25.470 align:middle line:84% that flows in the device, so through the device, 00:10:25.470 --> 00:10:27.690 align:middle line:84% as a function of the voltage that you apply. 00:10:27.690 --> 00:10:31.320 align:middle line:90% Schottky contact is a rectifier. 00:10:31.320 --> 00:10:34.230 align:middle line:84% It is when you apply a large voltage 00:10:34.230 --> 00:10:35.940 align:middle line:84% in one direction, the reverse direction, 00:10:35.940 --> 00:10:37.510 align:middle line:90% not much current flows. 00:10:37.510 --> 00:10:41.700 align:middle line:84% So that's not a very useful way to make a contact to a device. 00:10:41.700 --> 00:10:43.867 align:middle line:84% If you apply a small voltage in the other direction, 00:10:43.867 --> 00:10:45.283 align:middle line:84% you get a little current, and then 00:10:45.283 --> 00:10:47.250 align:middle line:84% you apply above a certain threshold voltage, 00:10:47.250 --> 00:10:49.090 align:middle line:90% and you get a lot of current. 00:10:49.090 --> 00:10:50.820 align:middle line:90% It's basically a diode. 00:10:50.820 --> 00:10:55.020 align:middle line:84% And the current transport is by this sort 00:10:55.020 --> 00:10:58.180 align:middle line:84% of thermionic or thermal emission over this barrier. 00:10:58.180 --> 00:11:00.120 align:middle line:84% So this is not considered desirable for making 00:11:00.120 --> 00:11:01.860 align:middle line:90% a good contact. 00:11:01.860 --> 00:11:06.390 align:middle line:84% An ohmic contact on the other side, or a tunneling contact, 00:11:06.390 --> 00:11:08.605 align:middle line:84% occurs when you can actually tunnel right 00:11:08.605 --> 00:11:09.480 align:middle line:90% through this barrier. 00:11:09.480 --> 00:11:12.350 align:middle line:84% The barrier is so thin that you can actually 00:11:12.350 --> 00:11:13.350 align:middle line:90% tunnel right through it. 00:11:13.350 --> 00:11:15.730 align:middle line:84% The depletion region is very thin. 00:11:15.730 --> 00:11:19.500 align:middle line:84% And if you do make high doping right near the metal, 00:11:19.500 --> 00:11:22.320 align:middle line:84% you can reduce this depletion layer width. 00:11:22.320 --> 00:11:24.450 align:middle line:90% And it enables this tunneling. 00:11:24.450 --> 00:11:26.890 align:middle line:84% And so if you look at the current voltage 00:11:26.890 --> 00:11:29.560 align:middle line:84% characteristics-- so current plotted on the y-axis, 00:11:29.560 --> 00:11:31.010 align:middle line:90% voltage on the x-axis-- 00:11:31.010 --> 00:11:32.680 align:middle line:84% you see it's very symmetrical, and you 00:11:32.680 --> 00:11:35.350 align:middle line:84% get a very, very high current for a very small voltage 00:11:35.350 --> 00:11:36.487 align:middle line:90% in either direction. 00:11:36.487 --> 00:11:37.820 align:middle line:90% So this is considered desirable. 00:11:37.820 --> 00:11:38.695 align:middle line:90% This is what we want. 00:11:38.695 --> 00:11:40.610 align:middle line:90% We want that ohmic contact. 00:11:40.610 --> 00:11:42.800 align:middle line:84% And it tends to happen, particularly 00:11:42.800 --> 00:11:44.930 align:middle line:84% with aluminum and most metals, if you make 00:11:44.930 --> 00:11:46.745 align:middle line:90% the surface doping very high. 00:11:46.745 --> 00:11:50.520 align:middle line:90% 00:11:50.520 --> 00:11:52.800 align:middle line:84% A concept that we want to talk about that 00:11:52.800 --> 00:11:56.910 align:middle line:84% is shown here on slide 6 is called the specific contact 00:11:56.910 --> 00:11:57.780 align:middle line:90% resistivity. 00:11:57.780 --> 00:11:59.280 align:middle line:84% And we usually use the Greek letter 00:11:59.280 --> 00:12:04.090 align:middle line:84% rho sub C. The definition of it is given here. 00:12:04.090 --> 00:12:07.230 align:middle line:84% It's defined as being equivalent to the derivative 00:12:07.230 --> 00:12:10.590 align:middle line:84% of the voltage current density characteristic 00:12:10.590 --> 00:12:12.270 align:middle line:84% at a metal semiconductor contacts. 00:12:12.270 --> 00:12:19.120 align:middle line:84% So it's partial v, the voltage, by partial j, basically. 00:12:19.120 --> 00:12:23.880 align:middle line:84% And so we usually assume a structure 00:12:23.880 --> 00:12:26.670 align:middle line:84% where the current density is uniform across some contact 00:12:26.670 --> 00:12:28.200 align:middle line:90% area. 00:12:28.200 --> 00:12:31.990 align:middle line:84% Then you can calculate the contact resistance R in ohms. 00:12:31.990 --> 00:12:35.910 align:middle line:84% So R would have the units of ohms from the specific contact 00:12:35.910 --> 00:12:38.590 align:middle line:84% resistivity by the following equation. 00:12:38.590 --> 00:12:41.040 align:middle line:84% The resistance of a given contact in ohms 00:12:41.040 --> 00:12:43.410 align:middle line:84% is just the voltage divided by the current flowing 00:12:43.410 --> 00:12:45.030 align:middle line:90% through that contact. 00:12:45.030 --> 00:12:47.970 align:middle line:84% And you can calculate it by rho sub C, 00:12:47.970 --> 00:12:51.730 align:middle line:84% which typically has units of ohm centimeters squared or ohm 00:12:51.730 --> 00:12:54.580 align:middle line:84% micron squared-- so it's got a units of resistance times 00:12:54.580 --> 00:12:55.180 align:middle line:90% an area-- 00:12:55.180 --> 00:12:58.480 align:middle line:84% and divided by the area of the contact. 00:12:58.480 --> 00:13:01.810 align:middle line:84% So if someone tells you, oh I've made a contact. 00:13:01.810 --> 00:13:05.560 align:middle line:84% It has a certain specific contact resistivity, 00:13:05.560 --> 00:13:07.960 align:middle line:84% 10 to the -7 ohm centimeter squared, 00:13:07.960 --> 00:13:11.430 align:middle line:84% then you can design your contact area 00:13:11.430 --> 00:13:16.260 align:middle line:84% as you need to to get the right contact resistance in ohms. 00:13:16.260 --> 00:13:18.780 align:middle line:84% And basically what this tells you is-- and you notice you 00:13:18.780 --> 00:13:22.650 align:middle line:84% it's the total resistance of a contact in ohms 00:13:22.650 --> 00:13:24.550 align:middle line:84% is inversely proportional to area. 00:13:24.550 --> 00:13:27.120 align:middle line:84% So if I make a smaller contact area 00:13:27.120 --> 00:13:29.520 align:middle line:84% for a given specific contact resistivity, 00:13:29.520 --> 00:13:31.275 align:middle line:84% you're going to have a higher resistance. 00:13:31.275 --> 00:13:33.150 align:middle line:84% And this is a problem if I'm scaling devices. 00:13:33.150 --> 00:13:35.960 align:middle line:84% If I'm packing more and more devices on the chip, 00:13:35.960 --> 00:13:38.490 align:middle line:84% it means I want to make the total area occupied 00:13:38.490 --> 00:13:40.470 align:middle line:90% by every device smaller. 00:13:40.470 --> 00:13:43.240 align:middle line:84% That means I need to make the contact area smaller. 00:13:43.240 --> 00:13:46.435 align:middle line:84% But if I leave the contact resistivity the same, 00:13:46.435 --> 00:13:48.060 align:middle line:84% I don't do anything different about how 00:13:48.060 --> 00:13:50.910 align:middle line:84% I make the contact, then as I'm scaling these devices, 00:13:50.910 --> 00:13:52.350 align:middle line:84% of course, the area of the contact 00:13:52.350 --> 00:13:56.100 align:middle line:84% is going down to get more of these devices on a chip. 00:13:56.100 --> 00:14:01.020 align:middle line:84% That means the resistance is going up as devices are scaled. 00:14:01.020 --> 00:14:04.020 align:middle line:84% And we'll see some specific numbers on this. 00:14:04.020 --> 00:14:06.990 align:middle line:84% This is a problem as we scale, unless we scale roh sub c, 00:14:06.990 --> 00:14:10.110 align:middle line:84% unless we do something to make better contacts as we 00:14:10.110 --> 00:14:13.080 align:middle line:84% scale devices, just because of this geometric factor. 00:14:13.080 --> 00:14:16.590 align:middle line:84% As I make the area the current goes through smaller, 00:14:16.590 --> 00:14:18.525 align:middle line:84% the resistance of that contact goes up. 00:14:18.525 --> 00:14:22.770 align:middle line:90% 00:14:22.770 --> 00:14:25.410 align:middle line:84% So the second type of contact-- again, 00:14:25.410 --> 00:14:27.660 align:middle line:84% this is one that's not generally considered desirable, 00:14:27.660 --> 00:14:29.868 align:middle line:84% but we need to understand a little bit of the physics 00:14:29.868 --> 00:14:30.480 align:middle line:90% of it-- 00:14:30.480 --> 00:14:32.630 align:middle line:90% is a Schottky contact. 00:14:32.630 --> 00:14:35.870 align:middle line:84% And the energy band diagram for that 00:14:35.870 --> 00:14:39.020 align:middle line:84% is shown here, where the metal is 00:14:39.020 --> 00:14:42.470 align:middle line:84% on the left and the semiconductor is on the right. 00:14:42.470 --> 00:14:46.250 align:middle line:84% And a Schottky contact is governed by thermionic emission. 00:14:46.250 --> 00:14:49.160 align:middle line:84% So it's a thermionic process emitting 00:14:49.160 --> 00:14:51.870 align:middle line:90% carriers over this barrier. 00:14:51.870 --> 00:14:54.140 align:middle line:84% And we know from the Richardson equation 00:14:54.140 --> 00:14:57.290 align:middle line:84% we can write thermionic emission current density 00:14:57.290 --> 00:15:01.160 align:middle line:84% J as being proportional to the temperature 00:15:01.160 --> 00:15:03.140 align:middle line:90% squared, some constant a star. 00:15:03.140 --> 00:15:05.810 align:middle line:84% But most importantly, it goes exponentially 00:15:05.810 --> 00:15:07.100 align:middle line:90% like the barrier height. 00:15:07.100 --> 00:15:10.220 align:middle line:84% So it's e to the minus q phi B over kT 00:15:10.220 --> 00:15:14.060 align:middle line:84% where the barrier height is just the band bending. 00:15:14.060 --> 00:15:17.840 align:middle line:84% It's this barrier between the Fermi level in the semiconductor 00:15:17.840 --> 00:15:21.483 align:middle line:84% and the Fermi level in the metal. 00:15:21.483 --> 00:15:23.150 align:middle line:84% So that's going to tend to be a property 00:15:23.150 --> 00:15:24.567 align:middle line:84% of the doping in the semiconductor 00:15:24.567 --> 00:15:28.820 align:middle line:84% and what kind of metal you put on it. 00:15:28.820 --> 00:15:30.430 align:middle line:90% So if we take this equation. 00:15:30.430 --> 00:15:32.343 align:middle line:84% this current equation, which we know, 00:15:32.343 --> 00:15:33.760 align:middle line:84% the current voltage characteristic 00:15:33.760 --> 00:15:36.400 align:middle line:84% is exponential in the applied voltage. 00:15:36.400 --> 00:15:39.850 align:middle line:84% And we just use the definition of roh sub C, 00:15:39.850 --> 00:15:43.930 align:middle line:84% you can calculate, as shown on the bottom here of slide 7, 00:15:43.930 --> 00:15:46.810 align:middle line:84% what the specific contact resistivity should look 00:15:46.810 --> 00:15:47.980 align:middle line:90% like for a Schottky barrier. 00:15:47.980 --> 00:15:49.450 align:middle line:84% And you see it goes exponentially, 00:15:49.450 --> 00:15:51.500 align:middle line:90% like the barrier height. 00:15:51.500 --> 00:15:57.620 align:middle line:84% So if we change that barrier height, we can change rho sub C. 00:15:57.620 --> 00:16:04.040 align:middle line:84% So what we do in practice is we look at that equation 00:16:04.040 --> 00:16:06.230 align:middle line:84% and we try to get into a different regime. 00:16:06.230 --> 00:16:07.760 align:middle line:84% Instead of being in the regime where 00:16:07.760 --> 00:16:10.910 align:middle line:84% we're dominated by tunneling over this barrier 00:16:10.910 --> 00:16:13.370 align:middle line:84% by thermionic emission, rather, excuse me, 00:16:13.370 --> 00:16:16.280 align:middle line:84% over the barrier, if we make the barrier distance really 00:16:16.280 --> 00:16:19.820 align:middle line:84% narrow, really small, you know from your quantum mechanics 00:16:19.820 --> 00:16:23.000 align:middle line:84% classes that you can actually get quantum mechanical tunneling 00:16:23.000 --> 00:16:24.810 align:middle line:90% through the barrier. 00:16:24.810 --> 00:16:28.880 align:middle line:84% So here on slide 8, what I've shown is a tunneling contact. 00:16:28.880 --> 00:16:33.570 align:middle line:84% It's a Schottky contact in the limit of very, very high doping. 00:16:33.570 --> 00:16:37.460 align:middle line:84% So we form these-- you see we still have this barrier, phi B. 00:16:37.460 --> 00:16:39.560 align:middle line:84% But the distance, the depletion layer 00:16:39.560 --> 00:16:42.560 align:middle line:84% thickness in the semiconductor, is very, very small. 00:16:42.560 --> 00:16:46.710 align:middle line:84% And that happens when you make the doping high. 00:16:46.710 --> 00:16:48.292 align:middle line:84% So in fact, for a tunneling contact, 00:16:48.292 --> 00:16:50.000 align:middle line:84% if you go back to your quantum mechanics, 00:16:50.000 --> 00:16:54.350 align:middle line:84% you know if you have a certain barrier height, phi B, 00:16:54.350 --> 00:17:00.480 align:middle line:84% and a certain barrier thickness XD, 00:17:00.480 --> 00:17:02.460 align:middle line:84% that the tunneling current is exponentially 00:17:02.460 --> 00:17:03.877 align:middle line:84% dependent on those two quantities. 00:17:03.877 --> 00:17:06.359 align:middle line:90% It looks something like this. 00:17:06.359 --> 00:17:08.329 align:middle line:84% So how do I make the depletion layer thickness 00:17:08.329 --> 00:17:12.050 align:middle line:84% small in the semiconductor when I put a metal contact to it? 00:17:12.050 --> 00:17:13.819 align:middle line:84% Well, again, if you're going back 00:17:13.819 --> 00:17:15.920 align:middle line:84% to some of your basic electrostatics, 00:17:15.920 --> 00:17:19.940 align:middle line:84% XD is inversely proportional to the doping, or the square root 00:17:19.940 --> 00:17:21.020 align:middle line:90% of the doping. 00:17:21.020 --> 00:17:23.660 align:middle line:84% So all I need to do to make XD small is 00:17:23.660 --> 00:17:25.579 align:middle line:84% to pump up this doping very high, 00:17:25.579 --> 00:17:29.010 align:middle line:90% the doping in the semiconductor. 00:17:29.010 --> 00:17:34.310 align:middle line:84% So when the doping is high enough, XD will become small. 00:17:34.310 --> 00:17:37.040 align:middle line:84% And then when XD gets less than about, 00:17:37.040 --> 00:17:40.430 align:middle line:84% say, 2 nanometers or so in this equation, 00:17:40.430 --> 00:17:43.910 align:middle line:84% you get a very large tunneling current, basically. 00:17:43.910 --> 00:17:47.030 align:middle line:84% So what people do in practice is you dope very heavily 00:17:47.030 --> 00:17:49.850 align:middle line:84% above, say, above mid 10 of the 19th, 00:17:49.850 --> 00:17:51.800 align:middle line:84% you get quantum mechanical tunneling. 00:17:51.800 --> 00:17:53.870 align:middle line:84% And that's really what's dominating. 00:17:53.870 --> 00:17:57.860 align:middle line:84% So if you put these numbers and in here 00:17:57.860 --> 00:18:00.650 align:middle line:84% and you look at the definition of the specific contact 00:18:00.650 --> 00:18:02.720 align:middle line:84% resistivity, you get an equation like what's 00:18:02.720 --> 00:18:05.250 align:middle line:84% shown at the bottom of page 8 here. 00:18:05.250 --> 00:18:07.350 align:middle line:84% And you can see, again, it depends exponentially 00:18:07.350 --> 00:18:10.923 align:middle line:84% on the barrier height and inversely 00:18:10.923 --> 00:18:12.090 align:middle line:90% exponentially on the doping. 00:18:12.090 --> 00:18:15.370 align:middle line:84% So for low contact resistivity, to get this number down, 00:18:15.370 --> 00:18:16.710 align:middle line:90% I need a small barrier. 00:18:16.710 --> 00:18:19.920 align:middle line:84% So you would choose a particular metal that gives you 00:18:19.920 --> 00:18:21.750 align:middle line:84% a relatively small barrier height, phi B. 00:18:21.750 --> 00:18:24.150 align:middle line:84% And you need, most importantly, very high doping. 00:18:24.150 --> 00:18:27.660 align:middle line:84% So you need to pump up the doping as high as possible. 00:18:27.660 --> 00:18:29.580 align:middle line:84% And then you will get an IV characteristic 00:18:29.580 --> 00:18:30.795 align:middle line:90% that is essentially ohmic. 00:18:30.795 --> 00:18:34.480 align:middle line:90% 00:18:34.480 --> 00:18:41.110 align:middle line:84% So here I'm just doing a simple calculation on slide 9. 00:18:41.110 --> 00:18:44.850 align:middle line:84% Here's an example if we use the expression 00:18:44.850 --> 00:18:48.240 align:middle line:84% for the specific contact resistivity at very high doping 00:18:48.240 --> 00:18:50.710 align:middle line:84% levels where we have tunneling dominate. 00:18:50.710 --> 00:18:52.830 align:middle line:84% So we can write that expression that I just 00:18:52.830 --> 00:18:56.130 align:middle line:84% showed on the prior page saying that rho C is 00:18:56.130 --> 00:18:58.410 align:middle line:84% rho C zero, some pre-exponential, 00:18:58.410 --> 00:19:02.390 align:middle line:84% times the exponential dependence on phi B and D, 00:19:02.390 --> 00:19:08.420 align:middle line:84% and where this exponential multiplier 00:19:08.420 --> 00:19:12.190 align:middle line:84% C1 is given by this number, 7 times 10 to the 10th. 00:19:12.190 --> 00:19:15.490 align:middle line:84% So now let's say I assume I have a metal semiconductor 00:19:15.490 --> 00:19:19.960 align:middle line:84% contact where the barrier height is 0.6 electron volts. 00:19:19.960 --> 00:19:24.803 align:middle line:84% And rho C zero, this number, is about 10 to the minus 7 ohm-- 00:19:24.803 --> 00:19:26.470 align:middle line:84% that's a little hard to read, but that's 00:19:26.470 --> 00:19:30.360 align:middle line:84% ohm centimeter squared for an aluminum and silicon contact. 00:19:30.360 --> 00:19:34.950 align:middle line:84% So the question is if I change the doping from 1e19 to 1e20 00:19:34.950 --> 00:19:37.920 align:middle line:84% by a factor of 10, how much does rho C go down? 00:19:37.920 --> 00:19:40.702 align:middle line:84% Just to give us an example of how much you benefit yourself. 00:19:40.702 --> 00:19:42.660 align:middle line:84% And again, this is an exponential relationship. 00:19:42.660 --> 00:19:44.800 align:middle line:90% So you expect a big change. 00:19:44.800 --> 00:19:47.730 align:middle line:84% So in this case, the first case, I have a doping of 10 00:19:47.730 --> 00:19:48.570 align:middle line:90% to the 19th. 00:19:48.570 --> 00:19:50.040 align:middle line:90% You plug in all these numbers. 00:19:50.040 --> 00:19:52.080 align:middle line:84% You put in the square root of 10 of 19 down here 00:19:52.080 --> 00:19:55.380 align:middle line:84% and you get a RHO C of about 6 times 10 00:19:55.380 --> 00:19:59.090 align:middle line:84% to the -2 ohm centimeter squared. 00:19:59.090 --> 00:20:00.840 align:middle line:84% It's a pretty big number, as it turns out, 00:20:00.840 --> 00:20:04.830 align:middle line:84% if you plug in a standard size of a contact on a silicon chip. 00:20:04.830 --> 00:20:06.420 align:middle line:90% That's a 10 to the 19. 00:20:06.420 --> 00:20:08.800 align:middle line:84% At 10 of a 20, you do the same sort of thing, 00:20:08.800 --> 00:20:12.040 align:middle line:84% and you do the math, and now you get about 6 times 10 to the -6 00:20:12.040 --> 00:20:13.780 align:middle line:90% ohm centimeter squared. 00:20:13.780 --> 00:20:17.370 align:middle line:84% So that's about a factor of 9,000 lower. 00:20:17.370 --> 00:20:20.640 align:middle line:84% So it changed by almost four orders of magnitude, the contact 00:20:20.640 --> 00:20:25.560 align:middle line:84% resistivity, just by upping the doping by a factor of 10. 00:20:25.560 --> 00:20:28.090 align:middle line:84% She got four orders of magnitude. 00:20:28.090 --> 00:20:31.890 align:middle line:90% So that's dramatic difference. 00:20:31.890 --> 00:20:33.462 align:middle line:84% So this tells you, you need to have-- 00:20:33.462 --> 00:20:35.670 align:middle line:84% if you're going to get reasonable contacts in silicon 00:20:35.670 --> 00:20:40.015 align:middle line:84% technology, unless you want huge devices where the whole chip is 00:20:40.015 --> 00:20:42.390 align:middle line:84% dominated by contacts, which is ridiculous-- you won't be 00:20:42.390 --> 00:20:43.920 align:middle line:84% able to get enough devices on your chip-- 00:20:43.920 --> 00:20:46.087 align:middle line:84% you're going to have to get the doping in the source 00:20:46.087 --> 00:20:49.800 align:middle line:84% drain regions high, at least 10 to the 20 or higher. 00:20:49.800 --> 00:20:53.910 align:middle line:84% This number itself is still considered a little bit 00:20:53.910 --> 00:20:56.880 align:middle line:84% on the too-high of a side for a contact resistance. 00:20:56.880 --> 00:20:59.360 align:middle line:84% But it's just interesting to look at these numbers. 00:20:59.360 --> 00:21:02.350 align:middle line:84% And in fact, I've taken on the next slide figure 00:21:02.350 --> 00:21:03.783 align:middle line:90% 11-7 from your text. 00:21:03.783 --> 00:21:05.200 align:middle line:84% And you can see that these numbers 00:21:05.200 --> 00:21:07.700 align:middle line:84% are in pretty good agreement with what people have measured. 00:21:07.700 --> 00:21:10.060 align:middle line:90% 00:21:10.060 --> 00:21:12.550 align:middle line:90% Here on slide 10-- 00:21:12.550 --> 00:21:17.560 align:middle line:84% I took this from your text that shows the contact resistivity 00:21:17.560 --> 00:21:21.880 align:middle line:84% in ohm centimeter squared as a function of doping here. 00:21:21.880 --> 00:21:25.390 align:middle line:84% And you can see the doping up on this scale here 00:21:25.390 --> 00:21:28.160 align:middle line:90% for two different metal systems. 00:21:28.160 --> 00:21:30.670 align:middle line:84% One is the aluminum contact to N-type silicon, 00:21:30.670 --> 00:21:33.460 align:middle line:84% and the other is platinum silicide to N-type silicon. 00:21:33.460 --> 00:21:37.090 align:middle line:84% And the data is the bullets that people have measured, 00:21:37.090 --> 00:21:39.040 align:middle line:84% like these open squares are for aluminum 00:21:39.040 --> 00:21:40.510 align:middle line:90% contacting N-type silicon. 00:21:40.510 --> 00:21:45.550 align:middle line:84% And the theoretical curve is shown here with the solid line. 00:21:45.550 --> 00:21:48.220 align:middle line:84% There you can see there's reasonable agreement. 00:21:48.220 --> 00:21:52.210 align:middle line:84% Notice here this is a log-log scale. 00:21:52.210 --> 00:21:53.980 align:middle line:84% So we're getting an exponential dependence 00:21:53.980 --> 00:21:55.430 align:middle line:90% in the heavily doped regime. 00:21:55.430 --> 00:21:58.780 align:middle line:84% So again, as doping is increasing to the left on this 00:21:58.780 --> 00:21:59.600 align:middle line:90% x-axis-- 00:21:59.600 --> 00:22:01.690 align:middle line:84% so here's a doping of 10 of a 19th. 00:22:01.690 --> 00:22:03.220 align:middle line:90% Here's a doping of 10 of the 20. 00:22:03.220 --> 00:22:05.890 align:middle line:84% And we see a number of orders of magnitude. 00:22:05.890 --> 00:22:08.230 align:middle line:84% Basically force of magnitude drop 00:22:08.230 --> 00:22:11.540 align:middle line:84% as they go from 10 to 19 to 10 to the 20. 00:22:11.540 --> 00:22:13.195 align:middle line:84% So you say, OK, that's not a big deal. 00:22:13.195 --> 00:22:15.460 align:middle line:84% I just keep increasing the doping in my source drain 00:22:15.460 --> 00:22:17.770 align:middle line:90% regions over time. 00:22:17.770 --> 00:22:20.580 align:middle line:84% The problem is we know that there are electrical solubility 00:22:20.580 --> 00:22:21.480 align:middle line:90% limits. 00:22:21.480 --> 00:22:24.660 align:middle line:84% We cannot just arbitrarily keep increasing doping. 00:22:24.660 --> 00:22:26.310 align:middle line:84% We're trying to find ways to do it. 00:22:26.310 --> 00:22:27.720 align:middle line:84% But you know if you do an implant 00:22:27.720 --> 00:22:29.520 align:middle line:84% and you do a certain anneal, you get 00:22:29.520 --> 00:22:33.030 align:middle line:84% doping up to a certain value, maybe depending on the doping, 00:22:33.030 --> 00:22:34.740 align:middle line:90% maybe in the low 20s. 00:22:34.740 --> 00:22:36.540 align:middle line:84% Maybe 2 to 4 times 10 to the negative. 00:22:36.540 --> 00:22:39.220 align:middle line:84% Beyond that, it's very hard to go much further. 00:22:39.220 --> 00:22:41.940 align:middle line:84% So the problem is that rho C is not 00:22:41.940 --> 00:22:45.440 align:middle line:84% really scaling because of the doping electrical solubility 00:22:45.440 --> 00:22:45.940 align:middle line:90% limit. 00:22:45.940 --> 00:22:50.433 align:middle line:84% So the contact passivity doesn't scale as we shrink technology. 00:22:50.433 --> 00:22:51.600 align:middle line:90% And this is a major problem. 00:22:51.600 --> 00:22:54.540 align:middle line:84% People are looking for new methods, new materials, 00:22:54.540 --> 00:22:56.700 align:middle line:84% whatever, some way of getting the doping up, 00:22:56.700 --> 00:22:58.167 align:middle line:84% or a new method of making contact. 00:22:58.167 --> 00:22:59.625 align:middle line:84% That's kind of a fundamental issue. 00:22:59.625 --> 00:23:02.300 align:middle line:90% 00:23:02.300 --> 00:23:06.760 align:middle line:84% In fact, here on slide 11, I show that this is really 00:23:06.760 --> 00:23:08.150 align:middle line:90% one of the concerns. 00:23:08.150 --> 00:23:10.390 align:middle line:84% This is a table that I took, table 71a, 00:23:10.390 --> 00:23:13.720 align:middle line:84% from the 2003 international technology 00:23:13.720 --> 00:23:14.890 align:middle line:90% roadmap for semiconductors. 00:23:14.890 --> 00:23:17.050 align:middle line:84% I've shown this before, but we hadn't 00:23:17.050 --> 00:23:19.240 align:middle line:90% gotten to this contact stage. 00:23:19.240 --> 00:23:22.160 align:middle line:84% And just to remind you, in the upper right corner, 00:23:22.160 --> 00:23:23.840 align:middle line:84% this is what the MOSFET looks like. 00:23:23.840 --> 00:23:25.630 align:middle line:84% And these black regions are going 00:23:25.630 --> 00:23:29.165 align:middle line:84% to be silicides, either cobalt silicides or nickel silicide. 00:23:29.165 --> 00:23:30.290 align:middle line:90% We'll talk more about that. 00:23:30.290 --> 00:23:31.707 align:middle line:84% But the point is they're a contact 00:23:31.707 --> 00:23:34.570 align:middle line:84% between a metal and a heavily doped semiconductor, which 00:23:34.570 --> 00:23:36.448 align:middle line:90% is silicon. 00:23:36.448 --> 00:23:38.240 align:middle line:84% And if you look at some of the requirements 00:23:38.240 --> 00:23:41.900 align:middle line:84% here on the ITRS roadmap, here we are in, let's say a year ago, 00:23:41.900 --> 00:23:43.310 align:middle line:90% 2003. 00:23:43.310 --> 00:23:46.550 align:middle line:84% Look at the maximum contact resistive. 00:23:46.550 --> 00:23:51.350 align:middle line:84% So this is the rho C. This right here is 00:23:51.350 --> 00:23:52.850 align:middle line:90% represented what we call rho C. 00:23:52.850 --> 00:23:58.210 align:middle line:84% In 2003, they wanted to have about 2 times 10 to the -7th ohm 00:23:58.210 --> 00:23:59.290 align:middle line:90% centimeter square. 00:23:59.290 --> 00:24:02.230 align:middle line:84% And you notice it's sort of a light orange color, which 00:24:02.230 --> 00:24:04.870 align:middle line:84% means, according to our key, that there 00:24:04.870 --> 00:24:09.130 align:middle line:84% is an interim solution on how to get to this is known. 00:24:09.130 --> 00:24:12.310 align:middle line:84% But if you go to 2004, you want to lower it 00:24:12.310 --> 00:24:15.370 align:middle line:84% according to ITRS about 1.6 times 10 to -7. 00:24:15.370 --> 00:24:17.500 align:middle line:84% That's all in yellow, which means 00:24:17.500 --> 00:24:19.540 align:middle line:84% their manufacturable solutions are known. 00:24:19.540 --> 00:24:21.610 align:middle line:84% They haven't yet been integrated. 00:24:21.610 --> 00:24:24.160 align:middle line:84% And when we get to 2008 in the red, 00:24:24.160 --> 00:24:27.940 align:middle line:84% to get down to about 0.8 times 10 to -7 ohm centimeter squared, 00:24:27.940 --> 00:24:31.130 align:middle line:84% there aren't any known solutions that are manufacturable. 00:24:31.130 --> 00:24:33.340 align:middle line:84% So we're coming up against the red brick wall 00:24:33.340 --> 00:24:39.220 align:middle line:84% here because the device scaling and the need 00:24:39.220 --> 00:24:42.190 align:middle line:84% to make the contact size smaller means that we need 00:24:42.190 --> 00:24:44.860 align:middle line:90% to drop rho C at this rate. 00:24:44.860 --> 00:24:46.690 align:middle line:84% And it's just nobody knows yet how 00:24:46.690 --> 00:24:50.380 align:middle line:84% to make a contact that has 0.8 times 10 to the -7 ohm 00:24:50.380 --> 00:24:53.800 align:middle line:84% centimeter squared for the specific resistivity. 00:24:53.800 --> 00:24:56.260 align:middle line:84% So it's the contacts that are really hurting us. 00:24:56.260 --> 00:24:59.760 align:middle line:84% Look at the sheet resistance you might be concerned about. 00:24:59.760 --> 00:25:02.360 align:middle line:84% Well, how about the resistance of the metal itself? 00:25:02.360 --> 00:25:05.420 align:middle line:84% Resistance of the electrons flowing through the metal 00:25:05.420 --> 00:25:06.800 align:middle line:90% is not a real big problem. 00:25:06.800 --> 00:25:09.110 align:middle line:84% When you look at the contact silicide sheet 00:25:09.110 --> 00:25:11.840 align:middle line:84% resistance in ohms per square, it 00:25:11.840 --> 00:25:16.070 align:middle line:84% needs to be in this range of 6 to 10 ohms per square. 00:25:16.070 --> 00:25:17.100 align:middle line:90% That's not a problem. 00:25:17.100 --> 00:25:19.580 align:middle line:84% None of that-- that's all in white, which means people 00:25:19.580 --> 00:25:20.520 align:middle line:90% know how to do that. 00:25:20.520 --> 00:25:22.580 align:middle line:84% The real problem is making these really good 00:25:22.580 --> 00:25:27.210 align:middle line:84% low resistivity contacts to the silicon. 00:25:27.210 --> 00:25:29.970 align:middle line:90% 00:25:29.970 --> 00:25:32.220 align:middle line:84% I just want to show an example of how-- 00:25:32.220 --> 00:25:34.470 align:middle line:84% so you get a feel for how the numbers work 00:25:34.470 --> 00:25:37.320 align:middle line:84% of how one does a contact resistance calculation. 00:25:37.320 --> 00:25:38.800 align:middle line:90% This is for a MOSFET. 00:25:38.800 --> 00:25:42.840 align:middle line:84% This is shown on slide 12 of your handouts. 00:25:42.840 --> 00:25:45.428 align:middle line:84% Again, this is a cross-section view of a MOSFET. 00:25:45.428 --> 00:25:47.220 align:middle line:84% So on the left, you can imagine this region 00:25:47.220 --> 00:25:48.930 align:middle line:84% as being the heavily doped source. 00:25:48.930 --> 00:25:52.590 align:middle line:84% In the middle shown in orange is the gate. 00:25:52.590 --> 00:25:54.510 align:middle line:84% And this is the heavily doped drain. 00:25:54.510 --> 00:25:57.520 align:middle line:84% And these black regions are metal. 00:25:57.520 --> 00:26:00.130 align:middle line:84% Could be silicide, but there's a metal region. 00:26:00.130 --> 00:26:03.680 align:middle line:84% And I'm showing the dimension of the contact, 00:26:03.680 --> 00:26:05.470 align:middle line:84% so the region over which the metal is 00:26:05.470 --> 00:26:08.200 align:middle line:84% in contact with the silicon, in this dimension 00:26:08.200 --> 00:26:10.480 align:middle line:90% is 0.2 microns wide. 00:26:10.480 --> 00:26:13.960 align:middle line:84% OK, now into the page, or into the board, 00:26:13.960 --> 00:26:16.150 align:middle line:84% we're assuming that it's 1 micron. 00:26:16.150 --> 00:26:17.860 align:middle line:84% And in fact, this is a cross-section view 00:26:17.860 --> 00:26:18.620 align:middle line:90% of the device. 00:26:18.620 --> 00:26:21.730 align:middle line:84% If you were to look down on the device, a top view, 00:26:21.730 --> 00:26:23.150 align:middle line:90% this is what you would see. 00:26:23.150 --> 00:26:26.270 align:middle line:84% This would be your source contact region. 00:26:26.270 --> 00:26:28.510 align:middle line:90% Here's your gate in the orange. 00:26:28.510 --> 00:26:29.440 align:middle line:90% And here's the drain. 00:26:29.440 --> 00:26:31.240 align:middle line:84% And again, the region over which we 00:26:31.240 --> 00:26:32.620 align:middle line:84% have to make the metal contact is 00:26:32.620 --> 00:26:35.650 align:middle line:84% assumed to be 0.2 microns in this direction in width 00:26:35.650 --> 00:26:38.180 align:middle line:90% and 1 micron in this direction. 00:26:38.180 --> 00:26:40.180 align:middle line:84% So the area of this contact clearly, 00:26:40.180 --> 00:26:42.910 align:middle line:84% if the current is going to go flow through it, 00:26:42.910 --> 00:26:46.570 align:middle line:84% the area is going to be 0.2 times 1 square microns, 00:26:46.570 --> 00:26:49.100 align:middle line:90% or 0.2 micron squared. 00:26:49.100 --> 00:26:50.440 align:middle line:90% So that's the area. 00:26:50.440 --> 00:26:55.460 align:middle line:84% Assuming we go back to ITRS, assuming we are here roughly 00:26:55.460 --> 00:27:00.300 align:middle line:84% in 2002 and the contact resistivity is about times 10 00:27:00.300 --> 00:27:03.180 align:middle line:90% to -7 ohm centimeter squared-- 00:27:03.180 --> 00:27:06.090 align:middle line:84% OK, so I'm assuming this as a specific contact resistivity-- 00:27:06.090 --> 00:27:09.660 align:middle line:84% then can calculate the resistance of just the drain 00:27:09.660 --> 00:27:10.620 align:middle line:90% contact itself. 00:27:10.620 --> 00:27:12.990 align:middle line:84% The resistance is just that rho C divided 00:27:12.990 --> 00:27:14.490 align:middle line:90% by the area of that contact. 00:27:14.490 --> 00:27:17.370 align:middle line:90% And you get 100 ohms. 00:27:17.370 --> 00:27:21.450 align:middle line:84% So the resistance of the current just to flow through this 00:27:21.450 --> 00:27:24.330 align:middle line:84% contact is 100 ohms on the drain side. 00:27:24.330 --> 00:27:26.710 align:middle line:84% It's going to be 100 ohms on the source side, as well. 00:27:26.710 --> 00:27:30.810 align:middle line:84% So that's 200 ohms right there, just to give you a rough idea. 00:27:30.810 --> 00:27:34.750 align:middle line:84% And this is equivalent to the ITRS 2003 requirement. 00:27:34.750 --> 00:27:37.440 align:middle line:84% So we're talking about 200 ohms of the total resistance 00:27:37.440 --> 00:27:40.140 align:middle line:84% of the device just being due to the contacts because 00:27:40.140 --> 00:27:40.860 align:middle line:90% of the size. 00:27:40.860 --> 00:27:44.160 align:middle line:84% And that's a reasonably large resistance. 00:27:44.160 --> 00:27:46.410 align:middle line:84% So we'll see that the contact resistance actually 00:27:46.410 --> 00:27:47.492 align:middle line:90% does dominate. 00:27:47.492 --> 00:27:48.950 align:middle line:84% Again, what you could say was, well 00:27:48.950 --> 00:27:51.420 align:middle line:84% we'll just make the contact wider, which you can do, 00:27:51.420 --> 00:27:53.710 align:middle line:84% but that means your chip ends up being larger. 00:27:53.710 --> 00:27:56.400 align:middle line:84% You can't put as many devices on the chip. 00:27:56.400 --> 00:27:58.650 align:middle line:84% So there's a fundamental trade-off here, 00:27:58.650 --> 00:28:01.120 align:middle line:84% unless we can get this rho C number down. 00:28:01.120 --> 00:28:04.560 align:middle line:84% And that's exactly why this number is dropping with time. 00:28:04.560 --> 00:28:06.210 align:middle line:84% People want it to drop because they 00:28:06.210 --> 00:28:09.070 align:middle line:84% want to be able to continue to scale the area of the device. 00:28:09.070 --> 00:28:10.140 align:middle line:90% It's a problem, though. 00:28:10.140 --> 00:28:13.220 align:middle line:90% 00:28:13.220 --> 00:28:15.470 align:middle line:84% On slide 13, I'm showing you a structure. 00:28:15.470 --> 00:28:18.950 align:middle line:84% If you are studying contacts or if you ever make devices, 00:28:18.950 --> 00:28:21.900 align:middle line:84% you always want to know, what is my contact resistance? 00:28:21.900 --> 00:28:24.800 align:middle line:84% And this is a classic structure to actually measure 00:28:24.800 --> 00:28:26.030 align:middle line:90% contact resistance. 00:28:26.030 --> 00:28:28.910 align:middle line:90% It's called a Kelvin structure. 00:28:28.910 --> 00:28:30.410 align:middle line:84% I took this particular picture out 00:28:30.410 --> 00:28:33.710 align:middle line:90% of your textbook, figure 11-35. 00:28:33.710 --> 00:28:36.770 align:middle line:84% There's a reference to it in your textbook, 00:28:36.770 --> 00:28:39.140 align:middle line:84% a paper that an article that talks about it in much more 00:28:39.140 --> 00:28:42.740 align:middle line:84% detail on how it's actually made. 00:28:42.740 --> 00:28:47.090 align:middle line:84% On the left-hand side is showing the mask layout in order to make 00:28:47.090 --> 00:28:48.960 align:middle line:90% one of these structures. 00:28:48.960 --> 00:28:52.340 align:middle line:84% And what you do is you have these dark regions here 00:28:52.340 --> 00:28:55.250 align:middle line:84% that are funny shaped are considered 00:28:55.250 --> 00:28:58.160 align:middle line:84% to be the N plus region that you want to contact. 00:28:58.160 --> 00:29:00.530 align:middle line:84% So that would be called the n plus diffusion, 00:29:00.530 --> 00:29:03.050 align:middle line:90% has this particular shape. 00:29:03.050 --> 00:29:06.855 align:middle line:84% The dashed lines represent the metal. 00:29:06.855 --> 00:29:08.230 align:middle line:84% So that would be the metal level. 00:29:08.230 --> 00:29:11.040 align:middle line:84% So this is going to take at least three masks to powder. 00:29:11.040 --> 00:29:14.460 align:middle line:84% And these little square regions with the X's going through them 00:29:14.460 --> 00:29:15.270 align:middle line:90% are the contacts. 00:29:15.270 --> 00:29:20.700 align:middle line:84% So that's the region where one layer contacts the layer 00:29:20.700 --> 00:29:22.710 align:middle line:90% above it or below it. 00:29:22.710 --> 00:29:24.590 align:middle line:84% So this is sort of a planar view. 00:29:24.590 --> 00:29:27.480 align:middle line:84% If you want more of a bird's-eye view of actually how it looks, 00:29:27.480 --> 00:29:29.070 align:middle line:84% you can look on the right-hand side. 00:29:29.070 --> 00:29:33.260 align:middle line:84% And these L-shaped brackets are made of metal. 00:29:33.260 --> 00:29:35.690 align:middle line:84% So there's one here and one here. 00:29:35.690 --> 00:29:40.220 align:middle line:84% And basically you perform a four-point kind of measurement. 00:29:40.220 --> 00:29:43.610 align:middle line:84% What you're doing is this little region here that is square 00:29:43.610 --> 00:29:46.940 align:middle line:84% in the center that has a dimension of L in one dimension 00:29:46.940 --> 00:29:49.220 align:middle line:84% by L in the other-- so this is an L by L squared-- 00:29:49.220 --> 00:29:53.730 align:middle line:84% the current then comes through on this leg. 00:29:53.730 --> 00:29:55.760 align:middle line:84% So the current flows through the diffusion. 00:29:55.760 --> 00:29:59.300 align:middle line:84% Then it flows up through the square, the square contact. 00:29:59.300 --> 00:30:02.900 align:middle line:84% And then it flows out through probe number two on the metal. 00:30:02.900 --> 00:30:05.420 align:middle line:90% So you put an ammeter here. 00:30:05.420 --> 00:30:08.282 align:middle line:84% You put an ammeter between probes 2 and 3, 00:30:08.282 --> 00:30:09.740 align:middle line:84% and you measure that current that's 00:30:09.740 --> 00:30:12.440 align:middle line:84% flowing through that square contact. 00:30:12.440 --> 00:30:17.090 align:middle line:84% And then you put a volt meter between probes 1 and 4 00:30:17.090 --> 00:30:20.090 align:middle line:84% and you measure the voltage drop across that face. 00:30:20.090 --> 00:30:23.548 align:middle line:84% And then you just divide V divided by I, 00:30:23.548 --> 00:30:25.340 align:middle line:84% whatever you measure-- the measured voltage 00:30:25.340 --> 00:30:28.610 align:middle line:84% between 1 and 4, divided by the current flowing between 2 and 3. 00:30:28.610 --> 00:30:30.800 align:middle line:90% And that is your resistance. 00:30:30.800 --> 00:30:32.720 align:middle line:84% And that's going to be equivalent to rho 00:30:32.720 --> 00:30:37.110 align:middle line:84% C divided by the area of the contact, L squared. 00:30:37.110 --> 00:30:38.750 align:middle line:84% So this is a very common way to do it. 00:30:38.750 --> 00:30:41.510 align:middle line:84% You might say, well, why do you go to the effort of having 00:30:41.510 --> 00:30:42.230 align:middle line:90% separate probes? 00:30:42.230 --> 00:30:49.070 align:middle line:84% Why don't you just measure the current and the voltage 00:30:49.070 --> 00:30:51.463 align:middle line:90% on the same probe points? 00:30:51.463 --> 00:30:53.630 align:middle line:84% And the reason you do this is because you don't want 00:30:53.630 --> 00:30:56.750 align:middle line:84% to have extra contact resistance, say, of your probes 00:30:56.750 --> 00:30:57.980 align:middle line:90% going down. 00:30:57.980 --> 00:30:59.850 align:middle line:84% And there's always a voltage drop there. 00:30:59.850 --> 00:31:04.223 align:middle line:84% So the probes through which you force the current 00:31:04.223 --> 00:31:06.140 align:middle line:84% are separate from the probes through which you 00:31:06.140 --> 00:31:07.170 align:middle line:90% measure the voltage. 00:31:07.170 --> 00:31:08.920 align:middle line:84% So that, therefore, you're only measuring, 00:31:08.920 --> 00:31:12.560 align:middle line:84% really, the voltage drop across this the contact face, 00:31:12.560 --> 00:31:14.010 align:middle line:90% the square face. 00:31:14.010 --> 00:31:16.400 align:middle line:84% So it's a very common structure, the Kelvin structure, 00:31:16.400 --> 00:31:19.490 align:middle line:84% you'll find on a lot of test masks and test circuits 00:31:19.490 --> 00:31:22.370 align:middle line:84% that people use to measure the contact resistivity. 00:31:22.370 --> 00:31:25.250 align:middle line:90% 00:31:25.250 --> 00:31:28.820 align:middle line:84% Here's an example shown on slide 11 00:31:28.820 --> 00:31:31.250 align:middle line:84% using a cross-bridge Kelvin structure. 00:31:31.250 --> 00:31:34.640 align:middle line:84% And you have a 1 micron by 1 micron opening. 00:31:34.640 --> 00:31:37.340 align:middle line:84% You find that you get a current of 10 microamps 00:31:37.340 --> 00:31:40.550 align:middle line:84% through the contact, so that's I23, 00:31:40.550 --> 00:31:44.420 align:middle line:84% when you measure a voltage drop of about 320 microvolts. 00:31:44.420 --> 00:31:48.650 align:middle line:84% What is the specific contact resistivity? 00:31:48.650 --> 00:31:52.670 align:middle line:84% So you just divide the voltage drop divided by the current. 00:31:52.670 --> 00:31:54.560 align:middle line:84% And that gives you a resistance number. 00:31:54.560 --> 00:31:56.510 align:middle line:90% In fact, that's 32 ohms. 00:31:56.510 --> 00:31:59.330 align:middle line:84% And by definition, that's equal to rho C divided 00:31:59.330 --> 00:32:01.110 align:middle line:90% by the area of the contact. 00:32:01.110 --> 00:32:04.850 align:middle line:84% So you can solve for rho C here just by multiplying 32 ohms 00:32:04.850 --> 00:32:06.230 align:middle line:90% by the area of the contact. 00:32:06.230 --> 00:32:10.198 align:middle line:84% And you get 3.2 times 10 to -7 ohm centimeter squared. 00:32:10.198 --> 00:32:11.990 align:middle line:84% It's pretty close to the ITRS requirements. 00:32:11.990 --> 00:32:13.023 align:middle line:90% Still a little bit high. 00:32:13.023 --> 00:32:14.690 align:middle line:84% It's still about a factor of 2 too high. 00:32:14.690 --> 00:32:16.460 align:middle line:90% But it just gives you an idea. 00:32:16.460 --> 00:32:19.620 align:middle line:84% Typically you use several different dimensions. 00:32:19.620 --> 00:32:23.690 align:middle line:84% So you either use a 1 by 1, a 5 by 5, and a 10 by 10 square. 00:32:23.690 --> 00:32:25.940 align:middle line:84% And you make sure you get the same specific contact 00:32:25.940 --> 00:32:29.420 align:middle line:84% resistivity number over all of those 00:32:29.420 --> 00:32:32.480 align:middle line:84% because sometimes you can have current crowding effects. 00:32:32.480 --> 00:32:35.450 align:middle line:84% When I drew it in this picture here on page 13, 00:32:35.450 --> 00:32:38.120 align:middle line:84% I said the current is uniformly going through that face. 00:32:38.120 --> 00:32:39.950 align:middle line:84% So you can imagine a flow of water 00:32:39.950 --> 00:32:43.430 align:middle line:84% uniformly flowing with the same flux all across the face. 00:32:43.430 --> 00:32:45.170 align:middle line:84% That may or may not be true, depending 00:32:45.170 --> 00:32:47.630 align:middle line:84% on the series resistance of this N plus diffusion 00:32:47.630 --> 00:32:48.760 align:middle line:90% and things like that. 00:32:48.760 --> 00:32:51.708 align:middle line:84% So you want to use different areas. 00:32:51.708 --> 00:32:54.250 align:middle line:84% And for different size areas, you should get the same number. 00:32:54.250 --> 00:32:56.833 align:middle line:84% If you don't, then you probably have current crowding effects, 00:32:56.833 --> 00:32:58.210 align:middle line:84% and you need a more sophisticated 00:32:58.210 --> 00:33:00.448 align:middle line:90% two-dimensional model. 00:33:00.448 --> 00:33:02.490 align:middle line:84% So that's a typical way that people would measure 00:33:02.490 --> 00:33:05.960 align:middle line:90% their contact resistance. 00:33:05.960 --> 00:33:08.560 align:middle line:84% So that sort of introduces the whole idea of scaling 00:33:08.560 --> 00:33:11.088 align:middle line:90% and why we want to do this. 00:33:11.088 --> 00:33:12.880 align:middle line:84% I want to bring up some other requirements. 00:33:12.880 --> 00:33:14.290 align:middle line:84% We said it's good, it's important, 00:33:14.290 --> 00:33:15.665 align:middle line:84% to make a low-resistance contact. 00:33:15.665 --> 00:33:18.400 align:middle line:84% But there are other requirements besides that. 00:33:18.400 --> 00:33:20.815 align:middle line:84% So clearly we need to have a high doping concentration 00:33:20.815 --> 00:33:23.440 align:middle line:84% at the interface that's going to allow the electrical tunneling 00:33:23.440 --> 00:33:24.667 align:middle line:90% to take place. 00:33:24.667 --> 00:33:27.250 align:middle line:84% You need to be-- the interface has to be free of contaminants, 00:33:27.250 --> 00:33:28.253 align:middle line:90% as I mentioned. 00:33:28.253 --> 00:33:29.920 align:middle line:84% You want to get rid of the native oxide. 00:33:29.920 --> 00:33:32.890 align:middle line:84% So you preferably use a metal that will kind of eat away, 00:33:32.890 --> 00:33:35.710 align:middle line:84% if there is any little native oxide, that will eat it away. 00:33:35.710 --> 00:33:37.210 align:middle line:84% And you clearly don't want residues. 00:33:37.210 --> 00:33:39.280 align:middle line:84% You don't want a lot of excess carbon or other things 00:33:39.280 --> 00:33:40.330 align:middle line:84% at the interface because that's going 00:33:40.330 --> 00:33:42.580 align:middle line:84% to cause an increase in your contact resistance. 00:33:42.580 --> 00:33:45.670 align:middle line:84% You don't want nitride or oxide there. 00:33:45.670 --> 00:33:48.100 align:middle line:84% That's one thing to get low-contact resistance. 00:33:48.100 --> 00:33:52.660 align:middle line:84% The second thing you want is good thermal stability. 00:33:52.660 --> 00:33:56.380 align:middle line:84% You don't want the contact structure to change or degrade 00:33:56.380 --> 00:33:58.000 align:middle line:90% in some way during the process. 00:33:58.000 --> 00:34:00.605 align:middle line:84% After all, there will be subsequent thermal processing. 00:34:00.605 --> 00:34:02.230 align:middle line:84% Once you make those contacts, you still 00:34:02.230 --> 00:34:04.870 align:middle line:84% have to make all that multi-level metal. 00:34:04.870 --> 00:34:06.760 align:middle line:84% And those multi-level metal schemes 00:34:06.760 --> 00:34:11.199 align:middle line:84% involve annealing steps or deposition 00:34:11.199 --> 00:34:14.090 align:middle line:84% steps that could be in the range of 400 to 500 degrees. 00:34:14.090 --> 00:34:16.090 align:middle line:84% So you don't want anything weird happening down 00:34:16.090 --> 00:34:19.420 align:middle line:84% in your contact when you heat the thing. 00:34:19.420 --> 00:34:23.469 align:middle line:84% And in particular, you're also very concerned about junction 00:34:23.469 --> 00:34:24.159 align:middle line:90% leakage. 00:34:24.159 --> 00:34:26.889 align:middle line:84% Remember, this electrical metal, this metal, 00:34:26.889 --> 00:34:29.650 align:middle line:84% is making electrical contact to a PN junction. 00:34:29.650 --> 00:34:32.350 align:middle line:90% This is an N plus P junction. 00:34:32.350 --> 00:34:34.090 align:middle line:90% So you want it to be-- 00:34:34.090 --> 00:34:35.830 align:middle line:84% ultimately, this N plus P junction 00:34:35.830 --> 00:34:39.699 align:middle line:84% to have good junction characteristics and low leakage 00:34:39.699 --> 00:34:42.969 align:middle line:84% in the silicon underneath the contact. 00:34:42.969 --> 00:34:45.600 align:middle line:84% So here on slide 15, I'm showing an example 00:34:45.600 --> 00:34:48.630 align:middle line:84% of a figure I took out of a text where something very bad 00:34:48.630 --> 00:34:51.989 align:middle line:84% has happened, which is called spiking of the metal. 00:34:51.989 --> 00:34:53.380 align:middle line:90% And you can see what's happened. 00:34:53.380 --> 00:34:54.239 align:middle line:90% This is the metal. 00:34:54.239 --> 00:34:56.139 align:middle line:90% Aluminum is shown here. 00:34:56.139 --> 00:34:59.160 align:middle line:84% And this is my N plus drain or source. 00:34:59.160 --> 00:35:04.230 align:middle line:84% And this chip has been heated up. 00:35:04.230 --> 00:35:08.340 align:middle line:84% And the aluminum has actually spiked through the junction. 00:35:08.340 --> 00:35:10.500 align:middle line:84% It's actually touching now the P-type silicon. 00:35:10.500 --> 00:35:13.020 align:middle line:90% So it's really shorted out. 00:35:13.020 --> 00:35:17.190 align:middle line:84% It's essentially shorted out this PN junction. 00:35:17.190 --> 00:35:18.390 align:middle line:90% It's created a lot of voids. 00:35:18.390 --> 00:35:19.473 align:middle line:90% And this is a big problem. 00:35:19.473 --> 00:35:23.120 align:middle line:84% And that's because aluminum has a finite solubility for silicon. 00:35:23.120 --> 00:35:25.400 align:middle line:84% The silicon actually gets sucked into the aluminum 00:35:25.400 --> 00:35:27.380 align:middle line:90% and causes this spiking effect. 00:35:27.380 --> 00:35:30.440 align:middle line:84% And this is one reason why, if you have a very deep junction 00:35:30.440 --> 00:35:33.410 align:middle line:84% that's many microns deep-- well, it would never 00:35:33.410 --> 00:35:35.510 align:middle line:84% spike because it never gets that deep. 00:35:35.510 --> 00:35:37.950 align:middle line:84% But now the junctions are very shallow, 00:35:37.950 --> 00:35:39.710 align:middle line:84% they're 0.1 micron or less, people never 00:35:39.710 --> 00:35:42.090 align:middle line:84% put aluminum directly in contact with silicon. 00:35:42.090 --> 00:35:45.980 align:middle line:84% So in the old days, this is the way people made contacts. 00:35:45.980 --> 00:35:48.440 align:middle line:84% Today if you do this with any kind of reasonably 00:35:48.440 --> 00:35:51.470 align:middle line:84% shallow junction, when you go to heat the thing up 00:35:51.470 --> 00:35:53.063 align:middle line:84% to do the final forming gas anneal, 00:35:53.063 --> 00:35:54.480 align:middle line:84% you're going to spike the junction 00:35:54.480 --> 00:35:56.105 align:middle line:84% and you're going to destroy the device. 00:35:56.105 --> 00:35:58.430 align:middle line:90% 00:35:58.430 --> 00:36:01.660 align:middle line:84% Here's an example on slide 16 of what 00:36:01.660 --> 00:36:04.468 align:middle line:84% happens in some extreme cases of junction spiking. 00:36:04.468 --> 00:36:06.760 align:middle line:84% What we're actually looking at-- what I showed you here 00:36:06.760 --> 00:36:09.250 align:middle line:84% in the prior slide, this is a cross-section view. 00:36:09.250 --> 00:36:14.350 align:middle line:84% You can see the way the aluminum has spiked into the silicon. 00:36:14.350 --> 00:36:17.200 align:middle line:84% In fact, if you look in plan view 00:36:17.200 --> 00:36:19.810 align:middle line:84% at a tilt angle of about 45 degrees, 00:36:19.810 --> 00:36:21.220 align:middle line:90% this is a contact region. 00:36:21.220 --> 00:36:24.580 align:middle line:90% And around it is oxide. 00:36:24.580 --> 00:36:26.470 align:middle line:90% These are 5 by 5 micron holes. 00:36:26.470 --> 00:36:28.360 align:middle line:90% So they're fairly large. 00:36:28.360 --> 00:36:30.787 align:middle line:84% These were annealed by rapid thermal processing. 00:36:30.787 --> 00:36:32.620 align:middle line:84% And then the aluminum layer was removed just 00:36:32.620 --> 00:36:34.690 align:middle line:90% to see what happened. 00:36:34.690 --> 00:36:37.600 align:middle line:84% And in fact, this was annealed for 10 minutes at 425. 00:36:37.600 --> 00:36:40.120 align:middle line:84% So this was aluminum directly in contact with silicon 00:36:40.120 --> 00:36:41.530 align:middle line:90% at 10 minutes at 425. 00:36:41.530 --> 00:36:45.550 align:middle line:84% You can see it's created all these voids because there's 00:36:45.550 --> 00:36:47.950 align:middle line:84% a solubility of silicon in aluminum. 00:36:47.950 --> 00:36:49.750 align:middle line:84% Silicon from the substrate has actually 00:36:49.750 --> 00:36:51.130 align:middle line:90% gone up into the aluminum. 00:36:51.130 --> 00:36:54.280 align:middle line:84% And it leaves behind voids, which 00:36:54.280 --> 00:36:56.860 align:middle line:84% end up being filled by the overlying aluminum. 00:36:56.860 --> 00:36:59.720 align:middle line:84% And when you etch the aluminum off, you see all these holes. 00:36:59.720 --> 00:37:02.500 align:middle line:90% 00:37:02.500 --> 00:37:04.510 align:middle line:84% And if you do RTP at a lower temperature here, 00:37:04.510 --> 00:37:07.960 align:middle line:84% 350 for ten seconds, you don't see nearly as many spikes, 00:37:07.960 --> 00:37:09.280 align:middle line:90% nearly as many holes. 00:37:09.280 --> 00:37:11.320 align:middle line:84% But 350 for ten seconds is really 00:37:11.320 --> 00:37:14.250 align:middle line:84% too low for any backend processing. 00:37:14.250 --> 00:37:16.630 align:middle line:84% So this is why you never put aluminum directly 00:37:16.630 --> 00:37:19.272 align:middle line:84% in contact with silicon unless you're 00:37:19.272 --> 00:37:21.730 align:middle line:84% making a really deep junction, like a micron-deep junction, 00:37:21.730 --> 00:37:22.938 align:middle line:90% you have some kind of device. 00:37:22.938 --> 00:37:26.080 align:middle line:84% But in MOSFETs today, the typical source drain junctions 00:37:26.080 --> 00:37:28.460 align:middle line:90% are 0.1 microns. 00:37:28.460 --> 00:37:34.362 align:middle line:84% So this is sort of a classic case of junction spiking. 00:37:34.362 --> 00:37:36.070 align:middle line:84% There are a couple of different solutions 00:37:36.070 --> 00:37:37.737 align:middle line:84% people have come up with over the years. 00:37:37.737 --> 00:37:40.480 align:middle line:84% One of them is shown here on slide 17, 00:37:40.480 --> 00:37:41.800 align:middle line:90% although it's not perfect. 00:37:41.800 --> 00:37:45.640 align:middle line:84% People had the idea of, well, don't use pure aluminum. 00:37:45.640 --> 00:37:50.170 align:middle line:84% Use an alloy of aluminum with 1% to 2% silicon. 00:37:50.170 --> 00:37:51.820 align:middle line:84% And since we said that the silicon is 00:37:51.820 --> 00:37:56.210 align:middle line:84% soluble in the aluminum, if you put silicon in the metal itself, 00:37:56.210 --> 00:37:58.570 align:middle line:84% so when you sputter, you don't sputter pure aluminum. 00:37:58.570 --> 00:38:00.940 align:middle line:84% You sputter an alloy of aluminum and silicon. 00:38:00.940 --> 00:38:03.190 align:middle line:84% Then you think, well, OK, it won't suck up 00:38:03.190 --> 00:38:05.500 align:middle line:84% any silicon from the substrate because it's already 00:38:05.500 --> 00:38:07.450 align:middle line:90% in equilibrium. 00:38:07.450 --> 00:38:11.500 align:middle line:84% It's already got all the silicon it needs, the aluminum eutectic. 00:38:11.500 --> 00:38:12.610 align:middle line:90% So it's not a problem. 00:38:12.610 --> 00:38:17.800 align:middle line:84% But it's still a bit of an issue is that the silicon itself 00:38:17.800 --> 00:38:20.860 align:middle line:84% can actually precipitate out of the aluminum as an example. 00:38:20.860 --> 00:38:27.010 align:middle line:84% It's been heated, and then they remove the aluminum film. 00:38:27.010 --> 00:38:28.990 align:middle line:84% And you get these little silica precipitates, 00:38:28.990 --> 00:38:31.750 align:middle line:84% which can increase the specific contact resistance, especially 00:38:31.750 --> 00:38:32.500 align:middle line:90% in N-type silicon. 00:38:32.500 --> 00:38:36.460 align:middle line:84% So it's making an aluminum 1% silicon contact 00:38:36.460 --> 00:38:38.650 align:middle line:84% to silicon, which was, again, after pure aluminum, 00:38:38.650 --> 00:38:41.950 align:middle line:84% people did the aluminum 1% silicon solution. 00:38:41.950 --> 00:38:43.993 align:middle line:84% Was a solution maybe in the 1980s 00:38:43.993 --> 00:38:46.660 align:middle line:84% or so, but again, it's still not something that people typically 00:38:46.660 --> 00:38:49.790 align:middle line:84% do because you're going to get a higher contact resistance. 00:38:49.790 --> 00:38:51.280 align:middle line:90% And you can still get spiking. 00:38:51.280 --> 00:38:55.100 align:middle line:90% It's not a perfect solution. 00:38:55.100 --> 00:38:59.980 align:middle line:84% But that was one solution that people did use at one point. 00:38:59.980 --> 00:39:02.318 align:middle line:84% The way people go today is to form 00:39:02.318 --> 00:39:03.610 align:middle line:90% what they call a barrier layer. 00:39:03.610 --> 00:39:06.250 align:middle line:84% And a barrier layer does exactly what the name says. 00:39:06.250 --> 00:39:11.290 align:middle line:84% It forms a barrier between this aluminum and the silicon. 00:39:11.290 --> 00:39:15.250 align:middle line:84% The barrier has a very low specific contact resistivity. 00:39:15.250 --> 00:39:16.870 align:middle line:84% So it still makes a good contact, 00:39:16.870 --> 00:39:19.210 align:middle line:84% but it doesn't allow the aluminum or the silicon 00:39:19.210 --> 00:39:20.360 align:middle line:90% to talk to each other. 00:39:20.360 --> 00:39:22.690 align:middle line:84% So you cannot get this void formation. 00:39:22.690 --> 00:39:24.100 align:middle line:90% You can't get the spiking. 00:39:24.100 --> 00:39:28.780 align:middle line:84% So typical barrier layers might be a thin layer of titanium, 00:39:28.780 --> 00:39:32.260 align:middle line:84% say 1,000 angstroms of titanium is often used, 00:39:32.260 --> 00:39:36.370 align:middle line:84% or use sputter tie tungsten or maybe tie silicide. 00:39:36.370 --> 00:39:38.590 align:middle line:84% So in between the heavily doped silicon, 00:39:38.590 --> 00:39:42.460 align:middle line:84% you now have an inter layer of this material 00:39:42.460 --> 00:39:43.580 align:middle line:90% that forms a barrier. 00:39:43.580 --> 00:39:45.670 align:middle line:84% So this prevents the chemical interdiffusion 00:39:45.670 --> 00:39:48.220 align:middle line:84% between the silicon and the aluminum. 00:39:48.220 --> 00:39:50.380 align:middle line:90% Generally has low stress. 00:39:50.380 --> 00:39:52.390 align:middle line:84% You pick a material that has good adhesion 00:39:52.390 --> 00:39:54.700 align:middle line:90% so it doesn't peel off. 00:39:54.700 --> 00:39:58.240 align:middle line:84% And of course, good electrical conductivity and low contact 00:39:58.240 --> 00:39:59.720 align:middle line:90% resistance silicon aluminum. 00:39:59.720 --> 00:40:02.100 align:middle line:84% So that's to satisfy all of these things. 00:40:02.100 --> 00:40:06.500 align:middle line:84% And these materials, titanium and tungsten, 00:40:06.500 --> 00:40:08.300 align:middle line:84% have reasonable contact resistivity. 00:40:08.300 --> 00:40:11.420 align:middle line:84% They are still not low enough to meet a lot of the ITRS 00:40:11.420 --> 00:40:14.780 align:middle line:84% requirements in the future, but today they're good enough. 00:40:14.780 --> 00:40:17.880 align:middle line:90% 00:40:17.880 --> 00:40:19.350 align:middle line:90% Oh, this is just-- 00:40:19.350 --> 00:40:22.470 align:middle line:84% on slide 19, I took from a different textbook. 00:40:22.470 --> 00:40:24.600 align:middle line:84% This is a figure from Mayer and Lau. 00:40:24.600 --> 00:40:27.210 align:middle line:84% I had mentioned Mayer--Lau textbook at the very beginning 00:40:27.210 --> 00:40:27.970 align:middle line:90% of this course. 00:40:27.970 --> 00:40:30.160 align:middle line:90% So you have a reference to it. 00:40:30.160 --> 00:40:33.480 align:middle line:84% And this is just an example of in his book 00:40:33.480 --> 00:40:37.398 align:middle line:84% how he's saying titanium may work as a sacrificial barrier. 00:40:37.398 --> 00:40:38.940 align:middle line:84% May or may not exactly work this way, 00:40:38.940 --> 00:40:41.760 align:middle line:84% but it's one potential methodology. 00:40:41.760 --> 00:40:43.860 align:middle line:84% You can imagine having a thin layer of titanium 00:40:43.860 --> 00:40:46.050 align:middle line:90% with aluminum on top. 00:40:46.050 --> 00:40:48.870 align:middle line:84% When you heat the structure, you may 00:40:48.870 --> 00:40:54.510 align:middle line:84% get formation of TiAl3 for some time and portion. 00:40:54.510 --> 00:40:56.250 align:middle line:84% And then you heat it a little bit longer 00:40:56.250 --> 00:41:00.390 align:middle line:84% and all the titanium is consumed. 00:41:00.390 --> 00:41:03.330 align:middle line:84% And then here at this point in D, 00:41:03.330 --> 00:41:06.840 align:middle line:84% you can start to get the aluminum incursion. 00:41:06.840 --> 00:41:09.510 align:middle line:84% So the idea is you put down enough titanium 00:41:09.510 --> 00:41:12.520 align:middle line:84% that you're not going to end up with a spiking problem. 00:41:12.520 --> 00:41:16.500 align:middle line:84% And typically, if you want to anneal a typical forming gas 00:41:16.500 --> 00:41:19.650 align:middle line:84% anneal, 450 or so, 1,000 angstroms of titanium 00:41:19.650 --> 00:41:21.990 align:middle line:84% seems to be adequate barrier layer. 00:41:21.990 --> 00:41:24.795 align:middle line:84% But again, it depends on your backend thermal budget. 00:41:24.795 --> 00:41:28.660 align:middle line:90% 00:41:28.660 --> 00:41:30.760 align:middle line:84% Slide 20 is just another example saying 00:41:30.760 --> 00:41:33.520 align:middle line:84% that depending on the barrier layer that you choose, 00:41:33.520 --> 00:41:35.450 align:middle line:90% you have to be careful. 00:41:35.450 --> 00:41:37.750 align:middle line:84% A lot of these materials for barrier layers. 00:41:37.750 --> 00:41:41.500 align:middle line:84% Ti-tungsten or Ti-nitride are very often-- 00:41:41.500 --> 00:41:43.480 align:middle line:84% they're polycrystalline, basically. 00:41:43.480 --> 00:41:45.520 align:middle line:84% And what can happen if you're not careful 00:41:45.520 --> 00:41:49.210 align:middle line:84% is the aluminum can actually diffuse through the long grain 00:41:49.210 --> 00:41:52.570 align:middle line:84% boundaries and can still make its way to the silicon 00:41:52.570 --> 00:41:54.830 align:middle line:90% and end up causing problems. 00:41:54.830 --> 00:41:57.580 align:middle line:84% So people often, when they deposit these material, 00:41:57.580 --> 00:42:00.280 align:middle line:84% they sometimes sputter them in an ambient 00:42:00.280 --> 00:42:02.500 align:middle line:90% that has some impurity. 00:42:02.500 --> 00:42:04.750 align:middle line:84% Could be nitrogen, is one of the most common. 00:42:04.750 --> 00:42:08.710 align:middle line:84% Sometimes people actually do sputter Ti-tungsten, 00:42:08.710 --> 00:42:12.190 align:middle line:84% and then they expose it to air for a period, a few minutes 00:42:12.190 --> 00:42:13.030 align:middle line:90% or half an hour. 00:42:13.030 --> 00:42:14.680 align:middle line:84% Then they put the aluminum on top. 00:42:14.680 --> 00:42:18.460 align:middle line:84% The idea is that these either nitrogen or oxygen impurities 00:42:18.460 --> 00:42:21.190 align:middle line:84% are going to end up being very high concentration 00:42:21.190 --> 00:42:23.470 align:middle line:90% in these grain boundaries. 00:42:23.470 --> 00:42:25.090 align:middle line:84% This is called a stuffed barrier. 00:42:25.090 --> 00:42:26.740 align:middle line:84% By stuffing the grain boundaries, 00:42:26.740 --> 00:42:29.590 align:middle line:84% it helps prevent the aluminum from diffusing down 00:42:29.590 --> 00:42:32.230 align:middle line:90% in and getting to the silicon. 00:42:32.230 --> 00:42:34.122 align:middle line:84% So again, we're going to do a heat treatment. 00:42:34.122 --> 00:42:35.830 align:middle line:84% You're going to put aluminum on top here. 00:42:35.830 --> 00:42:39.640 align:middle line:84% You need to try to prevent the incursion of the aluminum. 00:42:39.640 --> 00:42:42.715 align:middle line:84% So how do you do the sputtering of the barrier layer 00:42:42.715 --> 00:42:43.840 align:middle line:90% is actually very important. 00:42:43.840 --> 00:42:45.760 align:middle line:84% What ambient you use will determine 00:42:45.760 --> 00:42:48.190 align:middle line:84% whether it's a good barrier layer or a poor barrier layer 00:42:48.190 --> 00:42:50.320 align:middle line:84% and how long it's going to stand up. 00:42:50.320 --> 00:42:54.725 align:middle line:84% So a lot of it's quasi empirical, just testing of what 00:42:54.725 --> 00:42:55.225 align:middle line:90% works. 00:42:55.225 --> 00:42:58.720 align:middle line:90% 00:42:58.720 --> 00:43:03.520 align:middle line:84% On this page 21, I'm showing a classic process 00:43:03.520 --> 00:43:05.770 align:middle line:84% that was developed a number of years ago called 00:43:05.770 --> 00:43:06.825 align:middle line:90% the salicide process. 00:43:06.825 --> 00:43:08.950 align:middle line:84% And this is something you need to be familiar with. 00:43:08.950 --> 00:43:14.980 align:middle line:84% Salicide stands for-- the sal comes from self-aligned silicide 00:43:14.980 --> 00:43:15.610 align:middle line:90% process. 00:43:15.610 --> 00:43:17.110 align:middle line:84% And you'll see when we go through it 00:43:17.110 --> 00:43:19.270 align:middle line:90% what we mean by self-aligned. 00:43:19.270 --> 00:43:23.245 align:middle line:84% So we start here with our naked device ready to be contacted. 00:43:23.245 --> 00:43:24.370 align:middle line:90% We don't have any contacts. 00:43:24.370 --> 00:43:26.200 align:middle line:84% We just have N plus source and drain. 00:43:26.200 --> 00:43:29.870 align:middle line:84% And you have a heavily doped polysilicon layer. 00:43:29.870 --> 00:43:32.000 align:middle line:90% We then form our oxide spacers. 00:43:32.000 --> 00:43:34.010 align:middle line:84% So you know how to form sidewall spacers now. 00:43:34.010 --> 00:43:38.510 align:middle line:84% You deposit a conformal layer of SiO2, say low temperature oxide, 00:43:38.510 --> 00:43:41.330 align:middle line:84% and then you etch it back anisotropically. 00:43:41.330 --> 00:43:44.060 align:middle line:84% So you end up with these little stringers on the edges, which 00:43:44.060 --> 00:43:45.290 align:middle line:90% we call sidewalls. 00:43:45.290 --> 00:43:47.450 align:middle line:90% OK, those are critical. 00:43:47.450 --> 00:43:51.140 align:middle line:84% So they're going to form sort of a blocking region, which 00:43:51.140 --> 00:43:53.660 align:middle line:84% will be critical in the salicide process. 00:43:53.660 --> 00:43:56.270 align:middle line:84% We then deposit metal, M, over everything. 00:43:56.270 --> 00:43:58.850 align:middle line:84% So you can do some kind of PBD deposition. 00:43:58.850 --> 00:44:01.970 align:middle line:84% And here's your titanium layer that goes everywhere, obviously 00:44:01.970 --> 00:44:03.480 align:middle line:90% across the whole wafer. 00:44:03.480 --> 00:44:07.230 align:middle line:84% And then you do a magic anneal at the right temperature. 00:44:07.230 --> 00:44:10.110 align:middle line:84% And this anneal is such that wherever 00:44:10.110 --> 00:44:12.690 align:middle line:84% the metal, the titanium, is contacting the silicon, 00:44:12.690 --> 00:44:16.777 align:middle line:84% you form a metal silicide, say TiSi2. 00:44:16.777 --> 00:44:18.360 align:middle line:84% So it only forms where it's in contact 00:44:18.360 --> 00:44:20.730 align:middle line:84% with silicon, which is right here, this dark region, 00:44:20.730 --> 00:44:21.840 align:middle line:90% and on top of the gate. 00:44:21.840 --> 00:44:24.390 align:middle line:84% So on the source, gate, and drains where it's in contact 00:44:24.390 --> 00:44:27.780 align:middle line:84% with silicon-- remember, the polysilicon gate will also 00:44:27.780 --> 00:44:29.160 align:middle line:90% react-- 00:44:29.160 --> 00:44:31.320 align:middle line:90% you have titanium disilicide. 00:44:31.320 --> 00:44:35.460 align:middle line:84% Everywhere else you have still remaining some unreacted metal. 00:44:35.460 --> 00:44:37.350 align:middle line:90% So it's still sitting there. 00:44:37.350 --> 00:44:41.580 align:middle line:84% Now, a key to the processes that you dip it in some solution-- 00:44:41.580 --> 00:44:44.910 align:middle line:84% sometimes it's HF, sometimes it's sulfuric-- 00:44:44.910 --> 00:44:48.300 align:middle line:84% that removes unreacted metal but that does not 00:44:48.300 --> 00:44:51.670 align:middle line:90% etch the silicide itself. 00:44:51.670 --> 00:44:55.050 align:middle line:84% So we've created a material, a titanium di silicide or a metal 00:44:55.050 --> 00:44:59.580 align:middle line:84% disilicide, that because of the virtue of its chemical 00:44:59.580 --> 00:45:02.730 align:middle line:84% structure, it now stands up to the etch, which will 00:45:02.730 --> 00:45:04.260 align:middle line:90% remove the unreacted metal. 00:45:04.260 --> 00:45:07.050 align:middle line:84% So the reason it's called self-aligned, 00:45:07.050 --> 00:45:10.110 align:middle line:84% you notice I did not have to do any photolithography 00:45:10.110 --> 00:45:12.060 align:middle line:90% to pattern this metal. 00:45:12.060 --> 00:45:14.550 align:middle line:84% The metal was deposited over the entire chip. 00:45:14.550 --> 00:45:17.280 align:middle line:84% It was reacted with the silicon, and then it was just 00:45:17.280 --> 00:45:18.870 align:middle line:90% etched off in a blanket etch. 00:45:18.870 --> 00:45:23.350 align:middle line:84% So there's no photoresist step here to pattern this metal. 00:45:23.350 --> 00:45:25.720 align:middle line:84% That's why it's self-aligned because wherever there's 00:45:25.720 --> 00:45:28.570 align:middle line:84% exposed silicon, you will end up with a metal 00:45:28.570 --> 00:45:31.030 align:middle line:84% contact, a line to that exposed silicon, 00:45:31.030 --> 00:45:34.970 align:middle line:84% without having to do another lithography step. 00:45:34.970 --> 00:45:37.900 align:middle line:84% So this was a really great invention. 00:45:37.900 --> 00:45:40.160 align:middle line:84% You would save yourself an alignment tolerance. 00:45:40.160 --> 00:45:42.190 align:middle line:90% So it's very good alignment. 00:45:42.190 --> 00:45:45.190 align:middle line:84% You form a low resistance contact to the source drain 00:45:45.190 --> 00:45:47.650 align:middle line:90% and to the gate simultaneously. 00:45:47.650 --> 00:45:49.390 align:middle line:84% So this kind of a salicide process 00:45:49.390 --> 00:45:53.350 align:middle line:84% was a big breakthrough in CMOS technology, 00:45:53.350 --> 00:45:55.045 align:middle line:90% say around the 80s or so. 00:45:55.045 --> 00:45:58.360 align:middle line:90% 00:45:58.360 --> 00:46:01.480 align:middle line:84% Slide 22, I just took from a different text. 00:46:01.480 --> 00:46:03.430 align:middle line:84% It has a slightly different type of drawing. 00:46:03.430 --> 00:46:04.810 align:middle line:90% Maybe it's easier to understand. 00:46:04.810 --> 00:46:07.210 align:middle line:84% They have a little different notation. 00:46:07.210 --> 00:46:08.480 align:middle line:90% It's the exact same process. 00:46:08.480 --> 00:46:09.970 align:middle line:90% It's the basic salicide process. 00:46:09.970 --> 00:46:11.620 align:middle line:84% You have an N plus source and drain. 00:46:11.620 --> 00:46:14.170 align:middle line:90% You form your spacers. 00:46:14.170 --> 00:46:16.510 align:middle line:90% You react the metal. 00:46:16.510 --> 00:46:17.530 align:middle line:90% It does not react. 00:46:17.530 --> 00:46:20.050 align:middle line:84% Hopefully it does not creep up the sidewall, 00:46:20.050 --> 00:46:21.400 align:middle line:90% which is a problem. 00:46:21.400 --> 00:46:24.460 align:middle line:84% You then selectively remove the unreacted metal form, 00:46:24.460 --> 00:46:26.200 align:middle line:84% put your dielectric down everywhere else, 00:46:26.200 --> 00:46:28.510 align:middle line:90% and put in your metal contacts. 00:46:28.510 --> 00:46:33.475 align:middle line:84% So that's a basic metal contact scheme that people use today. 00:46:33.475 --> 00:46:36.270 align:middle line:90% 00:46:36.270 --> 00:46:37.290 align:middle line:90% What do people use? 00:46:37.290 --> 00:46:38.780 align:middle line:84% Which materials are commonly used? 00:46:38.780 --> 00:46:41.930 align:middle line:84% Well, some of them are shown here on slide 23. 00:46:41.930 --> 00:46:47.090 align:middle line:84% The first one that was used historically was Ti-silicide. 00:46:47.090 --> 00:46:50.300 align:middle line:84% Ti-silicide was very good because it has a low resistivity 00:46:50.300 --> 00:46:51.770 align:middle line:90% phase. 00:46:51.770 --> 00:46:56.870 align:middle line:84% And we're talking about maybe a 15 micro ohm centimeter 00:46:56.870 --> 00:47:00.440 align:middle line:84% for a particular phase that's formed on a particular type 00:47:00.440 --> 00:47:03.140 align:middle line:90% of annealing. 00:47:03.140 --> 00:47:04.860 align:middle line:84% There's a little difficulty, though. 00:47:04.860 --> 00:47:07.940 align:middle line:84% As people make the polysilicon gate length shorter, 00:47:07.940 --> 00:47:11.115 align:middle line:84% it's harder and harder to get this particular phase to form. 00:47:11.115 --> 00:47:13.490 align:middle line:84% This is called the narrow line effect or the narrow width 00:47:13.490 --> 00:47:14.150 align:middle line:90% effect. 00:47:14.150 --> 00:47:16.280 align:middle line:90% Usually the narrow line effect. 00:47:16.280 --> 00:47:18.773 align:middle line:84% Ti-silicide also has a tendency to agglomerate 00:47:18.773 --> 00:47:20.940 align:middle line:84% when it's very thin at higher annealing temperature. 00:47:20.940 --> 00:47:22.460 align:middle line:84% So it's not that thermally stable. 00:47:22.460 --> 00:47:25.250 align:middle line:84% So for a number of reasons, particularly the narrow line 00:47:25.250 --> 00:47:28.760 align:middle line:84% effect, industry moved a number of years 00:47:28.760 --> 00:47:31.730 align:middle line:84% ago primarily from Ti-silicide, although some people may still 00:47:31.730 --> 00:47:33.620 align:middle line:90% use it, to cobalt bisilicide. 00:47:33.620 --> 00:47:36.330 align:middle line:84% It does not have that narrow line effect, 00:47:36.330 --> 00:47:40.472 align:middle line:84% but it gives you a slightly higher resistivity. 00:47:40.472 --> 00:47:42.680 align:middle line:84% It's a little more sensitive to surface contaminants. 00:47:42.680 --> 00:47:45.830 align:middle line:84% The beauty of Ti is, again, the titanium 00:47:45.830 --> 00:47:47.780 align:middle line:84% eats its way through things, through oxides, 00:47:47.780 --> 00:47:48.860 align:middle line:90% sort of reduce oxides. 00:47:48.860 --> 00:47:53.660 align:middle line:84% So cobalt, you have to have a really clean interface. 00:47:53.660 --> 00:47:55.880 align:middle line:84% Cobalt has a little less lateral encroachment 00:47:55.880 --> 00:47:57.080 align:middle line:90% over the oxide spacer. 00:47:57.080 --> 00:47:59.400 align:middle line:90% And I'll show pictures of that. 00:47:59.400 --> 00:48:02.630 align:middle line:84% So cobalt was used and is still used in some processes. 00:48:02.630 --> 00:48:05.240 align:middle line:84% The latest silicide that people are exploring in research 00:48:05.240 --> 00:48:07.640 align:middle line:84% and development-- and at some point will probably 00:48:07.640 --> 00:48:11.230 align:middle line:84% be in production-- is nickel silicide. 00:48:11.230 --> 00:48:13.660 align:middle line:84% Nickel silicide has the lowest silicon consumption. 00:48:13.660 --> 00:48:15.310 align:middle line:84% In order to do this, you need to react 00:48:15.310 --> 00:48:17.170 align:middle line:84% and you need to consume some of the silicon. 00:48:17.170 --> 00:48:18.400 align:middle line:84% And you don't want to consume very much 00:48:18.400 --> 00:48:19.760 align:middle line:90% of that shallow junction. 00:48:19.760 --> 00:48:21.700 align:middle line:84% So nickel is good because of that. 00:48:21.700 --> 00:48:23.920 align:middle line:84% It can be formed at very low temperatures. 00:48:23.920 --> 00:48:27.370 align:middle line:84% And it doesn't have very bad narrow line effect for silicide 00:48:27.370 --> 00:48:28.120 align:middle line:90% in the gate. 00:48:28.120 --> 00:48:31.588 align:middle line:84% Big problem with nickel is you have 00:48:31.588 --> 00:48:33.130 align:middle line:84% to be careful of your thermal budget. 00:48:33.130 --> 00:48:34.172 align:middle line:90% And watch out for nickel. 00:48:34.172 --> 00:48:36.430 align:middle line:84% Nickel is a very fast diffuser, remember, in silicon. 00:48:36.430 --> 00:48:39.190 align:middle line:90% Nickel is also a deep level. 00:48:39.190 --> 00:48:43.510 align:middle line:84% So nickel contamination of equipment and of the wafers 00:48:43.510 --> 00:48:44.470 align:middle line:90% is an issue. 00:48:44.470 --> 00:48:46.090 align:middle line:84% And people need to deal with this. 00:48:46.090 --> 00:48:49.690 align:middle line:84% But nickel silicide is becoming more and more 00:48:49.690 --> 00:48:52.540 align:middle line:84% prevalent in research and development. 00:48:52.540 --> 00:48:55.140 align:middle line:90% 00:48:55.140 --> 00:48:58.590 align:middle line:84% I mentioned there was a problem with this encroachment 00:48:58.590 --> 00:48:59.880 align:middle line:90% over the spacer. 00:48:59.880 --> 00:49:05.280 align:middle line:84% And this is illustrated on slide 24. 00:49:05.280 --> 00:49:07.170 align:middle line:84% On the left-hand side, I'm showing 00:49:07.170 --> 00:49:12.690 align:middle line:84% the case of a cobalt disilicide formation 00:49:12.690 --> 00:49:14.730 align:middle line:84% where it's the metal that diffuses. 00:49:14.730 --> 00:49:17.340 align:middle line:84% So you can imagine that you have this metal that's 00:49:17.340 --> 00:49:18.402 align:middle line:90% deposited everywhere. 00:49:18.402 --> 00:49:20.610 align:middle line:84% And you're going to form a reaction between the metal 00:49:20.610 --> 00:49:22.130 align:middle line:90% and the silicon. 00:49:22.130 --> 00:49:24.560 align:middle line:84% The question is, how does the reaction occur? 00:49:24.560 --> 00:49:27.140 align:middle line:84% Does the metal diffuse in and meet 00:49:27.140 --> 00:49:30.180 align:middle line:84% the silicon down at this interface or vice versa? 00:49:30.180 --> 00:49:34.760 align:middle line:84% Well, it depends on the particular type of silicide. 00:49:34.760 --> 00:49:36.350 align:middle line:84% In the case of cobalt disilicide, 00:49:36.350 --> 00:49:40.010 align:middle line:84% the metal diffuses through the silicide into this interface 00:49:40.010 --> 00:49:43.590 align:middle line:90% here and then reacts. 00:49:43.590 --> 00:49:46.740 align:middle line:84% So you get silicide reaction or formation at the bottom here. 00:49:46.740 --> 00:49:49.890 align:middle line:84% So you're less likely to have creep up. 00:49:49.890 --> 00:49:52.800 align:middle line:84% In the case of titanium disilicide, 00:49:52.800 --> 00:49:54.810 align:middle line:84% in fact, what happens is the silicon 00:49:54.810 --> 00:49:57.210 align:middle line:84% is what's the fast diffuser through the Ti-silicide. 00:49:57.210 --> 00:49:59.770 align:middle line:84% It diffuses up and meets the metal. 00:49:59.770 --> 00:50:02.460 align:middle line:84% So if you do it long enough and if you 00:50:02.460 --> 00:50:04.710 align:middle line:84% have a short enough spacer, you can see the disilicide 00:50:04.710 --> 00:50:07.680 align:middle line:84% can creep and grow up from the source 00:50:07.680 --> 00:50:09.570 align:middle line:90% and drain down from the gate. 00:50:09.570 --> 00:50:11.700 align:middle line:84% And eventually you may actually bridge. 00:50:11.700 --> 00:50:13.950 align:middle line:84% And then you have a big problem because then your gate 00:50:13.950 --> 00:50:15.992 align:middle line:84% is electrically shorted to your source and drain. 00:50:15.992 --> 00:50:18.240 align:middle line:90% And then your device is dead. 00:50:18.240 --> 00:50:21.540 align:middle line:84% So titanium disilicide has a little more tendency 00:50:21.540 --> 00:50:24.600 align:middle line:84% to do this than the cobalt disilicide. 00:50:24.600 --> 00:50:28.110 align:middle line:84% This is part of the reason people went to cobalt despite, 00:50:28.110 --> 00:50:30.900 align:middle line:84% the fact, it has a slightly higher resistivity. 00:50:30.900 --> 00:50:34.230 align:middle line:90% 00:50:34.230 --> 00:50:36.960 align:middle line:84% Slide 25 is just kind of an illustration 00:50:36.960 --> 00:50:38.520 align:middle line:84% of some of the kinetics of what's 00:50:38.520 --> 00:50:43.770 align:middle line:84% happening when you have titanium on silicon that's reacting. 00:50:43.770 --> 00:50:46.110 align:middle line:84% Here we have a certain thickness of Ti-silicide 00:50:46.110 --> 00:50:47.970 align:middle line:90% that's already formed. 00:50:47.970 --> 00:50:49.110 align:middle line:90% People do model this. 00:50:49.110 --> 00:50:52.620 align:middle line:84% There are silicide models in SUPREM-IV. 00:50:52.620 --> 00:50:54.700 align:middle line:84% Not necessarily perfectly accurate, 00:50:54.700 --> 00:50:57.360 align:middle line:84% but what people model is the diffusion 00:50:57.360 --> 00:51:00.330 align:middle line:84% of the silicon from the bulk through the titanium 00:51:00.330 --> 00:51:04.050 align:middle line:84% disilicide up here to this top interface and form 00:51:04.050 --> 00:51:08.590 align:middle line:84% a new layer of titanium disilicide. 00:51:08.590 --> 00:51:12.250 align:middle line:84% So this is what might happen in an inert ambient. 00:51:12.250 --> 00:51:15.310 align:middle line:84% Now, if you do the anneal in a nitriding ambient, 00:51:15.310 --> 00:51:17.680 align:middle line:84% so in an ambient that has nitrogen, at the same time, 00:51:17.680 --> 00:51:20.440 align:middle line:84% you're forming Ti-silicide at this interface, 00:51:20.440 --> 00:51:21.520 align:middle line:90% you can be reacting. 00:51:21.520 --> 00:51:22.900 align:middle line:90% The titanium is fairly reactive. 00:51:22.900 --> 00:51:25.450 align:middle line:84% You can be reacting in form Ti-nitrite 00:51:25.450 --> 00:51:27.230 align:middle line:90% up here at the top interface. 00:51:27.230 --> 00:51:29.260 align:middle line:84% So this would be in a nitrogen ambient, 00:51:29.260 --> 00:51:32.440 align:middle line:84% you can get simultaneous formation of Ti-silicide 00:51:32.440 --> 00:51:37.261 align:middle line:84% down here and then Ti-nitride on top of the titanium. 00:51:37.261 --> 00:51:39.490 align:middle line:84% Titanium is very reactive, so it's not 00:51:39.490 --> 00:51:41.680 align:middle line:84% unusual to try to form a Ti-nitride 00:51:41.680 --> 00:51:43.360 align:middle line:90% to prevent it from oxidizing. 00:51:43.360 --> 00:51:47.720 align:middle line:90% 00:51:47.720 --> 00:51:51.560 align:middle line:84% Slide 26 shows you some of the different uses of silicide 00:51:51.560 --> 00:51:52.850 align:middle line:90% in silicon technology. 00:51:52.850 --> 00:51:54.260 align:middle line:90% And I've actually updated it. 00:51:54.260 --> 00:51:55.700 align:middle line:90% I added a fourth one. 00:51:55.700 --> 00:51:58.670 align:middle line:84% So silicide are used, as you can see, to strap the poly. 00:51:58.670 --> 00:52:00.170 align:middle line:84% And the reason you do that is you're 00:52:00.170 --> 00:52:02.003 align:middle line:84% trying to reduce the resistance of the gate. 00:52:02.003 --> 00:52:05.630 align:middle line:84% So you form a little silicide during the salicide process. 00:52:05.630 --> 00:52:06.857 align:middle line:90% Strap the junctions. 00:52:06.857 --> 00:52:07.940 align:middle line:90% Well, what does that mean? 00:52:07.940 --> 00:52:09.920 align:middle line:84% Again, you're going to reduce the sheet 00:52:09.920 --> 00:52:13.350 align:middle line:84% resistance of this junction by forming a thin layer. 00:52:13.350 --> 00:52:15.330 align:middle line:84% It also forms a barrier layer, as we mentioned. 00:52:15.330 --> 00:52:16.955 align:middle line:84% It can be used as a local interconnect. 00:52:16.955 --> 00:52:20.600 align:middle line:84% Here the silicide has actually been formed above this oxide. 00:52:20.600 --> 00:52:26.020 align:middle line:84% So some silicon must have been deposited prior to that. 00:52:26.020 --> 00:52:28.850 align:middle line:84% And finally, it can be used as a gate material. 00:52:28.850 --> 00:52:30.940 align:middle line:84% And at the end, I've added a few slides 00:52:30.940 --> 00:52:33.580 align:middle line:84% that show you that people are actually using silicides 00:52:33.580 --> 00:52:36.070 align:middle line:90% as metal gates. 00:52:36.070 --> 00:52:38.950 align:middle line:84% This is a table here shown on slide 26 00:52:38.950 --> 00:52:40.960 align:middle line:84% of some of the common silicides and some 00:52:40.960 --> 00:52:43.160 align:middle line:90% of their important properties. 00:52:43.160 --> 00:52:46.060 align:middle line:84% So here you notice for Ti-silicide there 00:52:46.060 --> 00:52:47.900 align:middle line:90% are two phases. 00:52:47.900 --> 00:52:50.210 align:middle line:84% There is a phase called the C49 phase. 00:52:50.210 --> 00:52:52.110 align:middle line:90% That forms at low temperatures. 00:52:52.110 --> 00:52:54.110 align:middle line:84% So if you were anneal the titanium 00:52:54.110 --> 00:52:57.860 align:middle line:84% and react it with silicon, say between 500 to 700, 00:52:57.860 --> 00:52:58.910 align:middle line:90% say around 600-- 00:52:58.910 --> 00:53:02.000 align:middle line:84% you get a resistivity of about 60 to 70 micro ohm centimeter. 00:53:02.000 --> 00:53:07.010 align:middle line:84% That's too high for the film resistivity 00:53:07.010 --> 00:53:08.340 align:middle line:90% for most applications. 00:53:08.340 --> 00:53:11.850 align:middle line:84% So people typically do a low temperature anneal 00:53:11.850 --> 00:53:13.560 align:middle line:90% to form the C49 phase. 00:53:13.560 --> 00:53:16.410 align:middle line:84% They then etch off all the unreacted titanium. 00:53:16.410 --> 00:53:20.460 align:middle line:84% They put it back in the RTA and they pop it up to 800 or 900 00:53:20.460 --> 00:53:25.440 align:middle line:84% to do a high temperature anneal to form the C54 phase, which has 00:53:25.440 --> 00:53:28.990 align:middle line:90% a much lower sheet resistance. 00:53:28.990 --> 00:53:31.870 align:middle line:84% Nice thing about Ti-silicide, it's reasonably stable, maybe up 00:53:31.870 --> 00:53:36.130 align:middle line:84% to about 800, 900 degrees, something like that. 00:53:36.130 --> 00:53:38.870 align:middle line:84% It does consume a fair amount of silicon. 00:53:38.870 --> 00:53:43.060 align:middle line:84% So it consumes 2.2 or 2.3 or so nanometers 00:53:43.060 --> 00:53:46.885 align:middle line:84% of silicon per every nanometer of metal that's consumed. 00:53:46.885 --> 00:53:49.510 align:middle line:84% But depending on how thick of a silicide you're trying to form, 00:53:49.510 --> 00:53:50.890 align:middle line:90% you may eat into your junction. 00:53:50.890 --> 00:53:53.348 align:middle line:84% If you have a very shallow junction, you have to watch out. 00:53:53.348 --> 00:53:55.600 align:middle line:84% You don't want to eat in too far. 00:53:55.600 --> 00:53:59.260 align:middle line:84% So cobalt disilicide is another example here. 00:53:59.260 --> 00:54:04.360 align:middle line:84% You can see it's got a somewhat higher resistivity. 00:54:04.360 --> 00:54:06.860 align:middle line:84% This is the temperature at which it's formed. 00:54:06.860 --> 00:54:13.140 align:middle line:84% It consumes a little bit less than the case of titanium. 00:54:13.140 --> 00:54:15.510 align:middle line:84% The modern silicide that I mentioned here 00:54:15.510 --> 00:54:18.750 align:middle line:90% is this nickel silicide, NiSi. 00:54:18.750 --> 00:54:23.160 align:middle line:84% It's formed at very low temperatures, 450 or 500. 00:54:23.160 --> 00:54:27.510 align:middle line:84% And it has a low consumption, only 1.8 nanometers 00:54:27.510 --> 00:54:30.253 align:middle line:84% of silicon consumed per nanometer of metal. 00:54:30.253 --> 00:54:32.670 align:middle line:84% One thing about this, though, if you look at the stability 00:54:32.670 --> 00:54:34.545 align:middle line:84% temperature-- look at this column here called 00:54:34.545 --> 00:54:35.820 align:middle line:90% stable on silicon. 00:54:35.820 --> 00:54:36.930 align:middle line:90% Be very careful. 00:54:36.930 --> 00:54:38.760 align:middle line:84% People have listed nickel silicide 00:54:38.760 --> 00:54:41.280 align:middle line:90% as being stable up to about 650. 00:54:41.280 --> 00:54:42.780 align:middle line:84% It may not even be stable that high. 00:54:42.780 --> 00:54:43.920 align:middle line:90% Maybe 600 or so. 00:54:43.920 --> 00:54:46.710 align:middle line:84% So unlike some of these others, which 00:54:46.710 --> 00:54:48.540 align:middle line:84% you can heat up Ti-silicide or platinum, 00:54:48.540 --> 00:54:50.023 align:middle line:90% you can heat up to 800 or so. 00:54:50.023 --> 00:54:51.690 align:middle line:84% You cannot do that with nickel silicide. 00:54:51.690 --> 00:54:53.740 align:middle line:84% So if you're using a nickel silicide process, 00:54:53.740 --> 00:54:57.720 align:middle line:84% you're going to be limited to a lower backend temperature. 00:54:57.720 --> 00:55:00.990 align:middle line:84% But you can get reasonably low sheet resistance. 00:55:00.990 --> 00:55:05.510 align:middle line:90% 00:55:05.510 --> 00:55:08.180 align:middle line:84% Slide 27, I just want to show you an example. 00:55:08.180 --> 00:55:10.640 align:middle line:84% And we'll go through these calculations 00:55:10.640 --> 00:55:11.730 align:middle line:90% at the end of the lecture. 00:55:11.730 --> 00:55:16.670 align:middle line:84% But I want to go on and do the gate material work first. 00:55:16.670 --> 00:55:21.210 align:middle line:84% But what this is is a cross section of a MOSFET. 00:55:21.210 --> 00:55:25.590 align:middle line:84% And we've seen this cross-section a number of times 00:55:25.590 --> 00:55:26.520 align:middle line:90% now in our class. 00:55:26.520 --> 00:55:29.220 align:middle line:84% We now have enough ammunition that we can actually 00:55:29.220 --> 00:55:31.770 align:middle line:84% go sit down and calculate all these resistances 00:55:31.770 --> 00:55:37.450 align:middle line:84% or estimate them given a geometry of a particular device. 00:55:37.450 --> 00:55:39.575 align:middle line:84% So the resistance that we really, 00:55:39.575 --> 00:55:41.700 align:middle line:84% when we scale the channel length, what we're really 00:55:41.700 --> 00:55:44.220 align:middle line:84% trying to scale is the channel resistance, R chan. 00:55:44.220 --> 00:55:46.110 align:middle line:90% OK, that's fine. 00:55:46.110 --> 00:55:49.500 align:middle line:84% We make the channel shorter, we can reduce that resistance. 00:55:49.500 --> 00:55:52.380 align:middle line:84% But the problem is, what happens to-- if we don't do something 00:55:52.380 --> 00:55:54.195 align:middle line:84% to all these other parasitic resistances, 00:55:54.195 --> 00:55:56.370 align:middle line:84% the net resistance of the device is really not 00:55:56.370 --> 00:55:58.540 align:middle line:90% going to go down by very much. 00:55:58.540 --> 00:56:00.300 align:middle line:84% So there are three resistances we really 00:56:00.300 --> 00:56:02.200 align:middle line:90% want to be able to think about. 00:56:02.200 --> 00:56:04.330 align:middle line:84% One is this little resistor right here, 00:56:04.330 --> 00:56:07.110 align:middle line:84% which is the resistance associated with the source drain 00:56:07.110 --> 00:56:08.430 align:middle line:90% extension. 00:56:08.430 --> 00:56:10.440 align:middle line:84% It has a certain sheet resistance. 00:56:10.440 --> 00:56:11.807 align:middle line:90% It's doped to a certain level. 00:56:11.807 --> 00:56:13.140 align:middle line:90% It has a certain junction depth. 00:56:13.140 --> 00:56:15.130 align:middle line:90% It's usually very shallow. 00:56:15.130 --> 00:56:17.700 align:middle line:84% So this resistance of the source drain extension 00:56:17.700 --> 00:56:19.980 align:middle line:84% is one resistance we have to calculate. 00:56:19.980 --> 00:56:25.413 align:middle line:84% The second one is the resistance of this region here, R, that-- 00:56:25.413 --> 00:56:27.330 align:middle line:84% and generally, this region has been silicided. 00:56:27.330 --> 00:56:28.872 align:middle line:84% You notice the source drain extension 00:56:28.872 --> 00:56:30.910 align:middle line:84% is under the spacer by definition, 00:56:30.910 --> 00:56:32.250 align:middle line:90% so it's not silicided. 00:56:32.250 --> 00:56:35.440 align:middle line:84% So the current has to flow strictly through the silicon. 00:56:35.440 --> 00:56:37.620 align:middle line:84% So it will have a certain higher resistivity. 00:56:37.620 --> 00:56:39.787 align:middle line:84% In this case, this region is blue. 00:56:39.787 --> 00:56:40.620 align:middle line:90% It's been silicided. 00:56:40.620 --> 00:56:42.370 align:middle line:84% So it's going to have a lower resistivity. 00:56:42.370 --> 00:56:44.200 align:middle line:90% It's got a metal on top of it. 00:56:44.200 --> 00:56:46.680 align:middle line:84% So that's the second resistor we need to calculate. 00:56:46.680 --> 00:56:49.240 align:middle line:84% The third one is the resistance of the contact itself. 00:56:49.240 --> 00:56:52.050 align:middle line:84% So it's the contact resistance from the current flowing 00:56:52.050 --> 00:56:55.540 align:middle line:84% through the silicon up into the metal. 00:56:55.540 --> 00:56:57.190 align:middle line:84% And that would calculate if we know 00:56:57.190 --> 00:56:59.620 align:middle line:84% the area and the specific contact resistivity. 00:56:59.620 --> 00:57:01.810 align:middle line:84% So all three of these-- the source drain extension 00:57:01.810 --> 00:57:05.230 align:middle line:84% resistance, the silicide resistance, and the contact 00:57:05.230 --> 00:57:07.720 align:middle line:84% resistance-- all three are going to add up and give us 00:57:07.720 --> 00:57:09.950 align:middle line:84% different contributions depending on the geometry. 00:57:09.950 --> 00:57:12.035 align:middle line:84% So I want to go through a calculation of this. 00:57:12.035 --> 00:57:13.660 align:middle line:84% I'm going to hold off for now because I 00:57:13.660 --> 00:57:18.070 align:middle line:84% want to make sure we cover the novel gate material aspects. 00:57:18.070 --> 00:57:20.080 align:middle line:90% But we'll come back to this. 00:57:20.080 --> 00:57:22.090 align:middle line:84% And you should be able to sit down at this point 00:57:22.090 --> 00:57:23.715 align:middle line:84% and calculate all three of these things 00:57:23.715 --> 00:57:28.350 align:middle line:84% and see what they look like for modern technology. 00:57:28.350 --> 00:57:30.810 align:middle line:90% Let's go on for now to slide-- 00:57:30.810 --> 00:57:33.540 align:middle line:84% there's one more-- by the way, I sort of 00:57:33.540 --> 00:57:35.280 align:middle line:90% didn't tell you the whole truth. 00:57:35.280 --> 00:57:37.750 align:middle line:84% I said there are three resistors, this one, this one, 00:57:37.750 --> 00:57:38.580 align:middle line:90% and this one. 00:57:38.580 --> 00:57:39.773 align:middle line:90% It's not quite that simple. 00:57:39.773 --> 00:57:41.940 align:middle line:84% These back-of-the-envelope calculations are terrific 00:57:41.940 --> 00:57:44.880 align:middle line:84% because you can do them in five minutes in class or in 10 00:57:44.880 --> 00:57:46.440 align:middle line:84% minutes in your office or whatever. 00:57:46.440 --> 00:57:49.710 align:middle line:84% There is another resistance called the spreading resistance. 00:57:49.710 --> 00:57:53.970 align:middle line:84% And that's actually pictured-- it cannot be calculated by hand, 00:57:53.970 --> 00:57:58.430 align:middle line:84% but it's actually pictured on page 28 here, 00:57:58.430 --> 00:57:59.570 align:middle line:90% just to give you an idea. 00:57:59.570 --> 00:58:05.450 align:middle line:84% This first was discussed by Ming and Lynch back in the late 80s. 00:58:05.450 --> 00:58:08.300 align:middle line:84% But what it is is you have this channel region 00:58:08.300 --> 00:58:09.680 align:middle line:90% that's very, very thin. 00:58:09.680 --> 00:58:12.620 align:middle line:84% Typically the channel where the electrons are the holes 00:58:12.620 --> 00:58:14.300 align:middle line:84% are traversing across and they're 00:58:14.300 --> 00:58:17.660 align:middle line:84% going across the gate length, that's maybe only 30 angstroms 00:58:17.660 --> 00:58:18.920 align:middle line:90% thick. 00:58:18.920 --> 00:58:21.500 align:middle line:84% So that's where the current is all flowing in the channel. 00:58:21.500 --> 00:58:23.570 align:middle line:84% It's a very, very high density of carriers. 00:58:23.570 --> 00:58:28.460 align:middle line:84% The current then spreads out as it goes into the source drain 00:58:28.460 --> 00:58:28.970 align:middle line:90% extension. 00:58:28.970 --> 00:58:30.200 align:middle line:90% This is such an old paper. 00:58:30.200 --> 00:58:31.610 align:middle line:84% It's before they had source drain extensions. 00:58:31.610 --> 00:58:33.650 align:middle line:84% But you can imagine it then spreads out here 00:58:33.650 --> 00:58:36.050 align:middle line:84% into this region over certain distance. 00:58:36.050 --> 00:58:38.900 align:middle line:84% And how far it spreads out and exactly how it spreads out 00:58:38.900 --> 00:58:42.350 align:middle line:84% depends on the doping and the geometry of the structure. 00:58:42.350 --> 00:58:44.030 align:middle line:84% It's a very two-dimensional problem. 00:58:44.030 --> 00:58:45.360 align:middle line:90% You can't calculate it by hand. 00:58:45.360 --> 00:58:48.410 align:middle line:84% So this that's called the RSP here 00:58:48.410 --> 00:58:51.440 align:middle line:84% in this little diagram where he wrote down 00:58:51.440 --> 00:58:53.160 align:middle line:90% the different resistances. 00:58:53.160 --> 00:58:56.540 align:middle line:84% So our spreading is one that generally 00:58:56.540 --> 00:58:59.120 align:middle line:84% has to be computed either by a two-dimensional simulator 00:58:59.120 --> 00:59:02.850 align:middle line:84% or you have to get it out of test devices or some kind 00:59:02.850 --> 00:59:03.720 align:middle line:90% of test structures. 00:59:03.720 --> 00:59:05.887 align:middle line:84% It's not something you can simply calculate by hand. 00:59:05.887 --> 00:59:07.610 align:middle line:84% But it is a major contributor-- it 00:59:07.610 --> 00:59:11.040 align:middle line:84% can be a major contribution to the total series resistance. 00:59:11.040 --> 00:59:13.730 align:middle line:84% So it's something we need to be concerned about. 00:59:13.730 --> 00:59:16.670 align:middle line:84% But I just want to point out, so those three 00:59:16.670 --> 00:59:18.422 align:middle line:84% resistances we can calculate by hand, 00:59:18.422 --> 00:59:20.880 align:middle line:84% that gives you the minimum series resistance of the device. 00:59:20.880 --> 00:59:22.380 align:middle line:84% There will always be a little extra, 00:59:22.380 --> 00:59:25.940 align:middle line:84% which is spreading resistance, which you have to simulate 00:59:25.940 --> 00:59:27.860 align:middle line:90% in a two-dimensional simulator. 00:59:27.860 --> 00:59:31.113 align:middle line:90% 00:59:31.113 --> 00:59:32.280 align:middle line:90% That's how we make contacts. 00:59:32.280 --> 00:59:35.670 align:middle line:84% I just wanted to go on and spend most of the remaining 00:59:35.670 --> 00:59:39.450 align:middle line:84% time of the lecture and talk about something else that's 00:59:39.450 --> 00:59:43.260 align:middle line:84% come up in the last three or four years, which is related 00:59:43.260 --> 00:59:46.770 align:middle line:84% directly to the contacts because it turns out we can also 00:59:46.770 --> 00:59:48.780 align:middle line:84% use silicides not only for the contacts, 00:59:48.780 --> 00:59:50.940 align:middle line:84% but we can also fully silicide the gate 00:59:50.940 --> 00:59:52.110 align:middle line:90% and use it for the gate. 00:59:52.110 --> 00:59:56.010 align:middle line:84% And I think I showed you this slide last time, page 29. 00:59:56.010 --> 00:59:58.050 align:middle line:84% It was taken directly from the last lecture. 00:59:58.050 --> 00:59:59.820 align:middle line:84% I just wanted to remind you that there 00:59:59.820 --> 01:00:03.170 align:middle line:84% are some new gate materials that are coming along. 01:00:03.170 --> 01:00:06.500 align:middle line:84% This is the more classical older technology, 01:00:06.500 --> 01:00:08.480 align:middle line:90% the traditional technology. 01:00:08.480 --> 01:00:11.060 align:middle line:84% This is a photo from an Intel device. 01:00:11.060 --> 01:00:13.580 align:middle line:90% It's a somewhat older photo now. 01:00:13.580 --> 01:00:17.853 align:middle line:84% This was published back in about five years ago in 2000. 01:00:17.853 --> 01:00:20.520 align:middle line:84% And what it shows is what we've just exactly been talking about. 01:00:20.520 --> 01:00:22.160 align:middle line:90% Here's the polysilicon gate. 01:00:22.160 --> 01:00:23.537 align:middle line:90% These are the sidewall spacers. 01:00:23.537 --> 01:00:24.620 align:middle line:90% You know how to form them. 01:00:24.620 --> 01:00:27.003 align:middle line:84% And this is the silicide in the source. 01:00:27.003 --> 01:00:29.420 align:middle line:84% You can see it looks very dark because it's been silicide. 01:00:29.420 --> 01:00:31.220 align:middle line:90% And the silicide in the drain. 01:00:31.220 --> 01:00:33.830 align:middle line:84% And the silicide that's been formed on the gate. 01:00:33.830 --> 01:00:35.780 align:middle line:84% So that was the salicide processed just 01:00:35.780 --> 01:00:38.000 align:middle line:84% by the process exactly what we just talked about. 01:00:38.000 --> 01:00:41.860 align:middle line:84% That's the classical type of structure. 01:00:41.860 --> 01:00:44.890 align:middle line:84% We talked last time, though, that polysilicon can only 01:00:44.890 --> 01:00:47.280 align:middle line:90% be doped so high. 01:00:47.280 --> 01:00:49.860 align:middle line:84% Maybe you can get it to 10 to the 20 or mid 10 to the 20. 01:00:49.860 --> 01:00:52.170 align:middle line:84% But that's not enough carriers to prevent 01:00:52.170 --> 01:00:56.670 align:middle line:84% depletion of the polysilicon at very high gate biases. 01:00:56.670 --> 01:00:58.600 align:middle line:84% And you get a polysilicon depletion effect. 01:00:58.600 --> 01:01:00.510 align:middle line:90% So people are concerned. 01:01:00.510 --> 01:01:03.040 align:middle line:84% They want to get rid of poly as the gate material. 01:01:03.040 --> 01:01:04.500 align:middle line:90% It doesn't have enough carriers. 01:01:04.500 --> 01:01:07.080 align:middle line:84% Polysilicon may only have maybe 5 times 10 01:01:07.080 --> 01:01:09.960 align:middle line:84% to the 20 electrons per cubic centimeter. 01:01:09.960 --> 01:01:12.480 align:middle line:84% They would like to replace the poly with a gate, 01:01:12.480 --> 01:01:14.460 align:middle line:90% with a metal gate. 01:01:14.460 --> 01:01:16.360 align:middle line:90% A metal has 10 to the 23rd. 01:01:16.360 --> 01:01:18.510 align:middle line:84% So it's three orders of magnitude higher carriers. 01:01:18.510 --> 01:01:20.820 align:middle line:84% So it's not going to get depleted. 01:01:20.820 --> 01:01:23.640 align:middle line:84% So they want to remove the semiconductor from the gate. 01:01:23.640 --> 01:01:26.790 align:middle line:84% But poly is an extremely easy material to integrate. 01:01:26.790 --> 01:01:28.500 align:middle line:90% People know how to etch it. 01:01:28.500 --> 01:01:31.110 align:middle line:90% It's not reactive with SiO2. 01:01:31.110 --> 01:01:32.920 align:middle line:90% That's not the case for metals. 01:01:32.920 --> 01:01:34.110 align:middle line:90% So here's an example. 01:01:34.110 --> 01:01:36.030 align:middle line:84% Last time, in fact, I went through a process 01:01:36.030 --> 01:01:38.250 align:middle line:84% called the replacement gate process where we 01:01:38.250 --> 01:01:40.200 align:middle line:90% showed they actually used poly. 01:01:40.200 --> 01:01:42.450 align:middle line:84% They dug it out at the very end of the process. 01:01:42.450 --> 01:01:45.030 align:middle line:84% They etched out the poly, and they replaced it 01:01:45.030 --> 01:01:48.040 align:middle line:84% with a high-K material like hafnium dioxide 01:01:48.040 --> 01:01:50.662 align:middle line:90% and a Ti-nitride gate. 01:01:50.662 --> 01:01:52.120 align:middle line:84% So this was an example of something 01:01:52.120 --> 01:01:53.810 align:middle line:90% published about six months ago. 01:01:53.810 --> 01:01:56.050 align:middle line:84% So people are thinking of replacing poly, 01:01:56.050 --> 01:01:59.520 align:middle line:84% but it's got a lot of complex process integration. 01:01:59.520 --> 01:02:02.910 align:middle line:84% An easier process integration that people are considering 01:02:02.910 --> 01:02:05.512 align:middle line:84% is rather than digging the poly out-- 01:02:05.512 --> 01:02:06.970 align:middle line:84% and whenever you etch out the poly, 01:02:06.970 --> 01:02:11.010 align:middle line:84% you always expose the very sensitive oxide silicon 01:02:11.010 --> 01:02:11.510 align:middle line:90% interface. 01:02:11.510 --> 01:02:14.020 align:middle line:84% So that's typically, from an integration point of view, 01:02:14.020 --> 01:02:15.928 align:middle line:84% digging out the poly is not that desirable. 01:02:15.928 --> 01:02:18.220 align:middle line:84% They said, well, why don't we just take the polysilicon 01:02:18.220 --> 01:02:21.910 align:middle line:84% and fully react it with a metal and convert it from polysilicon 01:02:21.910 --> 01:02:24.690 align:middle line:90% into a silicide? 01:02:24.690 --> 01:02:26.800 align:middle line:84% Put enough metal there, instead of, in this case, 01:02:26.800 --> 01:02:28.550 align:middle line:84% they only put a very thin amount of metal, 01:02:28.550 --> 01:02:30.960 align:middle line:84% so it only reacts to form maybe several hundred 01:02:30.960 --> 01:02:32.852 align:middle line:90% angstroms of silicide. 01:02:32.852 --> 01:02:34.310 align:middle line:84% People are saying, all right, we'll 01:02:34.310 --> 01:02:39.223 align:middle line:84% put enough metal on top of that, make it really thick metal, 01:02:39.223 --> 01:02:40.640 align:middle line:84% so that it reacts-- and it reacted 01:02:40.640 --> 01:02:42.682 align:middle line:84% at a high enough temperature for long enough time 01:02:42.682 --> 01:02:44.675 align:middle line:84% that the metal reaction takes place 01:02:44.675 --> 01:02:45.800 align:middle line:90% throughout the entire poly. 01:02:45.800 --> 01:02:49.760 align:middle line:84% And you get a silicide all the way down to the gate interface. 01:02:49.760 --> 01:02:53.960 align:middle line:84% And here's an example of nickel silicide, fully silicided gate 01:02:53.960 --> 01:02:57.020 align:middle line:84% that was published about six months ago by annealing 01:02:57.020 --> 01:03:00.660 align:middle line:84% at 450 degrees and using a thick enough layer of nickel. 01:03:00.660 --> 01:03:03.320 align:middle line:84% So not only are silicides being used in the source and drain, 01:03:03.320 --> 01:03:06.620 align:middle line:84% but they're also being used fully in the gate. 01:03:06.620 --> 01:03:09.670 align:middle line:84% Now, this is different from the salicide process. 01:03:09.670 --> 01:03:14.140 align:middle line:84% One reason would be is the gate's usually reasonably tall. 01:03:14.140 --> 01:03:16.990 align:middle line:84% The gate may be 1,000 angstroms tall, something like that. 01:03:16.990 --> 01:03:18.490 align:middle line:84% So you need to put enough metal down 01:03:18.490 --> 01:03:21.485 align:middle line:84% that you can silicide all the way through 1,000 angstroms. 01:03:21.485 --> 01:03:22.860 align:middle line:84% Now, on the source and drain, you 01:03:22.860 --> 01:03:25.050 align:middle line:84% don't want to be siliciding down 1,000 angstroms 01:03:25.050 --> 01:03:27.700 align:middle line:84% because I said the junction depth is about 1,000 angstroms. 01:03:27.700 --> 01:03:31.290 align:middle line:84% So if you're going to do a FUSI process for the gate, 01:03:31.290 --> 01:03:33.907 align:middle line:84% you actually need to have two different siliciding steps. 01:03:33.907 --> 01:03:35.490 align:middle line:84% You need to have a step when you would 01:03:35.490 --> 01:03:37.770 align:middle line:84% silicide with a very thin amount of metal 01:03:37.770 --> 01:03:39.600 align:middle line:84% with silicide the source and drain. 01:03:39.600 --> 01:03:42.690 align:middle line:84% You need to cover them and protect them then, and then 01:03:42.690 --> 01:03:45.870 align:middle line:84% open up the gate and use a thick amount of metal 01:03:45.870 --> 01:03:47.520 align:middle line:84% to try to fully silicide the gate. 01:03:47.520 --> 01:03:49.120 align:middle line:84% So it's a little-- it's still tricky. 01:03:49.120 --> 01:03:52.710 align:middle line:84% It's not as simple as using the old fashioned salicide process 01:03:52.710 --> 01:03:54.875 align:middle line:84% where the thickness that you silicide on the gate 01:03:54.875 --> 01:03:56.250 align:middle line:84% was the same as the thickness you 01:03:56.250 --> 01:03:57.510 align:middle line:90% went in the source and drain. 01:03:57.510 --> 01:03:58.950 align:middle line:90% It's different from that. 01:03:58.950 --> 01:04:00.390 align:middle line:84% But it's not quite as complicated 01:04:00.390 --> 01:04:04.545 align:middle line:84% as completely replacing the gate in the etch-out process. 01:04:04.545 --> 01:04:07.280 align:middle line:90% 01:04:07.280 --> 01:04:08.840 align:middle line:90% In fact, I've got here-- 01:04:08.840 --> 01:04:13.040 align:middle line:84% showing here you on slide 30 some fairly recent results 01:04:13.040 --> 01:04:16.700 align:middle line:84% from the last couple of years of how people have made nickel 01:04:16.700 --> 01:04:18.350 align:middle line:90% silicide FUSI. 01:04:18.350 --> 01:04:22.370 align:middle line:84% FUSI is the acronym for fully silicided gate. 01:04:22.370 --> 01:04:24.920 align:middle line:84% How they've made this-- and this particular article 01:04:24.920 --> 01:04:30.790 align:middle line:90% came out two years ago from AMD. 01:04:30.790 --> 01:04:33.890 align:middle line:84% And what they're showing here is a method to form this. 01:04:33.890 --> 01:04:38.070 align:middle line:84% And so they do the standard transistor fabrication or flow 01:04:38.070 --> 01:04:38.570 align:middle line:90% here. 01:04:38.570 --> 01:04:40.990 align:middle line:90% So this is their poly gate. 01:04:40.990 --> 01:04:43.660 align:middle line:84% And here they've actually formed a little bit of silicide 01:04:43.660 --> 01:04:46.630 align:middle line:84% in the source and drain and a little bit on top of the gate. 01:04:46.630 --> 01:04:50.510 align:middle line:84% So they did the standard salicide process at this point. 01:04:50.510 --> 01:04:52.440 align:middle line:84% Now they have to do a plan arising step. 01:04:52.440 --> 01:04:55.070 align:middle line:84% So to get from here to here, what they had to do is 01:04:55.070 --> 01:04:57.500 align:middle line:84% they had to put a metal and maybe 01:04:57.500 --> 01:04:59.420 align:middle line:90% some other harder material-- 01:04:59.420 --> 01:05:00.590 align:middle line:90% no, sorry. 01:05:00.590 --> 01:05:03.650 align:middle line:84% They had to put, yeah, contact material, and then maybe 01:05:03.650 --> 01:05:05.990 align:middle line:84% a dielectric over the entire thing, 01:05:05.990 --> 01:05:08.600 align:middle line:84% and then CNP it down so it's planarized 01:05:08.600 --> 01:05:11.180 align:middle line:84% because you know they're going to get deposition everywhere. 01:05:11.180 --> 01:05:14.210 align:middle line:90% So they planarized it. 01:05:14.210 --> 01:05:17.270 align:middle line:84% And they expose, then-- in the plane rising process, 01:05:17.270 --> 01:05:20.900 align:middle line:84% they expose the polysilicon gate. 01:05:20.900 --> 01:05:22.760 align:middle line:84% And they can then put down metal here, 01:05:22.760 --> 01:05:25.580 align:middle line:84% and a thick layer of metal, and react it all the way 01:05:25.580 --> 01:05:27.030 align:middle line:90% to the interface. 01:05:27.030 --> 01:05:30.560 align:middle line:84% So here they have this very thick region 01:05:30.560 --> 01:05:32.570 align:middle line:84% where the entire gate has been silicided. 01:05:32.570 --> 01:05:36.170 align:middle line:84% And you notice during this last process here on the right, 01:05:36.170 --> 01:05:39.380 align:middle line:84% there's no siliciding happening down in the source and drain 01:05:39.380 --> 01:05:43.600 align:middle line:84% because that's all been protected during this process. 01:05:43.600 --> 01:05:46.420 align:middle line:84% So it's certainly easier than the replacement gate 01:05:46.420 --> 01:05:47.890 align:middle line:90% scheme that showed last time. 01:05:47.890 --> 01:05:50.740 align:middle line:84% And it also avoids the PVD damage to the gate oxide. 01:05:50.740 --> 01:05:53.230 align:middle line:84% If I'm going to etch this gate out 01:05:53.230 --> 01:05:55.570 align:middle line:84% and I have to deposit a metal by PVD, 01:05:55.570 --> 01:05:59.200 align:middle line:84% your PVD processes can be very energetic. 01:05:59.200 --> 01:06:02.590 align:middle line:84% You often use some kind of sputtering where you have ions. 01:06:02.590 --> 01:06:05.170 align:middle line:84% And you can cause damage to the gate oxide. 01:06:05.170 --> 01:06:07.240 align:middle line:84% This doesn't have that at all because when 01:06:07.240 --> 01:06:10.420 align:middle line:84% you deposit the nickel, the nickel is going on up here. 01:06:10.420 --> 01:06:13.000 align:middle line:84% And then it diffuses in a siliciding process 01:06:13.000 --> 01:06:15.900 align:middle line:90% to get down to the bottom. 01:06:15.900 --> 01:06:19.290 align:middle line:84% Here's an example of an electron micrograph of one 01:06:19.290 --> 01:06:20.220 align:middle line:90% of those devices. 01:06:20.220 --> 01:06:21.960 align:middle line:84% This gate has been fully silicided. 01:06:21.960 --> 01:06:23.670 align:middle line:90% So this is all nickel silicide. 01:06:23.670 --> 01:06:28.260 align:middle line:84% This very thin white layer is the gate oxide, very thin. 01:06:28.260 --> 01:06:30.600 align:middle line:84% And this layer here is the silicon channel. 01:06:30.600 --> 01:06:32.850 align:middle line:90% This is an SOI device. 01:06:32.850 --> 01:06:34.770 align:middle line:90% So this is a silicon channel. 01:06:34.770 --> 01:06:38.510 align:middle line:84% And this is the buried insulator, the buried oxide. 01:06:38.510 --> 01:06:42.100 align:middle line:84% And these are sidewall spacer layers. 01:06:42.100 --> 01:06:45.270 align:middle line:90% 01:06:45.270 --> 01:06:47.970 align:middle line:84% This is just another image here on slide 31, 01:06:47.970 --> 01:06:49.650 align:middle line:90% another image of that gate. 01:06:49.650 --> 01:06:53.340 align:middle line:84% They've made a very short channel device, only something 01:06:53.340 --> 01:06:56.340 align:middle line:90% between 35 and 40 nanometers. 01:06:56.340 --> 01:07:00.290 align:middle line:84% It's a very ultra-thin body device, or reasonably thin body 01:07:00.290 --> 01:07:00.790 align:middle line:90% device. 01:07:00.790 --> 01:07:04.510 align:middle line:84% This is an SOI, it's only 25 nanometers thick. 01:07:04.510 --> 01:07:08.497 align:middle line:84% And they have oxide and nitride spacers on either side. 01:07:08.497 --> 01:07:10.330 align:middle line:84% The point they were trying to make with this 01:07:10.330 --> 01:07:12.580 align:middle line:84% was that the nickel did not diffuse in to the silicon. 01:07:12.580 --> 01:07:14.990 align:middle line:84% Of course, it's a little hard to tell from this. 01:07:14.990 --> 01:07:18.010 align:middle line:84% The nice thing about it, if you zoom in at this point right here 01:07:18.010 --> 01:07:20.470 align:middle line:84% and you zoom in on the gate oxide-- 01:07:20.470 --> 01:07:24.040 align:middle line:84% so this is the gate dielectric, which is shown here 01:07:24.040 --> 01:07:25.520 align:middle line:90% by this amorphous material. 01:07:25.520 --> 01:07:27.670 align:middle line:90% It's about 2.1 nanometers thick. 01:07:27.670 --> 01:07:28.990 align:middle line:90% That's their gate dielectric. 01:07:28.990 --> 01:07:31.420 align:middle line:84% This is the metal gate now it's nickel silicide. 01:07:31.420 --> 01:07:33.507 align:middle line:84% It went down and it stopped at the gate stopped, 01:07:33.507 --> 01:07:34.840 align:middle line:90% reacting at the gate dielectric. 01:07:34.840 --> 01:07:37.280 align:middle line:84% And this is the silicon channel region. 01:07:37.280 --> 01:07:39.250 align:middle line:90% It's reasonably smooth. 01:07:39.250 --> 01:07:41.440 align:middle line:84% People were concerned that the nickel might diffuse 01:07:41.440 --> 01:07:43.150 align:middle line:90% in and react with the oxide. 01:07:43.150 --> 01:07:46.270 align:middle line:84% But according to this particular temperature and time 01:07:46.270 --> 01:07:49.300 align:middle line:84% that they did, they get a reasonably smooth interface. 01:07:49.300 --> 01:07:52.655 align:middle line:90% 01:07:52.655 --> 01:07:54.030 align:middle line:84% Remember, you can care about that 01:07:54.030 --> 01:07:54.960 align:middle line:84% because it's going to be the channel. 01:07:54.960 --> 01:07:56.938 align:middle line:84% The carriers are going to be flowing right 01:07:56.938 --> 01:07:58.230 align:middle line:90% in the silicon underneath this. 01:07:58.230 --> 01:08:02.440 align:middle line:84% So you don't want to get any nickel into that channel. 01:08:02.440 --> 01:08:07.220 align:middle line:84% This is, on slide 32, that same paper. 01:08:07.220 --> 01:08:10.330 align:middle line:84% They also did some Auger analysis. 01:08:10.330 --> 01:08:12.490 align:middle line:84% Remember, we talked about Auger spectroscopy 01:08:12.490 --> 01:08:15.640 align:middle line:84% as being a means of measuring the composition 01:08:15.640 --> 01:08:17.510 align:middle line:90% by going through a device. 01:08:17.510 --> 01:08:21.740 align:middle line:84% So this is a vertical scan through the device. 01:08:21.740 --> 01:08:25.710 align:middle line:84% So what they're actually doing is going back here, 01:08:25.710 --> 01:08:28.569 align:middle line:84% they're the Auger experiment, and they're 01:08:28.569 --> 01:08:29.819 align:middle line:90% sputtering right through here. 01:08:29.819 --> 01:08:31.277 align:middle line:84% And through the center of the gate, 01:08:31.277 --> 01:08:36.359 align:middle line:84% they're looking at what comes off, what they see, 01:08:36.359 --> 01:08:39.000 align:middle line:84% what Auger electrons as they sputter. 01:08:39.000 --> 01:08:43.810 align:middle line:84% So here we see atomic concentration in percent 01:08:43.810 --> 01:08:45.500 align:middle line:84% as a function of depth, essentially. 01:08:45.500 --> 01:08:46.960 align:middle line:84% So this is the surface over here. 01:08:46.960 --> 01:08:49.330 align:middle line:84% And you can see that the red line is the nickel. 01:08:49.330 --> 01:08:51.250 align:middle line:90% The blue is the silicon. 01:08:51.250 --> 01:08:53.140 align:middle line:84% This is the thickness of the gate 01:08:53.140 --> 01:08:57.310 align:middle line:84% from the surface here to this point here, to the gate oxide. 01:08:57.310 --> 01:09:02.740 align:middle line:84% And what you see is there's quite a bit of silicidation. 01:09:02.740 --> 01:09:06.160 align:middle line:90% This is mostly nickel silicide. 01:09:06.160 --> 01:09:08.979 align:middle line:84% It looks like here there's a little bit of silicon-- 01:09:08.979 --> 01:09:12.790 align:middle line:84% or here you have the silicon in the SiO2. 01:09:12.790 --> 01:09:17.050 align:middle line:84% And then this is the oxide beneath. 01:09:17.050 --> 01:09:18.267 align:middle line:90% So you just get some idea. 01:09:18.267 --> 01:09:20.350 align:middle line:84% This looks like it's fairly stoichiometric, almost 01:09:20.350 --> 01:09:22.300 align:middle line:90% 1 to 1 silicon to nickel. 01:09:22.300 --> 01:09:24.840 align:middle line:90% Maybe a little bit nickel-rich. 01:09:24.840 --> 01:09:26.640 align:middle line:84% Again, using the types of techniques 01:09:26.640 --> 01:09:29.009 align:middle line:84% we talked about in our characterization lectures. 01:09:29.009 --> 01:09:32.307 align:middle line:90% 01:09:32.307 --> 01:09:33.390 align:middle line:90% This is a different paper. 01:09:33.390 --> 01:09:38.510 align:middle line:84% This is a paper-- that last paper was from IEDM 2002 01:09:38.510 --> 01:09:41.510 align:middle line:90% applied by AMD. 01:09:41.510 --> 01:09:46.460 align:middle line:84% IBM the same year also published at the same conference nickel 01:09:46.460 --> 01:09:48.529 align:middle line:90% silicide FUSI gates. 01:09:48.529 --> 01:09:51.920 align:middle line:84% This time they did them not only on fully depleted SOI. 01:09:51.920 --> 01:09:54.260 align:middle line:84% I just showed you a silicon insulator device. 01:09:54.260 --> 01:09:56.720 align:middle line:84% They also did it on a device, which is called a FinFET. 01:09:56.720 --> 01:09:58.580 align:middle line:84% We haven't had any time, really, to go 01:09:58.580 --> 01:10:01.608 align:middle line:84% into these new types of devices, but there 01:10:01.608 --> 01:10:03.650 align:middle line:84% are silicon MOSFETs these days that are not being 01:10:03.650 --> 01:10:06.360 align:middle line:90% made in a planar structure. 01:10:06.360 --> 01:10:08.400 align:middle line:84% There's a device that emits very non-planar 01:10:08.400 --> 01:10:11.190 align:middle line:84% called the FinFET, when in fact, people form a fin. 01:10:11.190 --> 01:10:15.010 align:middle line:84% And the channel of the device is actually into the page. 01:10:15.010 --> 01:10:16.110 align:middle line:90% So it's into the board. 01:10:16.110 --> 01:10:19.390 align:middle line:84% And the electrons actually flow along the side walls. 01:10:19.390 --> 01:10:21.270 align:middle line:84% Electrons actually flow right along here. 01:10:21.270 --> 01:10:23.153 align:middle line:84% And you have a gate on the right side 01:10:23.153 --> 01:10:24.320 align:middle line:90% and a gate on the left side. 01:10:24.320 --> 01:10:26.640 align:middle line:84% In fact, the gate kind of wraps around. 01:10:26.640 --> 01:10:29.220 align:middle line:84% So this whole thing ends up being a channel. 01:10:29.220 --> 01:10:31.990 align:middle line:84% And the source and drain are into the board. 01:10:31.990 --> 01:10:35.520 align:middle line:84% This is a device that has some advantages, although it's 01:10:35.520 --> 01:10:36.900 align:middle line:90% a little tricky to make. 01:10:36.900 --> 01:10:38.410 align:middle line:90% It's a double gate device. 01:10:38.410 --> 01:10:42.355 align:middle line:84% You end up getting two channels in this thin silicon film. 01:10:42.355 --> 01:10:44.230 align:middle line:84% So they may have FinFET and they demonstrated 01:10:44.230 --> 01:10:47.890 align:middle line:84% they could make a nickel silicide gate going 01:10:47.890 --> 01:10:50.180 align:middle line:90% all the way around that fin. 01:10:50.180 --> 01:10:52.180 align:middle line:84% In fact, this is the gate dielectric shown here, 01:10:52.180 --> 01:10:55.630 align:middle line:84% this amorphous-looking region with nickel silicide 01:10:55.630 --> 01:10:56.770 align:middle line:90% on the outside. 01:10:56.770 --> 01:11:00.100 align:middle line:84% Again, using a FUSI process where they put poly everywhere, 01:11:00.100 --> 01:11:03.710 align:middle line:84% put down the appropriate amount of nickel, and then reacted it. 01:11:03.710 --> 01:11:06.610 align:middle line:84% And the reaction stopped right when it hit the gate dielectric. 01:11:06.610 --> 01:11:10.240 align:middle line:90% 01:11:10.240 --> 01:11:11.770 align:middle line:84% An interesting thing that was also 01:11:11.770 --> 01:11:13.300 align:middle line:84% done in this paper, if you end up 01:11:13.300 --> 01:11:18.407 align:middle line:84% wanting to do research in this area, is shown here on slide 34. 01:11:18.407 --> 01:11:20.740 align:middle line:84% This is something called gate work function engineering. 01:11:20.740 --> 01:11:24.253 align:middle line:84% We hadn't really talked about it, but the work function 01:11:24.253 --> 01:11:25.045 align:middle line:90% between the metal-- 01:11:25.045 --> 01:11:28.450 align:middle line:84% I think we may have talked about threshold voltage control. 01:11:28.450 --> 01:11:31.660 align:middle line:84% The work function, which is a property of the metal material, 01:11:31.660 --> 01:11:32.530 align:middle line:90% to a certain extent. 01:11:32.530 --> 01:11:35.190 align:middle line:84% And the silicon, that determines the threshold voltage 01:11:35.190 --> 01:11:37.690 align:middle line:84% of the transistor, the voltage at which the transistor turns 01:11:37.690 --> 01:11:38.900 align:middle line:90% on. 01:11:38.900 --> 01:11:40.960 align:middle line:84% So that's a very important property. 01:11:40.960 --> 01:11:44.140 align:middle line:84% People have been using N plus poly and P plus poly 01:11:44.140 --> 01:11:47.380 align:middle line:84% on N FETs and P FETs for years because it has the right work 01:11:47.380 --> 01:11:48.840 align:middle line:90% function. 01:11:48.840 --> 01:11:50.590 align:middle line:84% The problem with poly, as we've mentioned, 01:11:50.590 --> 01:11:52.020 align:middle line:84% is it doesn't have enough carries. 01:11:52.020 --> 01:11:52.853 align:middle line:90% It tends to deplete. 01:11:52.853 --> 01:11:54.180 align:middle line:90% So people want to use metals. 01:11:54.180 --> 01:11:56.790 align:middle line:84% The problem with metals is, what work function do they have? 01:11:56.790 --> 01:11:59.160 align:middle line:84% Well, they have the work function, typically, 01:11:59.160 --> 01:12:01.342 align:middle line:84% of the metal, which is a property of the metal. 01:12:01.342 --> 01:12:03.300 align:middle line:84% And there are only so many metals in the world. 01:12:03.300 --> 01:12:05.850 align:middle line:84% There are only so many silicides in the world. 01:12:05.850 --> 01:12:08.880 align:middle line:84% But what IBM has shown in this particular paper 01:12:08.880 --> 01:12:12.570 align:middle line:84% is that they can adjust slightly the effective work 01:12:12.570 --> 01:12:17.190 align:middle line:84% function of that gate stack, so the effect of work 01:12:17.190 --> 01:12:21.870 align:middle line:84% function in between this metal gate and the silicon material. 01:12:21.870 --> 01:12:24.510 align:middle line:84% They said they can adjust it to a certain extent 01:12:24.510 --> 01:12:29.040 align:middle line:84% by how much they dope the polysilicon prior 01:12:29.040 --> 01:12:30.810 align:middle line:90% to the silicide reaction. 01:12:30.810 --> 01:12:34.050 align:middle line:84% And this is just a table that I took right out of that paper. 01:12:34.050 --> 01:12:36.770 align:middle line:84% For the case of nickel silicide, what they found is, 01:12:36.770 --> 01:12:39.810 align:middle line:84% depending exactly on how much doping they put into the gate 01:12:39.810 --> 01:12:42.810 align:middle line:84% to begin with-- say if they don't dope it, 01:12:42.810 --> 01:12:46.860 align:middle line:84% or if they put in 1e20, 2e20, or 4e20, 01:12:46.860 --> 01:12:50.220 align:middle line:84% the effect of work function that they measure with respect 01:12:50.220 --> 01:12:52.450 align:middle line:84% to the silicon conduction band is shown here. 01:12:52.450 --> 01:12:56.840 align:middle line:84% It can be varied, maybe by about 100 millivolts. 01:12:56.840 --> 01:12:58.400 align:middle line:90% Maybe a little more. 01:12:58.400 --> 01:12:59.390 align:middle line:90% Something like that. 01:12:59.390 --> 01:13:01.130 align:middle line:84% I guess the nickel silicide was 0. 01:13:01.130 --> 01:13:03.505 align:middle line:84% So it's a little more, maybe a couple hundred millivolts, 01:13:03.505 --> 01:13:06.710 align:middle line:84% it can be varied by whether you put doping in or not 01:13:06.710 --> 01:13:08.270 align:middle line:90% and by how much doping. 01:13:08.270 --> 01:13:11.690 align:middle line:84% And this is important because you need this flexibility 01:13:11.690 --> 01:13:13.710 align:middle line:84% in being able to adjust your threshold voltage. 01:13:13.710 --> 01:13:16.430 align:middle line:84% So FUSI gates are also interesting, 01:13:16.430 --> 01:13:18.050 align:middle line:84% not just because it's a little easier 01:13:18.050 --> 01:13:19.857 align:middle line:90% to integrate the processing. 01:13:19.857 --> 01:13:22.190 align:middle line:84% The frontend processing is what we're all familiar with. 01:13:22.190 --> 01:13:23.780 align:middle line:84% Everyone knows how to etch a poly gate 01:13:23.780 --> 01:13:27.050 align:middle line:84% and make a good poly gate, and you can convert it to silicide. 01:13:27.050 --> 01:13:28.550 align:middle line:84% But depending on how you dope it, 01:13:28.550 --> 01:13:30.770 align:middle line:84% you may be able to control the PT 01:13:30.770 --> 01:13:33.170 align:middle line:90% or adjust the PT a little bit. 01:13:33.170 --> 01:13:35.780 align:middle line:84% It's still a very tricky process. 01:13:35.780 --> 01:13:39.670 align:middle line:84% The reaction temperature or the thermal stability temperature 01:13:39.670 --> 01:13:40.970 align:middle line:90% is reasonably low. 01:13:40.970 --> 01:13:43.850 align:middle line:84% So you cannot take these and then take them to a backend 01:13:43.850 --> 01:13:46.290 align:middle line:90% process that is too hot. 01:13:46.290 --> 01:13:47.720 align:middle line:90% So they're very much a research. 01:13:47.720 --> 01:13:49.845 align:middle line:84% It was only published by IBM a couple of years ago. 01:13:49.845 --> 01:13:52.280 align:middle line:84% It's certainly not ready necessarily 01:13:52.280 --> 01:13:53.570 align:middle line:90% for manufacturing right now. 01:13:53.570 --> 01:13:55.070 align:middle line:84% Perhaps in the near future, but just 01:13:55.070 --> 01:13:57.780 align:middle line:84% to give you an idea of the types of things 01:13:57.780 --> 01:14:02.057 align:middle line:84% that people are concerned about with siliciding. 01:14:02.057 --> 01:14:03.640 align:middle line:84% Before I go through the summary, let's 01:14:03.640 --> 01:14:05.270 align:middle line:84% take a few minutes, because we have 01:14:05.270 --> 01:14:06.520 align:middle line:90% a couple of minutes right now. 01:14:06.520 --> 01:14:08.920 align:middle line:84% I just want to go through with you very briefly, 01:14:08.920 --> 01:14:16.720 align:middle line:84% if we back up a little bit here onto slide number 27. 01:14:16.720 --> 01:14:19.937 align:middle line:84% And you can sit down and do this back-of-the-envelope calculation 01:14:19.937 --> 01:14:21.520 align:middle line:84% yourself over the next couple of days. 01:14:21.520 --> 01:14:23.937 align:middle line:84% It's not a homework assignment, but I think it's something 01:14:23.937 --> 01:14:24.850 align:middle line:90% you should do-- 01:14:24.850 --> 01:14:29.110 align:middle line:84% how to calculate these three resistances. 01:14:29.110 --> 01:14:31.832 align:middle line:84% And then we can talk about it and go through it next time. 01:14:31.832 --> 01:14:33.290 align:middle line:84% But what I want you to calculate is 01:14:33.290 --> 01:14:36.280 align:middle line:84% you're given everything you need to calculate the contact 01:14:36.280 --> 01:14:37.150 align:middle line:90% resistance. 01:14:37.150 --> 01:14:40.060 align:middle line:84% You're given the specific contact resistivity rho C. 01:14:40.060 --> 01:14:41.810 align:middle line:84% And you're given the area of the contact. 01:14:41.810 --> 01:14:43.330 align:middle line:84% So you know exactly how to calculate that. 01:14:43.330 --> 01:14:44.650 align:middle line:90% You just do a simple division. 01:14:44.650 --> 01:14:47.410 align:middle line:84% And you can calculate this resistor, the contact 01:14:47.410 --> 01:14:48.610 align:middle line:90% resistance. 01:14:48.610 --> 01:14:50.800 align:middle line:84% You're given the sheet resistance of the silicide, 01:14:50.800 --> 01:14:51.730 align:middle line:90% this blue region. 01:14:51.730 --> 01:14:56.380 align:middle line:84% You have its sheet resistance, or it's resistivity, I'm sorry-- 01:14:56.380 --> 01:14:58.900 align:middle line:84% 15 times 10 to the -6 ohm centimeter. 01:14:58.900 --> 01:15:00.280 align:middle line:90% And you know its thickness. 01:15:00.280 --> 01:15:03.010 align:middle line:84% So resistivity divided by thickness, 01:15:03.010 --> 01:15:04.240 align:middle line:90% you can get sheet resistance. 01:15:04.240 --> 01:15:07.300 align:middle line:84% And then you can figure out how many squares the current 01:15:07.300 --> 01:15:08.290 align:middle line:90% has to flow through. 01:15:08.290 --> 01:15:11.320 align:middle line:84% So you should be able to calculate this resistance 01:15:11.320 --> 01:15:12.910 align:middle line:90% of the silicided regions. 01:15:12.910 --> 01:15:14.290 align:middle line:84% And then the little resistor here 01:15:14.290 --> 01:15:18.400 align:middle line:84% of the source drain extensions, we 01:15:18.400 --> 01:15:21.560 align:middle line:84% are given their resistivity, and again, its thickness. 01:15:21.560 --> 01:15:23.770 align:middle line:84% So we should be able to calculate a sheet resistance, 01:15:23.770 --> 01:15:25.493 align:middle line:84% and from that figure out-- so you 01:15:25.493 --> 01:15:27.410 align:middle line:84% get the ohms square and the number of squares. 01:15:27.410 --> 01:15:28.430 align:middle line:90% And you get a resistor. 01:15:28.430 --> 01:15:31.750 align:middle line:84% So one, two, and three resistors corresponding 01:15:31.750 --> 01:15:34.362 align:middle line:84% to this contact resistance, the resistance 01:15:34.362 --> 01:15:36.070 align:middle line:84% of the current flowing through the sheet, 01:15:36.070 --> 01:15:38.440 align:middle line:84% and the resistance flowing through the source drain 01:15:38.440 --> 01:15:39.580 align:middle line:90% extension. 01:15:39.580 --> 01:15:41.290 align:middle line:84% You'll get three numbers, and you just 01:15:41.290 --> 01:15:43.540 align:middle line:84% get an idea of the order of magnitude of those numbers 01:15:43.540 --> 01:15:45.080 align:middle line:90% and how they compare. 01:15:45.080 --> 01:15:47.740 align:middle line:84% So if you have time between now and next lecture, do that. 01:15:47.740 --> 01:15:50.480 align:middle line:84% We'll go through it at the beginning of the last lecture 01:15:50.480 --> 01:15:50.980 align:middle line:90% next time. 01:15:50.980 --> 01:15:53.710 align:middle line:84% But just an interesting comparison 01:15:53.710 --> 01:15:56.110 align:middle line:90% between those three numbers. 01:15:56.110 --> 01:16:03.790 align:middle line:84% OK, so let me finish up by kind of summarizing on this topic. 01:16:03.790 --> 01:16:06.990 align:middle line:84% What we talked about today, we need good device contacts. 01:16:06.990 --> 01:16:09.990 align:middle line:84% They have certain requirements-- a low specific contact 01:16:09.990 --> 01:16:12.940 align:middle line:84% resistance, rho C. Very good thermal stability 01:16:12.940 --> 01:16:14.940 align:middle line:84% so when you heat them up, they don't spike or do 01:16:14.940 --> 01:16:16.560 align:middle line:90% anything unusual. 01:16:16.560 --> 01:16:18.840 align:middle line:84% In general, you want to get a high doping 01:16:18.840 --> 01:16:21.210 align:middle line:84% concentration of a silicon right at the interface. 01:16:21.210 --> 01:16:24.090 align:middle line:84% That will tend to lower the contact resistance by inducing 01:16:24.090 --> 01:16:27.510 align:middle line:90% quantum mechanical tunneling. 01:16:27.510 --> 01:16:30.240 align:middle line:84% However, there is a fundamental limit on how much doping we 01:16:30.240 --> 01:16:31.800 align:middle line:90% can activate in silicon. 01:16:31.800 --> 01:16:34.270 align:middle line:84% This puts a limit on the contact resistance 01:16:34.270 --> 01:16:37.450 align:middle line:84% and on the sheet resistance and on the parasitic resistance. 01:16:37.450 --> 01:16:40.260 align:middle line:84% In fact, the contact resistance is really a big problem. 01:16:40.260 --> 01:16:41.850 align:middle line:84% If you look in the ITRS, there's a lot 01:16:41.850 --> 01:16:45.350 align:middle line:84% of concern about how to lower that. 01:16:45.350 --> 01:16:48.560 align:middle line:84% The so-called self-aligned silicide process, or also 01:16:48.560 --> 01:16:51.830 align:middle line:84% abbreviated salicide, has been the mainstay of technology 01:16:51.830 --> 01:16:54.290 align:middle line:90% for many, many years now. 01:16:54.290 --> 01:16:56.360 align:middle line:90% It has a lot of advantages. 01:16:56.360 --> 01:16:57.380 align:middle line:90% It's self-aligned. 01:16:57.380 --> 01:17:00.560 align:middle line:84% It reduces the sheet resistance of the deep source drain region. 01:17:00.560 --> 01:17:02.270 align:middle line:84% It reduces the gate sheet resistance 01:17:02.270 --> 01:17:04.370 align:middle line:84% because you put silicide on the gate. 01:17:04.370 --> 01:17:06.560 align:middle line:84% And it also provides a local interconnect layer. 01:17:06.560 --> 01:17:10.880 align:middle line:84% So it's been a very good workhorse. 01:17:10.880 --> 01:17:13.070 align:middle line:84% Silicides can also function as a barrier layer 01:17:13.070 --> 01:17:16.310 align:middle line:90% to prevent spiking, potentially. 01:17:16.310 --> 01:17:18.170 align:middle line:90% Silicides do consume silicon. 01:17:18.170 --> 01:17:20.840 align:middle line:90% That's one problem with them. 01:17:20.840 --> 01:17:23.870 align:middle line:84% And as you move the metal closer to the junction depletion 01:17:23.870 --> 01:17:26.608 align:middle line:84% region, it's a big problem because you 01:17:26.608 --> 01:17:27.650 align:middle line:90% tend to get more leakage. 01:17:27.650 --> 01:17:29.900 align:middle line:84% In fact, this is why people use deep source drain 01:17:29.900 --> 01:17:34.910 align:middle line:84% regions to allow a thick enough region in between the depletion 01:17:34.910 --> 01:17:38.450 align:middle line:84% region and the point where the silicide is formed. 01:17:38.450 --> 01:17:40.190 align:middle line:84% So you can get a reasonable silicide 01:17:40.190 --> 01:17:42.170 align:middle line:90% with low junction leakage. 01:17:42.170 --> 01:17:45.650 align:middle line:84% Because junctions are scaling to be thinner and thinner, 01:17:45.650 --> 01:17:47.450 align:middle line:84% especially in fully depleted SOI, 01:17:47.450 --> 01:17:49.610 align:middle line:84% people are moving towards nickel silicide 01:17:49.610 --> 01:17:52.940 align:middle line:84% because it consumes a lot less silicon per thickness 01:17:52.940 --> 01:17:56.150 align:middle line:84% of silicide than, say, Ti-silicide or cobalt silicide. 01:17:56.150 --> 01:17:58.850 align:middle line:84% So for fully depleted SOI, nickel silicide 01:17:58.850 --> 01:18:00.650 align:middle line:90% has a lot of advantages. 01:18:00.650 --> 01:18:02.900 align:middle line:84% And the last thing, which isn't in the summary we just 01:18:02.900 --> 01:18:04.567 align:middle line:84% talked about, is that silicides are even 01:18:04.567 --> 01:18:08.580 align:middle line:84% being considered to be fully silicide purpose for the gate. 01:18:08.580 --> 01:18:10.670 align:middle line:84% And that's something that's in research right now, 01:18:10.670 --> 01:18:14.270 align:middle line:84% you may see in production over the next three or four years 01:18:14.270 --> 01:18:15.510 align:middle line:90% or so. 01:18:15.510 --> 01:18:17.450 align:middle line:84% So that's all I have for this lecture. 01:18:17.450 --> 01:18:20.430 align:middle line:84% Take a look at that simple calculation example by hand. 01:18:20.430 --> 01:18:25.530 align:middle line:84% And then next time we'll meet for the final lecture. 01:18:25.530 --> 01:18:28.290 align:middle line:84% And again, I announced it at the beginning. 01:18:28.290 --> 01:18:30.730 align:middle line:84% The people who are going to be speaking in the order, 01:18:30.730 --> 01:18:32.440 align:middle line:90% it's also posted on the website. 01:18:32.440 --> 01:18:36.600 align:middle line:84% But if you have any questions about your oral report 01:18:36.600 --> 01:18:39.600 align:middle line:84% or whatever, please get back to me. 01:18:39.600 --> 01:18:41.855 align:middle line:90% OK, thanks. 01:18:41.855 --> 01:18:48.000 align:middle line:90%