6.012 | Fall 2009 | Undergraduate

# Microelectronic Devices and Circuits

## Calendar

### Abbreviations

TE = thermal equilibrium
MOS = metal-on-silicon
MOSFET = metal-oxide-semiconductor field-effect transistor
BJT = bipolar junction transistor
CMOS = complementary metal-oxide-semiconductor
CS = common source
OCTC = open circuit time constant

LEC # TOPICS KEY DATES
1 Introduction to semiconductors, doping, generation/recombination, TE carrier concentrations. Carrier dynamics and transport: drift. Problem set 1 out
2 Excess populations and minimum carrier lifetime, photoconductivity. Non-uniform concentrations and diffusion. Fick’s first and second laws.
3 The five basic equations. Device structures in TE: carriers and electrostatic potential; the 60 mV rule. Poisson’s equation (PE).

Problem set 1 due

Problem set 2 out

4 P-n junctions in thermal equilibrium and under reverse bias, the depletion approximation (DA), comparison to PE solution.
5 Review reverse biased junctions. Consider forward bias and the special case of minority carrier injection into quasineutral regions.

Problem set 2 due

Problem set 3 out

6 Forward biased p-n junctions: carrier injection, i-v characteristics (ideal and real; forward and reverse). Engineering carrier injection.
7 Bipolar junction transistors: two coupled diodes, terminal characteristics, regions of operation

Problem set 3 due

Problem set 4 out

8 Solar cells and LEDs (light emitting diodes). Problem set 4 due
Exam 1 (Lec #1-7) Problem set 5 out
9 MOS capacitors: the DA applied to two-terminal MOS capacitor accumulation, depletion, and inversion; VFB, VT, QA, and QN
10 The three-terminal MOS capacitor. MOSFETs: begin gradual channel approximation (GCA) using DA and ignoring subthreshold carriers.

Problem set 5 due

Problem set 6 out

11 Complete GC/DA model for iDS: saturation, channel length modulation. Output characteristics; regions of operation.
12 Subthreshold operation of MOSFETs. Development of model; compare to full numerical solution. Compare to/contrast with BJTs.

Problem set 6 due

Problem set 7 out

13 Linear equivalent circuits for MOSFETs and BJTs at low and high frequency; transconductance of subthreshold MOSFETs.
14 Logic inverter basics. Introduction to CMOS: transfer characteristics, noise margins, optimal device sizing.

Problem set 7 due

Problem set 8 out

15 CMOS analysis, continued: switching delays, power dissipation, speed/power trade-offs. Problem set 8 due
16 CMOS analysis, continued: subthreshold leakage, scaling rules, and where it is all going.
Exam 2 (Lec #9-15) Problem set 9 out
17 Linear amplifier basics: performance metrics, current source biasing, current mirrors, mid-band range, two-port representation.
18 Single-transistor building block stages: common-source, common-gate, and common-drain (follower) stages; characteristics and features.

Problem set 9 due

Problem set 10 out

19 Differential amplifiers: large signal transfer characteristics; small signal analysis using common- and difference-mode inputs.
20 Multi-stage amplifiers I: cascading diff stages; current source biasing; output stages.

Problem set 10 due

Design problem out

21 Multi-stage amplifiers II: active loads, biasing for maximum gain, input and output swings.
22 Multi-stage amplifiers III: examples, stage selection, speciality stages, looking at a commercial op-amp schematic. Begin frequency response.
23 Frequency response of CS amplifiers, the Miller effect. Intrinsic frequency limitations of MOSFETs. Biasing to maximize speed, power trade-off. Design problem due
24 OCTC method for estimating frequency response. Subthreshold amplifiers for ultra-lower power electronics, frequency performance.
25 MOS imagers. Semester wrap-up; life after 6.012.

## Course Info

Fall 2009
##### Learning Resource Types
Problem Sets
Exams with Solutions
Lecture Notes
Projects
Design Assignments