6-884S05.jpg
Description:
NAND gate layout from Lecture 3: CMOS Technology and Logic Gates. (Image by Professors Arvind and Asanovic.)
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6-884S05.jpg
Alt text:
NAND gate diagram.
Caption:
NAND gate layout from Lecture 3: CMOS Technology and Logic Gates. (Image by Professors Arvind and Asanovic.)
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Spring
2005
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Lecture Notes
