This section contains laboratory assignments and supporting documentation. For copyright reasons, links to device datasheets are not provided here: they can be downloaded from their respective manufacturers’ websites. Source files provided for each lab include template Verilog(R) files (which the students modify to complete the assignment), and I/O pin constraints (in .ucf format, for use with Xilinx ISE(R) Foundation(TM) software) for the 6.111 labkit.
|LABS||DATA SHEETs||SOURCE FILES|
Lab 1: Introduction to digital design (PDF)
Lab1: Report template (PDF)
|Lab 2: FSM design - Traffic light controller (PDF)|
|Lab 3: FSM design - Memory tester (PDF)||
|Lab 4: Complex FSM - Pong video game (PDF)||
ADV7125 triple 8-bit video DAC