6.720J | Spring 2007 | Graduate

Integrated Microelectronic Devices


Course Meeting Times

Lectures: 3 sessions / week, 1 hour / session

Recitations: 1 session / week, 1 hour / session


6.720 examines the physics of microelectronic semiconductor devices for silicon integrated circuit applications. Topics covered include: semiconductor fundamentals, p-n junction, metal-oxide semiconductor structure, metal-semiconductor junction, MOS field-effect transistor, and bipolar junction transistor. The course emphasizes physical understanding of device operation through energy band diagrams and short-channel MOSFET device design. Issues in modern device scaling are also outlined.


The prerequisites for this course are 6.012 Microelectronic Devices and Circuits or 3.42 Electronic Materials Design or equivalent.


H-level graduate subject, 12 units, 2 engineering design points.


There will be 9 homeworks, 3 device characterization projects (PN diode, MOSFET, BJT), and one device design project. See the calendar for information on due dates.


There will be two quizzes and one final exam. Quiz 1 will cover Ses #L1-L12 and will take place one day after Ses #L16. Quiz 2 will cover Ses #L13-L24 and will take place one day after Ses #L25.

The final exam will cover all material but will emphasize Ses #L25-L39. It will take place during final exam week. The time and location will be decided by the Registrar. All exams are open book and a calculator is required.


Homework 15%
Device characterization projects 10%
Design project 10%
Quiz 1 20%
Quiz 2 20%
Final exam 25%

Collaboration Policy

In all take-home exercises of this subject (homework, device characterization projects, design project) you may collaborate with another student in this class. In fact, collaboration is encouraged. However, these are not group projects to be divided among several participants. Every individual must carry out every exercise in its entirety. Every one of the items of each exercise contains a substantial educational experience. If you collaborate with another student in any exercise, please prominently show in your solutions the name of your collaborator. Violations of this policy will be handled by MIT’s Committee on Discipline. If you have questions regarding this policy, please ask the instructor.

Late Assignment Policy

Assignments are due at lecture on the designated date. Late homework is acceptable at the following lecture session after it is due (50% of credit only). No credit for homework later than this. Special cases can only be handled by lecturer.

Jesús del Alamo and Harry Tuller, course materials for 6.720J Integrated Microelectronic Devices, Spring 2007. MIT OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].


The calendar below provides information on the course’s lecture (L) and recitation (R) sessions.

L1 6.720 overview; fundamental concepts Project 1 out
L2 Intrinsic, extrinsic semiconductors; conduction and valence band density of states (DOS)  
L3 Carrier statistics in semiconductors; Fermi level  
L4 Generation and recombination mechanisms; equilibrium rates  
L5 Generation and recombination rates outside equilibrium

Project 1 due

Homework 1 out

R1 Problems on carrier statistics in equilibrium, generation and recombination  
L6 Carrier dynamics; thermal motion  
L7 Drift; diffusion; transit time  
L8 Non-uniform doping distribution

Homework 1 due

Homework 2 out

R2 Problems on carrier dynamics, drift and diffusion  
L9 Quasi-Fermi levels; continuity equations  
R3 Problems on non-uniform doping distribution, quasi-Fermi levels  
L10 Shockley equations; majority-carrier type situations

Homework 2 due

Homework 3 out

L11 Minority-carrier type situations: statics  
L12 Minority-carrier dynamics; space-charge and high-resistivity (SCR) transport; carrier multiplication  
R4 Problems on majority carrier situations, minority carrier situations: statics and dynamics  
L13 PN junction: electrostatics in and out of equilibrium Homework 3 due
L14 PN junction: depletion capacitance; current-voltage (I-V) characteristics  
L15 PN junction: carrier storage; diffusion capacitance; PN diode: parasitics  
L16 PN junction dynamics; PN diode: non-ideal and second-order effects Quiz 1 taken 1 day after Ses #L16
L17 Metal-semiconductor junction electrostatics in and out of equilibrium; capacitance-voltage (C-V) characteristics

Project 2 out

Homework 4 out

R5 Problems on metal-semiconductor junction, Schottky diode  
L18 Metal semiconductor junction I-V characteristics  
L19 Schottky diode; equivalent-circuit model; ohmic contacts  
L20 Ideal semiconductor surface

Homework 4 due

Homework 5 out

R6 Problems on PN junction, PN diode  
L21 Metal-oxide-semiconductor (MOS) in equilibrium  
L22 MOS outside equilibrium; Poisson-Boltzmann formulation  
L23 Simplifications to Poisson-Boltzmann formulation

Homework 5 due

Project 2 due

R7 Problems on MOS structure  
L24 Dynamics of MOS structure: C-V characteristics; three-terminal MOS  
L25 Inversion layer transport Quiz 2 taken 1 day after Ses #L25
L26 Long-channel metal-oxide-semiconductor field-effect (MOSFET): I-V characteristics

Project 3 out

Homework 6 out

L27 I-V characteristics (cont.): body effect, back bias  
L28 I-V characteristics (cont.): channel-length modulation, subthreshold regime

Homework 6 due

Homework 7 out

R8 Problems on long MOSFET  
L29 C-V characteristics; small-signal equivalent circuit models  
L30 Short-channel MOSFET: short-channel effects  
L31 MOSFET short-channel effects (cont.)

Homework 7 due

Homework 8 out

R9 Problems on short MOSFET  
L32 MOSFET scaling

Project 4 out

Project 3 due

L33 Evolution of MOSFET design  
L34 Bipolar junction transistor (BJT) intro; basic operation

Homework 8 due

Homework 9 out

R10 Problems on short MOSFET  
L35 BJT I-V characteristics in forward-active  
L36 Other regimes of operation of BJT  
L37 BJT C-V characteristics; small-signal equivalent circuit models Homework 9 due
L38 BJT high-frequency characteristics Project 4 due
R11 Harry’s guest lecture  
R12 Problems on BJT  
L39 BJT non-ideal effects; evolution of BJT design; bipolar issues in complementary metal-oxide-semiconductor (CMOS)  

Course Info

Learning Resource Types
Problem Sets
Lecture Notes