Lecture Notes
l14_utl.pdf
Description:
This file contains lecture on transaction-level design focussing on hardware design abstraction levels, application, algorithm, unit-transaction level (UTL) model, guarded atomic actions (bluespec), register- transfer level (verilog RTL), gates, circuits, devices and physics.
Resource Type:
Lecture Notes
pdf
131 kB
l14_utl.pdf
Course Info
Instructors
Departments
As Taught In
Spring
2005
Level
Topics
Learning Resource Types
notes
Lecture Notes