6.884 | Spring 2005 | Graduate

Complex Digital Systems

Lecture Notes

l14_utl.pdf

Description:

This file contains lecture on transaction-level design focussing on hardware design abstraction levels, application, algorithm, unit-transaction level (UTL) model, guarded atomic actions (bluespec), register- transfer level (verilog RTL), gates, circuits, devices and physics.

Resource Type:
Lecture Notes